Target:Update demo soc config file and fix typo

Signed-off-by: linzewen <linzewen@nucleisys.com>
This commit is contained in:
linzewen 2021-04-25 02:01:35 -07:00
parent 24a847a111
commit 2f3ea928df
6 changed files with 35 additions and 12 deletions

View File

@ -35,7 +35,8 @@ MEMORY
SECTIONS
{
__stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
__stack_size = DEFINED(__stack_size) ? __stack_size : 10K;
__heap_size = DEFINED(__heap_size) ? __heap_size : 10K;
.init :
{
@ -179,6 +180,10 @@ SECTIONS
*(.srodata.cst4)
*(.srodata.cst2)
*(.srodata .srodata.*)
. = ALIGN(4);
__osdriv_start = .;
KEEP (*(osdriv))
__osdriv_end = .;
} >ram AT>ilm
. = ALIGN(4);
@ -198,13 +203,20 @@ SECTIONS
} >ram AT>ram
. = ALIGN(8);
PROVIDE( _end = . );
PROVIDE( end = . );
.stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
.stack : ALIGN(0x10)
{
PROVIDE( _heap_end = . );
. = __stack_size;
PROVIDE( _sp = . );
} >ram AT>ram
}
PROVIDE( _end = . );
.heap : ALIGN(0x10)
{
. = __heap_size;
PROVIDE( _heap_end = . );
PROVIDE( __los_heap_addr_start__ = . );
. = __heap_size == 0 ? 0 : ORIGIN(ram) + LENGTH(ram);
PROVIDE( __los_heap_addr_end__ = . );
} >ram AT>ram
}

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@ -15,6 +15,12 @@ C_INCLUDES += -I$(LITEOSTOPDIR)/utils \
-I$(LITEOSTOPDIR)/components/los_backtrace \
-I$(LITEOSTOPDIR)/components/bounds_checking_function/include
#third party related
C_INCLUDES += -I$(LITEOSTOPDIR)/third_party/bounds_checking_function/include \
-I$(LITEOSTOPDIR)/third_party/bounds_checking_function/src
C_SOURCES += $(wildcard $(LITEOSTOPDIR)/third_party/bounds_checking_function/src/*.c)
# NMSIS related
C_INCLUDES += -I$(LITEOSTOPDIR)/kernel/arch/risc-v/nuclei/gcc/nmsis/Core/Include \
-I$(LITEOSTOPDIR)/kernel/arch/risc-v/nuclei/gcc/nmsis/DSP/Include \

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@ -43,12 +43,16 @@ extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#include "nuclei_sdk_soc.h"
/*=============================================================================
System clock module configuration
=============================================================================*/
#define OS_SYS_CLOCK (8000000)
#define OS_SYS_CLOCK SOC_TIMER_FREQ
#define LOSCFG_BASE_CORE_TICK_PER_SECOND (1000UL)
#define LOSCFG_BASE_CORE_TICK_HW_TIME 0
#define LOSCFG_BASE_CORE_TICK_WTIMER 1
#define LOSCFG_BASE_CORE_SCHED_SLEEP 1
/*=============================================================================
Hardware interrupt module configuration
=============================================================================*/
@ -63,7 +67,8 @@ extern "C" {
#define LOSCFG_BASE_CORE_TSK_DEFAULT_STACK_SIZE (0x2E0U)
#define LOSCFG_BASE_CORE_TSK_MIN_STACK_SIZE (0x130U)
#define LOSCFG_BASE_CORE_TIMESLICE 1
#define LOSCFG_BASE_CORE_TIMESLICE_TIMEOUT 10
#define LOSCFG_BASE_CORE_TIMESLICE_TIMEOUT 20000
#define LOSCFG_BASE_CORE_TICK_RESPONSE_MAX 0xFFFFFF
/*=============================================================================
Semaphore module configuration
=============================================================================*/

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@ -131,6 +131,8 @@ Nuclei DDR200T开发板是一款集成了FPGA和通用MCU的RISC-V评估开发
### 编译源码<a name="sectionb2"></a>
使用`git clone`复制代码到任意目录下,打开进入到工程根目录下,输入`git submodule update --init --recursive`下载更新子模块。
编译前请在当前控制台中配置`NUCLEI_TOOL_ROOT`路径,假设`Nuclei`文件夹所在路径为`/home/Nuclei`,输入`export NUCLEI_TOOL_ROOT=/home/Nuclei` 。或者使用时make选项增加`NUCLEI_TOOL_ROOT=/home/Nuclei`。
配置路径后打开至代码根目录下的/target/riscv_nuclei_demo_soc_gcc/GCC位置输入如下指令开始编译

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@ -28,8 +28,7 @@ int main(void)
{
/* USER CODE BEGIN Init */
RunTaskSample();
while (1)
{
while (1) {
}
}
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

View File

@ -33,7 +33,6 @@
*/
#include "task_sample.h"
#include "los_config.h"
#include "los_debug.h"
#include "los_interrupt.h"
@ -51,16 +50,16 @@ UINT8 __attribute__ ((aligned (8))) g_memStart[OS_SYS_MEM_SIZE];
VOID TaskSampleEntry2(VOID)
{
while (1) {
LOS_TaskDelay(10000); /* 10 Seconds */
printf("TaskSampleEntry2 running...\n");
LOS_TaskDelay(10000); /* 10 Seconds */
}
}
VOID TaskSampleEntry1(VOID)
{
while (1) {
LOS_TaskDelay(2000); /* 2 Seconds */
printf("TaskSampleEntry1 running...\n");
LOS_TaskDelay(2000); /* 2 Seconds */
}
}