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!238 M33 平台 trust zone 适配修改 

Merge pull request !238 from wangchen/tz_fix
This commit is contained in:
openharmony_ci 2021-07-29 12:40:50 +00:00 committed by Gitee
parent 7bd5a806e9 15a2c17f79
commit 285d90979b
10 changed files with 12 additions and 29 deletions
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2
kernel/BUILD.gn
View File

@ -61,7 +61,7 @@ static_library("kernel") {
} else if ("$board_cpu" == "cortex-m7") {
deps = [ "arch/arm/cortex-m7/gcc/:arch" ]
} else if ("$board_cpu" == "cortex-m33") {
deps = [ "arch/arm/cortex-m33/gcc/:arch" ]
deps = [ "arch/arm/cortex-m33/gcc/TZ:arch" ]
} else if ("$board_cpu" == "") {
if ("$board_arch" == "rv32imac" || "$board_arch" == "rv32imafdc") {
deps = [ "arch/risc-v/riscv32/gcc:arch" ]

2
kernel/arch/arm/cortex-m33/gcc/NTZ/los_arch_interrupt.h
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@ -545,7 +545,7 @@ VOID HalExcHardFault(VOID);
VOID HalExcMemFault(VOID);
VOID HalExcBusFault(VOID);
VOID HalExcUsageFault(VOID);
VOID HalExcSvcCall(VOID);
VOID HalSVCHandler(VOID);
VOID HalHwiInit();

8
kernel/arch/arm/cortex-m33/gcc/NTZ/los_exc.S
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@ -41,7 +41,7 @@
.global HalExcMemFault
.global HalExcBusFault
.global HalExcUsageFault
.global HalExcSvcCall
.global HalSVCHandler
.extern HalExcHandleEntry
.extern g_uwExcTbl
@ -148,9 +148,9 @@ osHFExcCommonBMU:
B osExcDispatch
.fnend
.type HalExcSvcCall, %function
.global HalExcSvcCall
HalExcSvcCall:
.type HalSVCHandler, %function
.global HalSVCHandler
HalSVCHandler:
.fnstart
.cantunwind
TST LR, #0x4

2
kernel/arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c
View File

@ -497,7 +497,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit()
g_hwiForm[MemoryManagement_IRQn + OS_SYS_VECTOR_CNT] = HalExcMemFault;
g_hwiForm[BusFault_IRQn + OS_SYS_VECTOR_CNT] = HalExcBusFault;
g_hwiForm[UsageFault_IRQn + OS_SYS_VECTOR_CNT] = HalExcUsageFault;
g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT] = HalExcSvcCall;
g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT] = HalSVCHandler;
g_hwiForm[PendSV_IRQn + OS_SYS_VECTOR_CNT] = HalPendSV;
g_hwiForm[SysTick_IRQn + OS_SYS_VECTOR_CNT] = OsTickHandler;

2
kernel/arch/arm/cortex-m33/gcc/TZ/BUILD.gn
View File

@ -41,6 +41,8 @@ static_library("arch") {
]
include_dirs = [
"./non_secure",
"./secure",
"../../../../../../kernel/arch/include",
"../../../../../../kernel/arch/include",
"../../../../../../kernel/include",

2
kernel/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_interrupt.h
View File

@ -545,7 +545,7 @@ VOID HalExcHardFault(VOID);
VOID HalExcMemFault(VOID);
VOID HalExcBusFault(VOID);
VOID HalExcUsageFault(VOID);
VOID HalExcSvcCall(VOID);
VOID HalSVCHandler(VOID);
VOID HalHwiInit();

3
kernel/arch/arm/cortex-m33/gcc/TZ/non_secure/los_dispatch.S
View File

@ -48,8 +48,6 @@
.type HalStartFirstTask, %function
.global HalStartFirstTask
HalStartFirstTask:
.fnstart
.cantunwind
MOV R0, #2
MSR CONTROL, R0
@ -77,7 +75,6 @@ __DisabledFPU1:
MSR PSP, R12
CPSIE I
BX R3
.fnend
.type HalIntLock, %function
.global HalIntLock

16
kernel/arch/arm/cortex-m33/gcc/TZ/non_secure/los_exc.S
View File

@ -41,7 +41,6 @@
.global HalExcMemFault
.global HalExcBusFault
.global HalExcUsageFault
.global HalExcSvcCall
.extern HalExcHandleEntry
.extern g_uwExcTbl
@ -148,21 +147,6 @@ osHFExcCommonBMU:
B osExcDispatch
.fnend
.type HalExcSvcCall, %function
.global HalExcSvcCall
HalExcSvcCall:
.fnstart
.cantunwind
TST LR, #0x4
ITE EQ
MRSEQ R0, MSP
MRSNE R0, PSP
LDR R1, [R0,#24]
LDRB R0, [R1,#-2]
MOV R1, #0
B osExcDispatch
.fnend
.type HalExcBusFault, %function
.global HalExcBusFault
HalExcBusFault:

2
kernel/arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c
View File

@ -497,7 +497,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit()
g_hwiForm[MemoryManagement_IRQn + OS_SYS_VECTOR_CNT] = HalExcMemFault;
g_hwiForm[BusFault_IRQn + OS_SYS_VECTOR_CNT] = HalExcBusFault;
g_hwiForm[UsageFault_IRQn + OS_SYS_VECTOR_CNT] = HalExcUsageFault;
g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT] = HalExcSvcCall;
g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT] = HalSVCHandler;
g_hwiForm[PendSV_IRQn + OS_SYS_VECTOR_CNT] = HalPendSV;
g_hwiForm[SysTick_IRQn + OS_SYS_VECTOR_CNT] = OsTickHandler;

2
kernel/arch/arm/cortex-m33/gcc/TZ/secure/los_secure_context_asm.S
View File

@ -94,7 +94,7 @@ HalSecureContextSaveAsm:
MOV R0, #0
MSR PSPLIM, R0 /* No PSPLIM for the current task. */
MSR PSP, R0 /* No secure stack for the current task. */
.fnend
__ThreadMode:
BX LR
.fnend