diff --git a/kernel/arch/risc-v/los_arch_interrupt.h b/kernel/arch/risc-v/los_arch_interrupt.h index 6ff6b3a9..63ee4463 100644 --- a/kernel/arch/risc-v/los_arch_interrupt.h +++ b/kernel/arch/risc-v/los_arch_interrupt.h @@ -279,6 +279,8 @@ extern UINT32 g_intCount; */ #define OS_ERRNO_HWI_HWINUM_UNCREATE LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x0b) +extern UINT32 HalUnalignedAccessFix(UINTPTR mcause, UINTPTR mepc, UINTPTR mtval, VOID *sp); + #ifdef __cplusplus #if __cplusplus } diff --git a/kernel/arch/risc-v/los_exc.S b/kernel/arch/risc-v/los_exc.S index cd40b4c5..b0511bb8 100755 --- a/kernel/arch/risc-v/los_exc.S +++ b/kernel/arch/risc-v/los_exc.S @@ -33,21 +33,8 @@ #define _LOS_EXC_S #include "soc.h" -.macro PUSH_ECALL_CALLER_REG - addi sp, sp, -16 * REGBYTES - SREG a7, 2 * REGBYTES(sp) - SREG a6, 3 * REGBYTES(sp) - SREG a5, 4 * REGBYTES(sp) - SREG a4, 5 * REGBYTES(sp) - SREG a3, 6 * REGBYTES(sp) - SREG a2, 7 * REGBYTES(sp) - SREG a1, 8 * REGBYTES(sp) - SREG a0, 9 * REGBYTES(sp) - SREG ra, 15 * REGBYTES(sp) -.endm - -.macro PUSH_OTHER_CALLER_REG - addi sp, sp, -16 * REGBYTES +.macro PUSH_CALLER_REG + addi sp, sp, -(32 * REGBYTES) SREG t6, 2 * REGBYTES(sp) SREG t5, 3 * REGBYTES(sp) SREG t4, 4 * REGBYTES(sp) @@ -55,30 +42,50 @@ SREG t2, 6 * REGBYTES(sp) SREG t1, 7 * REGBYTES(sp) SREG t0, 8 * REGBYTES(sp) + SREG a7, 18 * REGBYTES(sp) + SREG a6, 19 * REGBYTES(sp) + SREG a5, 20 * REGBYTES(sp) + SREG a4, 21 * REGBYTES(sp) + SREG a3, 22 * REGBYTES(sp) + SREG a2, 23 * REGBYTES(sp) + SREG a1, 24 * REGBYTES(sp) + SREG a0, 25 * REGBYTES(sp) + SREG ra, 31 * REGBYTES(sp) .endm +.macro POP_CALLER_REG + LREG t6, 2 * REGBYTES(sp) + LREG t5, 3 * REGBYTES(sp) + LREG t4, 4 * REGBYTES(sp) + LREG t3, 5 * REGBYTES(sp) + LREG t2, 6 * REGBYTES(sp) + LREG t1, 7 * REGBYTES(sp) + LREG t0, 8 * REGBYTES(sp) + LREG a7, 18 * REGBYTES(sp) + LREG a6, 19 * REGBYTES(sp) + LREG a5, 20 * REGBYTES(sp) + LREG a4, 21 * REGBYTES(sp) + LREG a3, 22 * REGBYTES(sp) + LREG a2, 23 * REGBYTES(sp) + LREG a1, 24 * REGBYTES(sp) + LREG a0, 25 * REGBYTES(sp) + LREG ra, 31 * REGBYTES(sp) + addi sp, sp, 32 * REGBYTES +.endm -.macro PUSH_OTHER_REG - addi sp, sp, -16 * REGBYTES - SREG t6, 2 * REGBYTES(sp) - SREG t5, 3 * REGBYTES(sp) - SREG t4, 4 * REGBYTES(sp) - SREG t3, 5 * REGBYTES(sp) - SREG t2, 6 * REGBYTES(sp) - SREG t1, 7 * REGBYTES(sp) - SREG t0, 8 * REGBYTES(sp) - SREG s11, 9 * REGBYTES(sp) - SREG s10, 10 * REGBYTES(sp) - SREG s9, 11 * REGBYTES(sp) - SREG s8, 12 * REGBYTES(sp) - SREG s7, 13 * REGBYTES(sp) - SREG s6, 14 * REGBYTES(sp) - SREG s5, 15 * REGBYTES(sp) - SREG s4, 26 * REGBYTES(sp) - SREG s3, 27 * REGBYTES(sp) - SREG s2, 28 * REGBYTES(sp) - SREG s1, 29 * REGBYTES(sp) - SREG s0, 30 * REGBYTES(sp) +.macro PUSH_CALLEE_REG + SREG s11, 9 * REGBYTES(sp) + SREG s10, 10 * REGBYTES(sp) + SREG s9, 11 * REGBYTES(sp) + SREG s8, 12 * REGBYTES(sp) + SREG s7, 13 * REGBYTES(sp) + SREG s6, 14 * REGBYTES(sp) + SREG s5, 15 * REGBYTES(sp) + SREG s4, 26 * REGBYTES(sp) + SREG s3, 27 * REGBYTES(sp) + SREG s2, 28 * REGBYTES(sp) + SREG s1, 29 * REGBYTES(sp) + SREG s0, 30 * REGBYTES(sp) .endm .macro POP_ALL_REG @@ -119,20 +126,21 @@ .global HalTrapEntry .align 4 HalTrapEntry: - PUSH_OTHER_REG - addi sp, sp, -4 * REGBYTES + PUSH_CALLEE_REG + csrr t0, mstatus + sw t0, 16 * REGBYTES(sp) + csrr t0, mepc + sw t0, 17 * REGBYTES(sp) + sw tp, 1 * REGBYTES(sp) + sw sp, 0 * REGBYTES(sp) + addi sp, sp, -(4 * REGBYTES) + csrr a0, mcause sw a0, 0 * REGBYTES(sp) csrr t0, mtval sw t0, 1 * REGBYTES(sp) csrr t0, medeleg sw t0, 2 * REGBYTES(sp) sw gp, 3 * REGBYTES(sp) - sw sp, 4 * REGBYTES(sp) - sw tp, 5 * REGBYTES(sp) - csrr t0, mstatus - sw t0, 20 * REGBYTES(sp) - csrr t0, mepc - sw t0, 21 * REGBYTES(sp) mv a0, sp csrw mscratch, sp la t0, g_excInfo @@ -161,14 +169,13 @@ HalTrapEntry: .equ TRAP_INTERRUPT_MODE_MASK, 0x80000000 .align 4 HalTrapVector: - PUSH_ECALL_CALLER_REG + PUSH_CALLER_REG csrr a0, mcause li a1, TRAP_INTERRUPT_MODE_MASK li a2, MCAUSE_INT_ID_MASK and a1, a0, a1 and a0, a2, a0 beqz a1, HalTrapEntry - PUSH_OTHER_CALLER_REG csrw mscratch, sp la sp, __start_and_irq_stack_top jal HalHwiInterruptDone diff --git a/kernel/arch/risc-v/los_interrupt.c b/kernel/arch/risc-v/los_interrupt.c index cf8f53f2..b5c5bfbd 100644 --- a/kernel/arch/risc-v/los_interrupt.c +++ b/kernel/arch/risc-v/los_interrupt.c @@ -48,6 +48,8 @@ static ExcInfoArray g_excArray[OS_EXC_TYPE_MAX]; LosExcInfo g_excInfo; #define RISCV_EXC_TYPE_NUM 16 +#define RISCV_EXC_LOAD_MISALIGNED 4 +#define RISCV_EXC_STORE_MISALIGNED 6 const CHAR g_excInformation[RISCV_EXC_TYPE_NUM][50] = { { "Instruction address misaligned!" }, { "Instruction access fault!" }, @@ -332,13 +334,10 @@ STATIC VOID ExcInfoDisplayContext(const LosExcInfo *exc) STATIC VOID ExcInfoDisplay(const LosExcContext *excBufAddr) { - g_excInfo.type = excBufAddr->mcause; - g_excInfo.context = (LosExcContext *)excBufAddr; - PRINTK("\r\nException Information \n\r"); - if (excBufAddr->mcause < RISCV_EXC_TYPE_NUM) { - PRINTK("Exc type : Oops - %s\n\r", g_excInformation[excBufAddr->mcause]); + if (g_excInfo.type < RISCV_EXC_TYPE_NUM) { + PRINTK("Exc type : Oops - %s\n\r", g_excInformation[g_excInfo.type]); } else { PRINTK("Exc type : Oops - Invalid\n\r"); } @@ -349,13 +348,33 @@ STATIC VOID ExcInfoDisplay(const LosExcContext *excBufAddr) ExcInfoDisplayContext(&g_excInfo); } +WEAK UINT32 HalUnalignedAccessFix(UINTPTR mcause, UINTPTR mepc, UINTPTR mtval, VOID *sp) +{ + /* Unaligned acess fixes are not supported by default */ + PRINTK("Unaligned acess fixes are not support by default!\n\r"); + return LOS_NOK; +} + VOID HalExcEntry(const LosExcContext *excBufAddr) { + UINT32 ret; + g_excInfo.type = excBufAddr->mcause & 0x1FF; + g_excInfo.context = (LosExcContext *)excBufAddr; + if (g_excInfo.nestCnt > 2) { PRINTK("hard faule!\n\r"); goto SYSTEM_DEATH; } + if ((g_excInfo.type == RISCV_EXC_LOAD_MISALIGNED) || + (g_excInfo.type == RISCV_EXC_STORE_MISALIGNED)) { + ret = HalUnalignedAccessFix(excBufAddr->mcause, excBufAddr->taskContext.mepc, excBufAddr->mtval, + (VOID *)excBufAddr); + if (!ret) { + return; + } + } + ExcInfoDisplay(excBufAddr); PRINTK("----------------All Task infomation ------------\n\r");