yystopf/openharmony_kernel_liteos_m
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

style: Misspelling

Browse Source 
Signed-off-by: lihongjin <lihongjin1@huawei.com>
Change-Id: Ie14607b483d31a6efdf17e40e9937fe4bc2484c2
This commit is contained in:
lihongjin
2022-06-20 16:00:23 +08:00
parent c1e3856bbe
commit 243fe55c68
34 changed files with 106 additions and 106 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/risc-v/nuclei/gcc/los_arch_interrupt.h
View File

@@ -51,7 +51,7 @@ extern "C" {
/**
* @ingroup los_hwi
* Count of Nuclei interrupt vector maxium, which is configurable.
* Count of Nuclei interrupt vector maximum, which is configurable.
*/
#define OS_RISCV_CUSTOM_IRQ_VECTOR_CNT SOC_INT_MAX

6
arch/risc-v/nuclei/gcc/los_interrupt.c
View File

@@ -193,15 +193,15 @@ VOID HalDisplayTaskInfo(VOID)
/* ****************************************************************************
Function : HalUnalignedAccessFix
Description : Unaligned acess fixes are not supported by default
Description : Unaligned access fixes are not supported by default
Input : None
Output : None
Return : None
**************************************************************************** */
WEAK UINT32 HalUnalignedAccessFix(UINTPTR mcause, UINTPTR mepc, UINTPTR mtval, VOID *sp)
{
/* Unaligned acess fixes are not supported by default */
PRINTK("Unaligned acess fixes are not support by default!\r\n");
/* Unaligned access fixes are not supported by default */
PRINTK("Unaligned access fixes are not support by default!\r\n");
return LOS_NOK;
}

58
arch/risc-v/nuclei/gcc/nmsis/Core/Include/core_feature_dsp.h
View File

@@ -62,9 +62,9 @@
* - ZEm(data): Zero-Extend data to m-bit.
* - ABS(x): Calculate the absolute value of `x`.
* - CONCAT(x,y): Concatinate `x` and `y` to form a value.
* - u<: Unsinged less than comparison.
* - u<=: Unsinged less than & equal comparison.
* - u>: Unsinged greater than comparison.
* - u<: Unsigned less than comparison.
* - u<=: Unsigned less than & equal comparison.
* - u>: Unsigned greater than comparison.
* - s*: Signed multiplication.
* - u*: Unsigned multiplication.
*
@@ -2641,7 +2641,7 @@ __STATIC_FORCEINLINE long __RV_KHMTT(unsigned int a, unsigned int b)
/* ===== Inline Function Start for 3.38.1. KMABB ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMABB (SIMD Saturating Signed Multiply Bottom Halfs & Add)
* \brief KMABB (SIMD Saturating Signed Multiply Bottom Halves & Add)
* \details
* **Type**: SIMD
*
@@ -2704,7 +2704,7 @@ __STATIC_FORCEINLINE long __RV_KMABB(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.38.2. KMABT ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMABT (SIMD Saturating Signed Multiply Bottom & Top Halfs & Add)
* \brief KMABT (SIMD Saturating Signed Multiply Bottom & Top Halves & Add)
* \details
* **Type**: SIMD
*
@@ -2767,7 +2767,7 @@ __STATIC_FORCEINLINE long __RV_KMABT(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.38.3. KMATT ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMATT (SIMD Saturating Signed Multiply Top Halfs & Add)
* \brief KMATT (SIMD Saturating Signed Multiply Top Halves & Add)
* \details
* **Type**: SIMD
*
@@ -2830,7 +2830,7 @@ __STATIC_FORCEINLINE long __RV_KMATT(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.39.1. KMADA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMADA (SIMD Saturating Signed Multiply Two Halfs and Two Adds)
* \brief KMADA (SIMD Saturating Signed Multiply Two Halves and Two Adds)
* \details
* **Type**: SIMD
*
@@ -2894,7 +2894,7 @@ __STATIC_FORCEINLINE long __RV_KMADA(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.39.2. KMAXDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMAXDA (SIMD Saturating Signed Crossed Multiply Two Halfs and Two Adds)
* \brief KMAXDA (SIMD Saturating Signed Crossed Multiply Two Halves and Two Adds)
* \details
* **Type**: SIMD
*
@@ -2958,7 +2958,7 @@ __STATIC_FORCEINLINE long __RV_KMAXDA(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.40.1. KMADS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMADS (SIMD Saturating Signed Multiply Two Halfs & Subtract & Add)
* \brief KMADS (SIMD Saturating Signed Multiply Two Halves & Subtract & Add)
* \details
* **Type**: SIMD
*
@@ -3030,7 +3030,7 @@ __STATIC_FORCEINLINE long __RV_KMADS(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.40.2. KMADRS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMADRS (SIMD Saturating Signed Multiply Two Halfs & Reverse Subtract & Add)
* \brief KMADRS (SIMD Saturating Signed Multiply Two Halves & Reverse Subtract & Add)
* \details
* **Type**: SIMD
*
@@ -3102,7 +3102,7 @@ __STATIC_FORCEINLINE long __RV_KMADRS(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.40.3. KMAXDS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMAXDS (SIMD Saturating Signed Crossed Multiply Two Halfs & Subtract & Add)
* \brief KMAXDS (SIMD Saturating Signed Crossed Multiply Two Halves & Subtract & Add)
* \details
* **Type**: SIMD
*
@@ -3242,7 +3242,7 @@ __STATIC_FORCEINLINE long long __RV_KMAR64(long long t, long a, long b)
/* ===== Inline Function Start for 3.42.1. KMDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMDA (SIMD Signed Multiply Two Halfs and Add)
* \brief KMDA (SIMD Signed Multiply Two Halves and Add)
* \details
* **Type**: SIMD
*
@@ -3293,7 +3293,7 @@ __STATIC_FORCEINLINE long __RV_KMDA(unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.42.2. KMXDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMXDA (SIMD Signed Crossed Multiply Two Halfs and Add)
* \brief KMXDA (SIMD Signed Crossed Multiply Two Halves and Add)
* \details
* **Type**: SIMD
*
@@ -4330,7 +4330,7 @@ __STATIC_FORCEINLINE long __RV_KMMWT2_U(long a, unsigned long b)
/* ===== Inline Function Start for 3.51.1. KMSDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMSDA (SIMD Saturating Signed Multiply Two Halfs & Add & Subtract)
* \brief KMSDA (SIMD Saturating Signed Multiply Two Halves & Add & Subtract)
* \details
* **Type**: SIMD
*
@@ -4392,7 +4392,7 @@ __STATIC_FORCEINLINE long __RV_KMSDA(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.51.2. KMSXDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMSXDA (SIMD Saturating Signed Crossed Multiply Two Halfs & Add & Subtract)
* \brief KMSXDA (SIMD Saturating Signed Crossed Multiply Two Halves & Add & Subtract)
* \details
* **Type**: SIMD
*
@@ -5558,7 +5558,7 @@ __STATIC_FORCEINLINE long __RV_KSUBH(int a, int b)
* **Description**:\n
* The signed lower 32-bit content of Rs2 is subtracted from the signed lower 32-bit
* content of Rs1. And the result is saturated to the 32-bit signed integer range of [-2^31, 2^31-1] and then
* sign-extened and written to Rd. If saturation happens, this instruction sets the OV flag.
* sign-extended and written to Rd. If saturation happens, this instruction sets the OV flag.
*
* **Operations**:\n
* ~~~
@@ -7337,7 +7337,7 @@ __STATIC_FORCEINLINE unsigned long __RV_SLL16(unsigned long a, unsigned int b)
/* ===== Inline Function Start for 3.104. SMAL ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMAL (Signed Multiply Halfs & Add 64-bit)
* \brief SMAL (Signed Multiply Halves & Add 64-bit)
* \details
* **Type**: Partial-SIMD
*
@@ -7397,7 +7397,7 @@ __STATIC_FORCEINLINE long long __RV_SMAL(long long a, unsigned long b)
/* ===== Inline Function Start for 3.105.1. SMALBB ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALBB (Signed Multiply Bottom Halfs & Add 64-bit)
* \brief SMALBB (Signed Multiply Bottom Halves & Add 64-bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@@ -7561,7 +7561,7 @@ __STATIC_FORCEINLINE long long __RV_SMALBT(long long t, unsigned long a, unsigne
/* ===== Inline Function Start for 3.105.3. SMALTT ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALTT (Signed Multiply Top Halfs & Add 64-bit)
* \brief SMALTT (Signed Multiply Top Halves & Add 64-bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@@ -7643,7 +7643,7 @@ __STATIC_FORCEINLINE long long __RV_SMALTT(long long t, unsigned long a, unsigne
/* ===== Inline Function Start for 3.106.1. SMALDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALDA (Signed Multiply Two Halfs and Two Adds 64-bit)
* \brief SMALDA (Signed Multiply Two Halves and Two Adds 64-bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@@ -7727,7 +7727,7 @@ __STATIC_FORCEINLINE long long __RV_SMALDA(long long t, unsigned long a, unsigne
/* ===== Inline Function Start for 3.106.2. SMALXDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALXDA (Signed Crossed Multiply Two Halfs and Two Adds 64-bit)
* \brief SMALXDA (Signed Crossed Multiply Two Halves and Two Adds 64-bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@@ -7811,7 +7811,7 @@ __STATIC_FORCEINLINE long long __RV_SMALXDA(long long t, unsigned long a, unsign
/* ===== Inline Function Start for 3.107.1. SMALDS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALDS (Signed Multiply Two Halfs & Subtract & Add 64-bit)
* \brief SMALDS (Signed Multiply Two Halves & Subtract & Add 64-bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@@ -7902,7 +7902,7 @@ __STATIC_FORCEINLINE long long __RV_SMALDS(long long t, unsigned long a, unsigne
/* ===== Inline Function Start for 3.107.2. SMALDRS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALDRS (Signed Multiply Two Halfs & Reverse Subtract & Add 64- bit)
* \brief SMALDRS (Signed Multiply Two Halves & Reverse Subtract & Add 64- bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@@ -7993,7 +7993,7 @@ __STATIC_FORCEINLINE long long __RV_SMALDRS(long long t, unsigned long a, unsign
/* ===== Inline Function Start for 3.107.3. SMALXDS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALXDS (Signed Crossed Multiply Two Halfs & Subtract & Add 64- bit)
* \brief SMALXDS (Signed Crossed Multiply Two Halves & Subtract & Add 64- bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@@ -8459,7 +8459,7 @@ __STATIC_FORCEINLINE long __RV_SMTT16(unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.114.1. SMDS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief SMDS (SIMD Signed Multiply Two Halfs and Subtract)
* \brief SMDS (SIMD Signed Multiply Two Halves and Subtract)
* \details
* **Type**: SIMD
*
@@ -8518,7 +8518,7 @@ __STATIC_FORCEINLINE long __RV_SMDS(unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.114.2. SMDRS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief SMDRS (SIMD Signed Multiply Two Halfs and Reverse Subtract)
* \brief SMDRS (SIMD Signed Multiply Two Halves and Reverse Subtract)
* \details
* **Type**: SIMD
*
@@ -8577,7 +8577,7 @@ __STATIC_FORCEINLINE long __RV_SMDRS(unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.114.3. SMXDS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief SMXDS (SIMD Signed Crossed Multiply Two Halfs and Subtract)
* \brief SMXDS (SIMD Signed Crossed Multiply Two Halves and Subtract)
* \details
* **Type**: SIMD
*
@@ -9016,7 +9016,7 @@ __STATIC_FORCEINLINE long __RV_SMMWT_U(long a, unsigned long b)
/* ===== Inline Function Start for 3.120.1. SMSLDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMSLDA (Signed Multiply Two Halfs & Add & Subtract 64-bit)
* \brief SMSLDA (Signed Multiply Two Halves & Add & Subtract 64-bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@@ -9098,7 +9098,7 @@ __STATIC_FORCEINLINE long long __RV_SMSLDA(long long t, unsigned long a, unsigne
/* ===== Inline Function Start for 3.120.2. SMSLXDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMSLXDA (Signed Crossed Multiply Two Halfs & Add & Subtract 64- bit)
* \brief SMSLXDA (Signed Crossed Multiply Two Halves & Add & Subtract 64- bit)
* \details
* **Type**: DSP (64-bit Profile)
*

2
arch/risc-v/nuclei/gcc/nmsis/Core/Include/core_feature_eclic.h
View File

@@ -282,7 +282,7 @@ __STATIC_FORCEINLINE uint32_t __ECLIC_GetCfgNlbits(void)
* This function gets the hardware version information from CLICINFO register.
* \return hardware version number in CLICINFO register.
* \remarks
* - This function gets harware version information from CLICINFO register.
* - This function gets hardware version information from CLICINFO register.
* - Bit 20:17 for architecture version, bit 16:13 for implementation version.
* \sa
* - \ref ECLIC_GetInfoNum

2
arch/risc-v/nuclei/gcc/nmsis/Core/Include/core_feature_fpu.h
View File

@@ -81,7 +81,7 @@
* \details
* * We can save power by disable FPU Unit.
* * When FPU Unit is disabled, any access to FPU related CSR registers
* and FPU instructions will cause illegal Instuction Exception.
* and FPU instructions will cause illegal Instruction Exception.
* */
#define __disable_FPU() __RV_CSR_CLEAR(CSR_MSTATUS, MSTATUS_FS)

2
arch/risc-v/nuclei/gcc/nmsis/Core/Include/core_feature_timer.h
View File

@@ -282,7 +282,7 @@ __STATIC_FORCEINLINE void SysTimer_SoftwareReset(void)
* \details Initializes the System Timer and its non-vector interrupt, and starts the System Tick Timer.
*
* In our default implementation, the timer counter will be set to zero, and it will start a timer compare non-vector interrupt
* when it matchs the ticks user set, during the timer interrupt user should reload the system tick using \ref SysTick_Reload function
* when it matches the ticks user set, during the timer interrupt user should reload the system tick using \ref SysTick_Reload function
* or similar function written by user, so it can produce period timer interrupt.
* \param [in] ticks Number of ticks between two interrupts.
* \return 0 Function succeeded.

2
arch/risc-v/nuclei/gcc/nmsis/Core/Include/riscv_encoding.h
View File

@@ -325,7 +325,7 @@
* \brief NMSIS Core CSR Register Definitions
* \details
*
* The following macros are used for CSR Register Defintions.
* The following macros are used for CSR Register Definitions.
* @{
*/
/* === Standard RISC-V CSR Registers === */

58
arch/risc-v/nuclei/gcc/nmsis/NN/Include/riscv_nnfunctions.h
View File

@@ -47,7 +47,7 @@
* - Neural Network Support Functions
*
* The library has separate functions for operating on different weight and activation data
* types including 8-bit integers (q7_t) and 16-bit integers (q15_t). The descrition of the
* types including 8-bit integers (q7_t) and 16-bit integers (q15_t). The description of the
* kernels are included in the function description. The implementation details are also
* described in this paper [1].
*
@@ -119,7 +119,7 @@ extern "C"
/**
* @brief Basic Q7 convolution function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@@ -156,8 +156,8 @@ extern "C"
/**
* @brief Basic Q7 convolution function (non-sqaure shape)
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in_x input tensor dimention x
* @param[in] dim_im_in_y input tensor dimention y
* @param[in] dim_im_in_x input tensor dimension x
* @param[in] dim_im_in_y input tensor dimension y
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@@ -202,7 +202,7 @@ extern "C"
/**
* @brief Basic Q15 convolution function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@@ -239,7 +239,7 @@ extern "C"
/**
* @brief Fast Q7 convolution function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@@ -257,7 +257,7 @@ extern "C"
* <code>RISCV_MATH_SIZE_MISMATCH</code> or <code>RISCV_MATH_SUCCESS</code> based on the outcome of size checking.
*
* This function is the version with full list of optimization tricks, but with
* some contraints:
* some constraints:
* ch_im_in is multiple of 4
* ch_im_out is multiple of 2
*/
@@ -281,8 +281,8 @@ extern "C"
/**
* @brief Fast Q7 convolution function (non-sqaure shape)
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in_x input tensor dimention x
* @param[in] dim_im_in_y input tensor dimention y
* @param[in] dim_im_in_x input tensor dimension x
* @param[in] dim_im_in_y input tensor dimension y
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@@ -304,7 +304,7 @@ extern "C"
* <code>RISCV_MATH_SIZE_MISMATCH</code> or <code>RISCV_MATH_SUCCESS</code> based on the outcome of size checking.
*
* This function is the version with full list of optimization tricks, but with
* some contraints:
* some constraints:
* ch_im_in is multiple of 4
* ch_im_out is multiple of 2
*/
@@ -333,8 +333,8 @@ extern "C"
/**
* @brief Fast Q7 version of 1x1 convolution (non-sqaure shape)
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in_x input tensor dimention x
* @param[in] dim_im_in_y input tensor dimention y
* @param[in] dim_im_in_x input tensor dimension x
* @param[in] dim_im_in_y input tensor dimension y
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@@ -360,7 +360,7 @@ extern "C"
* second half of MobileNets after depthwise separable convolution.
*
* This function is the version with full list of optimization tricks, but with
* some contraints:
* some constraints:
* ch_im_in is multiple of 4
* ch_im_out is multiple of 2
*/
@@ -388,7 +388,7 @@ extern "C"
/**
* @brief Q7 version of convolution for RGB image
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@@ -429,7 +429,7 @@ extern "C"
/**
* @brief Fast Q15 convolution function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@@ -447,7 +447,7 @@ extern "C"
* <code>RISCV_MATH_SIZE_MISMATCH</code> or <code>RISCV_MATH_SUCCESS</code> based on the outcome of size checking.
*
* This function is the version with full list of optimization tricks, but with
* some contraints:
* some constraints:
* ch_im_in is multiple of 2
* ch_im_out is multiple of 2
*/
@@ -471,8 +471,8 @@ extern "C"
/**
* @brief Fast Q15 convolution function (non-sqaure shape)
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in_x input tensor dimention x
* @param[in] dim_im_in_y input tensor dimention y
* @param[in] dim_im_in_x input tensor dimension x
* @param[in] dim_im_in_y input tensor dimension y
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@@ -505,7 +505,7 @@ extern "C"
*
* ch_im_in is multiple of 2
*
* ch_im_out is multipe of 2
* ch_im_out is multiple of 2
*
*/
@@ -534,7 +534,7 @@ extern "C"
/**
* @brief Q7 depthwise separable convolution function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@@ -552,7 +552,7 @@ extern "C"
* <code>RISCV_MATH_SIZE_MISMATCH</code> or <code>RISCV_MATH_SUCCESS</code> based on the outcome of size checking.
*
* This function is the version with full list of optimization tricks, but with
* some contraints:
* some constraints:
* ch_im_in is multiple of 2
* ch_im_out is multiple of 2
*/
@@ -576,8 +576,8 @@ extern "C"
/**
* @brief Q7 depthwise separable convolution function (non-square shape)
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in_x input tensor dimention x
* @param[in] dim_im_in_y input tensor dimention y
* @param[in] dim_im_in_x input tensor dimension x
* @param[in] dim_im_in_y input tensor dimension y
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@@ -599,7 +599,7 @@ extern "C"
* <code>RISCV_MATH_SIZE_MISMATCH</code> or <code>RISCV_MATH_SUCCESS</code> based on the outcome of size checking.
*
* This function is the version with full list of optimization tricks, but with
* some contraints:
* some constraints:
* ch_im_in is multiple of 2
* ch_im_out is multiple of 2
*/
@@ -986,7 +986,7 @@ extern "C"
/**
* @brief Q7 max pooling function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] dim_kernel filter kernel size
* @param[in] padding padding sizes
@@ -1011,7 +1011,7 @@ extern "C"
/**
* @brief Q7 average pooling function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] dim_kernel filter kernel size
* @param[in] padding padding sizes
@@ -1043,7 +1043,7 @@ extern "C"
/**
* @brief Q7 softmax function
* @param[in] vec_in pointer to input vector
* @param[in] dim_vec input vector dimention
* @param[in] dim_vec input vector dimension
* @param[out] p_out pointer to output vector
* @return none.
*
@@ -1054,7 +1054,7 @@ extern "C"
/**
* @brief Q15 softmax function
* @param[in] vec_in pointer to input vector
* @param[in] dim_vec input vector dimention
* @param[in] dim_vec input vector dimension
* @param[out] p_out pointer to output vector
* @return none.
*
@@ -1081,7 +1081,7 @@ extern "C"
* @param[in] dilation_x Dilation along width. Not used and intended for future enhancement.
* @param[in] dilation_y Dilation along height. Not used and intended for future enhancement.
* @param[in] bias Pointer to optional bias values. If no bias is
* availble, NULL is expected
* available, NULL is expected
* @param[in] input_offset Input tensor zero offset
* @param[in] filter_offset Kernel tensor zero offset
* @param[in] output_offset Output tensor zero offset