From 914913fab6c155b96e042a03fa33b681b3cf5dc1 Mon Sep 17 00:00:00 2001
From: zhushengle <zhushengle@huawei.com>
Date: Thu, 10 Nov 2022 16:07:37 +0800
Subject: [PATCH] =?UTF-8?q?task:=20risc-v=E7=B3=BB=E7=BB=9F=E5=BC=82?=
 =?UTF-8?q?=E5=B8=B8=E6=97=B6=E5=8F=96=E6=B6=88=E5=AF=B9medeleg=E5=AF=84?=
 =?UTF-8?q?=E5=AD=98=E5=99=A8=E7=9A=84=E4=BF=9D=E5=AD=98?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

   部分开源架构不支持该寄存器，且非常用寄存器

Close #I60IS5
Signed-off-by: zhushengle <zhushengle@huawei.com>
Change-Id: I8db31f84a24cc6143513c725691e4ba780ca99e9
---
 arch/risc-v/riscv32/gcc/los_exc.S | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/risc-v/riscv32/gcc/los_exc.S b/arch/risc-v/riscv32/gcc/los_exc.S
index 61cda429..c4cf2eac 100644
--- a/arch/risc-v/riscv32/gcc/los_exc.S
+++ b/arch/risc-v/riscv32/gcc/los_exc.S
@@ -139,8 +139,7 @@ HalTrapEntry:
     sw    a0, 0 * REGBYTES(sp)
     csrr  t0, mtval
     sw    t0, 1 * REGBYTES(sp)
-    csrr  t0, medeleg
-    sw    t0, 2 * REGBYTES(sp)
+    sw    zero, 2 * REGBYTES(sp)
     sw    gp, 3 * REGBYTES(sp)
     mv    a0, sp
     csrw  mscratch, sp