fix:按照评审意见，调整目录到V2下，修改代码review问题
合入原因：按照规划增加winnermicro w800芯片OH适配
需要新增CK804芯片架构支持代码
修改：在kernel/liteos_m、device/soc、device/board、vendor/hihope
仓下增加CK804芯片架构、芯片SDK、开发板和产品配置文件
影响：由于是新增芯片架构，与其他平台编译隔离，无副作用
Signed-off-by: bob_qu <qu_bo@hoperun.com>
This commit is contained in:
bob_qu
parent
3dceae52aa
commit
1ab2ffcd4a
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@ -30,9 +30,5 @@
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import("//kernel/liteos_m/liteos.gni")
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import("//kernel/liteos_m/liteos.gni")
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module_group("csky") {
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module_group("csky") {
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if ("$board_cpu" == "ck804ef") {
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modules = [ "$board_cpu/gcc" ]
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} else {
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modules = [ "v2/gcc" ]
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modules = [ "v2/gcc" ]
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}
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}
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}
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@ -1,44 +0,0 @@
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# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
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# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without modification,
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# are permitted provided that the following conditions are met:
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#
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# 1. Redistributions of source code must retain the above copyright notice, this list of
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# conditions and the following disclaimer.
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#
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# 2. Redistributions in binary form must reproduce the above copyright notice, this list
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# of conditions and the following disclaimer in the documentation and/or other materials
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# provided with the distribution.
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#
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# 3. Neither the name of the copyright holder nor the names of its contributors may be used
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# to endorse or promote products derived from this software without specific prior written
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# permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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import("//kernel/liteos_m/liteos.gni")
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module_name = "arch"
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kernel_module(module_name) {
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sources = [
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"los_context.c",
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"los_dispatch.S",
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"los_interrupt.c",
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"los_timer.c",
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]
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}
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config("public") {
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include_dirs = [ "." ]
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}
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@ -1,108 +0,0 @@
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/*
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* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
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* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice, this list
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* of conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _LOS_ARCH_CONTEXT_H
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#define _LOS_ARCH_CONTEXT_H
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#include "los_config.h"
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#include "los_compiler.h"
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#ifdef __cplusplus
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#if __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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#endif /* __cplusplus */
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#define OS_TRAP_STACK_SIZE 500
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typedef struct TagTskContext {
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UINT32 R0;
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UINT32 R1;
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UINT32 R2;
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UINT32 R3;
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UINT32 R4;
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UINT32 R5;
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UINT32 R6;
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UINT32 R7;
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UINT32 R8;
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UINT32 R9;
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UINT32 R10;
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UINT32 R11;
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UINT32 R12;
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UINT32 R13;
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UINT32 R15;
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UINT32 R16;
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UINT32 R17;
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UINT32 R18;
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UINT32 R19;
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UINT32 R20;
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UINT32 R21;
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UINT32 R22;
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UINT32 R23;
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UINT32 R24;
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UINT32 R25;
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UINT32 R26;
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UINT32 R27;
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UINT32 R28;
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UINT32 R29;
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UINT32 R30;
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UINT32 R31;
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UINT32 VR0;
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UINT32 VR1;
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UINT32 VR2;
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UINT32 VR3;
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UINT32 VR4;
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UINT32 VR5;
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UINT32 VR6;
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UINT32 VR7;
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UINT32 VR8;
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UINT32 VR9;
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UINT32 VR10;
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UINT32 VR11;
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UINT32 VR12;
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UINT32 VR13;
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UINT32 VR14;
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UINT32 VR15;
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UINT32 EPSR;
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UINT32 EPC;
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} TaskContext;
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VOID HalStartToRun(VOID);
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VOID HalTaskContextSwitch(VOID);
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VOID HalIrqEndCheckNeedSched(VOID);
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#ifdef __cplusplus
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#if __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* __cplusplus */
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#endif /* _LOS_ARCH_CONTEXT_H */
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@ -1,371 +0,0 @@
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/*
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* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
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* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice, this list
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* of conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _LOS_ARCH_INTERRUPT_H
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#define _LOS_ARCH_INTERRUPT_H
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#include "los_config.h"
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#include "los_compiler.h"
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#include "los_interrupt.h"
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#ifdef __cplusplus
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#if __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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#endif /* __cplusplus */
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/* *
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* @ingroup los_arch_interrupt
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* Maximum number of used hardware interrupts.
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*/
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#ifndef OS_HWI_MAX_NUM
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#define OS_HWI_MAX_NUM LOSCFG_PLATFORM_HWI_LIMIT
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#endif
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/* *
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* @ingroup los_arch_interrupt
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* Highest priority of a hardware interrupt.
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*/
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#ifndef OS_HWI_PRIO_HIGHEST
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#define OS_HWI_PRIO_HIGHEST 0
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#endif
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/* *
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* @ingroup los_arch_interrupt
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* Lowest priority of a hardware interrupt.
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*/
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#ifndef OS_HWI_PRIO_LOWEST
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#define OS_HWI_PRIO_LOWEST 3
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#endif
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/* *
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* @ingroup los_arch_interrupt
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* Define the type of a hardware interrupt vector table function.
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*/
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typedef VOID (**HWI_VECTOR_FUNC)(VOID);
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/* *
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* @ingroup los_arch_interrupt
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* Count of interrupts.
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*/
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extern volatile UINT32 g_intCount;
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/* *
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* @ingroup los_arch_interrupt
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* Count of C-sky system interrupt vector.
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*/
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#define OS_SYS_VECTOR_CNT 32
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/* *
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* @ingroup los_arch_interrupt
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* Count of C-sky interrupt vector.
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*/
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#define OS_VECTOR_CNT (OS_SYS_VECTOR_CNT + OS_HWI_MAX_NUM)
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#define PSR_VEC_OFFSET 16U
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#define VIC_REG_BASE 0xE000E100UL
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typedef struct {
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UINT32 ISER[4U];
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UINT32 RESERVED0[12U];
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UINT32 IWER[4U];
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UINT32 RESERVED1[12U];
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UINT32 ICER[4U];
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UINT32 RESERVED2[12U];
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UINT32 IWDR[4U];
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UINT32 RESERVED3[12U];
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UINT32 ISPR[4U];
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UINT32 RESERVED4[12U];
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UINT32 ISSR[4U];
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UINT32 RESERVED5[12U];
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UINT32 ICPR[4U];
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UINT32 RESERVED6[12U];
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UINT32 ICSR[4U];
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UINT32 RESERVED7[12U];
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UINT32 IABR[4U];
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UINT32 RESERVED8[60U];
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UINT32 IPR[32U];
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UINT32 RESERVED9[480U];
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UINT32 ISR;
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UINT32 IPTR;
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UINT32 TSPEND;
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UINT32 TSABR;
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UINT32 TSPR;
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} VIC_TYPE;
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/* *
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* @ingroup los_arch_interrupt
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* Hardware interrupt error code: Invalid interrupt number.
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*
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* Value: 0x02000900
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*
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* Solution: Ensure that the interrupt number is valid.
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*/
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#define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
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/* *
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* @ingroup los_arch_interrupt
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* Hardware interrupt error code: Null hardware interrupt handling function.
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*
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* Value: 0x02000901
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*
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* Solution: Pass in a valid non-null hardware interrupt handling function.
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*/
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#define OS_ERRNO_HWI_PROC_FUNC_NULL LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x01)
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/* *
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* @ingroup los_arch_interrupt
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* Hardware interrupt error code: Insufficient interrupt resources for hardware interrupt creation.
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*
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* Value: 0x02000902
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*
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* Solution: Increase the configured maximum number of supported hardware interrupts.
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*/
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#define OS_ERRNO_HWI_CB_UNAVAILABLE LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x02)
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/* *
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* @ingroup los_arch_interrupt
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* Hardware interrupt error code: Insufficient memory for hardware interrupt initialization.
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*
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* Value: 0x02000903
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*
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* Solution: Expand the configured memory.
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*/
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#define OS_ERRNO_HWI_NO_MEMORY LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x03)
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/* *
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* @ingroup los_arch_interrupt
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* Hardware interrupt error code: The interrupt has already been created.
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*
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* Value: 0x02000904
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*
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* Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
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*/
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#define OS_ERRNO_HWI_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x04)
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/* *
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* @ingroup los_arch_interrupt
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* Hardware interrupt error code: Invalid interrupt priority.
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*
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* Value: 0x02000905
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*
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* Solution: Ensure that the interrupt priority is valid.
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||||||
*/
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#define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
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/* *
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* @ingroup los_arch_interrupt
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* Hardware interrupt error code: Incorrect interrupt creation mode.
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*
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* Value: 0x02000906
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*
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* Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST.
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*/
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#define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
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/* *
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* @ingroup los_arch_interrupt
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* Hardware interrupt error code: The interrupt has already been created as a fast interrupt.
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|
||||||
*
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* Value: 0x02000907
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|
||||||
*
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||||||
* Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
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|
||||||
*/
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#define OS_ERRNO_HWI_FASTMODE_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x07)
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/* *
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|
||||||
* @ingroup los_arch_interrupt
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|
||||||
* Hardware interrupt error code: Invalid interrupt number.
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|
||||||
*
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|
||||||
* Value: 0x02000900
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|
||||||
*
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|
||||||
* Solution: Ensure that the interrupt number is valid.
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|
||||||
*/
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#define LOS_ERRNO_HWI_NUM_INVALID OS_ERRNO_HWI_NUM_INVALID
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|
|
||||||
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
|
|
||||||
/* *
|
|
||||||
* @ingroup los_arch_interrupt
|
|
||||||
* Set interrupt vector table.
|
|
||||||
*/
|
|
||||||
extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg);
|
|
||||||
#else
|
|
||||||
/* *
|
|
||||||
* @ingroup los_arch_interrupt
|
|
||||||
* Set interrupt vector table.
|
|
||||||
*/
|
|
||||||
extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* *
|
|
||||||
* @ingroup los_arch_interrupt
|
|
||||||
* @brief: Hardware interrupt entry function.
|
|
||||||
*
|
|
||||||
* @par Description:This API is used as all hardware interrupt handling function entry.
|
|
||||||
*
|
|
||||||
* @attention:None.
|
|
||||||
*
|
|
||||||
* @param:None.
|
|
||||||
*
|
|
||||||
* @retval:None.
|
|
||||||
* @par Dependency:los_arch_interrupt.h: the header file that contains the API declaration.
|
|
||||||
* @see None.
|
|
||||||
*/
|
|
||||||
extern VOID HalInterrupt(VOID);
|
|
||||||
|
|
||||||
/* *
|
|
||||||
* @ingroup los_arch_interrupt
|
|
||||||
* @brief: Get an interrupt number.
|
|
||||||
*
|
|
||||||
* @par Description:This API is used to get the current interrupt number.
|
|
||||||
*
|
|
||||||
* @attention:None.
|
|
||||||
*
|
|
||||||
* @param: None.
|
|
||||||
*
|
|
||||||
* @retval: Interrupt Indexes number.
|
|
||||||
* @par Dependency:los_arch_interrupt.h: the header file that contains the API declaration.
|
|
||||||
* @see None.
|
|
||||||
*/
|
|
||||||
extern UINT32 HalIntNumGet(VOID);
|
|
||||||
|
|
||||||
/* *
|
|
||||||
* @ingroup los_arch_interrupt
|
|
||||||
* @brief: Default vector handling function.
|
|
||||||
*
|
|
||||||
* @par Description:This API is used to configure interrupt for null function.
|
|
||||||
*
|
|
||||||
* @attention:None.
|
|
||||||
*
|
|
||||||
* @param:None.
|
|
||||||
*
|
|
||||||
* @retval:None.
|
|
||||||
* @par Dependency:los_arch_interrupt.h: the header file that contains the API declaration.
|
|
||||||
* @see None.
|
|
||||||
*/
|
|
||||||
extern VOID HalHwiDefaultHandler(VOID);
|
|
||||||
|
|
||||||
#define OS_EXC_IN_INIT 0
|
|
||||||
#define OS_EXC_IN_TASK 1
|
|
||||||
#define OS_EXC_IN_HWI 2
|
|
||||||
|
|
||||||
#define OS_VIC_INT_ENABLE_SIZE 0x4
|
|
||||||
#define OS_VIC_INT_WAKER_SIZE 0x4
|
|
||||||
#define OS_VIC_INT_ICER_SIZE 0x4
|
|
||||||
#define OS_VIC_INT_ISPR_SIZE 0x4
|
|
||||||
#define OS_VIC_INT_IABR_SIZE 0x4
|
|
||||||
#define OS_VIC_INT_IPR_SIZE 0x4
|
|
||||||
#define OS_VIC_INT_ISR_SIZE 0x4
|
|
||||||
#define OS_VIC_INT_IPTR_SIZE 0x4
|
|
||||||
|
|
||||||
#define OS_EXC_FLAG_FAULTADDR_VALID 0x01
|
|
||||||
|
|
||||||
#define OS_EXC_IMPRECISE_ACCESS_ADDR 0xABABABAB
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @ingroup los_exc
|
|
||||||
* the struct of register files
|
|
||||||
*
|
|
||||||
* description: the register files that saved when exception triggered
|
|
||||||
*
|
|
||||||
* notes:the following register with prefix 'uw' correspond to the registers in the cpu data sheet.
|
|
||||||
*/
|
|
||||||
typedef struct TagExcContext {
|
|
||||||
UINT32 R0;
|
|
||||||
UINT32 R1;
|
|
||||||
UINT32 R2;
|
|
||||||
UINT32 R3;
|
|
||||||
UINT32 R4;
|
|
||||||
UINT32 R5;
|
|
||||||
UINT32 R6;
|
|
||||||
UINT32 R7;
|
|
||||||
UINT32 R8;
|
|
||||||
UINT32 R9;
|
|
||||||
UINT32 R10;
|
|
||||||
UINT32 R11;
|
|
||||||
UINT32 R12;
|
|
||||||
UINT32 R13;
|
|
||||||
UINT32 R14;
|
|
||||||
UINT32 R15;
|
|
||||||
UINT32 EPSR;
|
|
||||||
UINT32 EPC;
|
|
||||||
} EXC_CONTEXT_S;
|
|
||||||
|
|
||||||
/* *
|
|
||||||
* @ingroup los_arch_interrupt
|
|
||||||
* @brief: Exception handler function.
|
|
||||||
*
|
|
||||||
* @par Description:
|
|
||||||
* This API is used to handle Exception.
|
|
||||||
*
|
|
||||||
* @attention:None.
|
|
||||||
*
|
|
||||||
* @param excBufAddr [IN] The address of stack pointer at which the error occurred.
|
|
||||||
* @param faultAddr [IN] The address at which the error occurred.
|
|
||||||
*
|
|
||||||
* @retval:None.
|
|
||||||
* @par Dependency:los_arch_interrupt.h: the header file that contains the API declaration.
|
|
||||||
* @see None.
|
|
||||||
*/
|
|
||||||
LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(EXC_CONTEXT_S *excBufAddr, UINT32 faultAddr);
|
|
||||||
|
|
||||||
VOID IrqEntry(VOID);
|
|
||||||
|
|
||||||
VOID HandleEntry(VOID);
|
|
||||||
|
|
||||||
VOID HalHwiInit(VOID);
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @ingroup los_exc
|
|
||||||
* Exception information structure
|
|
||||||
*
|
|
||||||
* Description: Exception information saved when an exception is triggered on the Csky platform.
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
typedef struct TagExcInfo {
|
|
||||||
UINT16 phase;
|
|
||||||
UINT16 type;
|
|
||||||
UINT32 faultAddr;
|
|
||||||
UINT32 thrdPid;
|
|
||||||
UINT16 nestCnt;
|
|
||||||
UINT16 reserved;
|
|
||||||
EXC_CONTEXT_S *context;
|
|
||||||
} ExcInfo;
|
|
||||||
|
|
||||||
#define MAX_INT_INFO_SIZE (8 + 0x164)
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
#if __cplusplus
|
|
||||||
}
|
|
||||||
#endif /* __cplusplus */
|
|
||||||
#endif /* __cplusplus */
|
|
||||||
|
|
||||||
#endif /* _LOS_ARCH_INTERRUPT_H */
|
|
||||||
|
|
@ -1,53 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
|
|
||||||
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
* are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice, this list of
|
|
||||||
* conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
|
|
||||||
* of conditions and the following disclaimer in the documentation and/or other materials
|
|
||||||
* provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
|
|
||||||
* to endorse or promote products derived from this software without specific prior written
|
|
||||||
* permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
|
||||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
|
||||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
|
||||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
|
||||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
|
||||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
|
||||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
|
||||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
|
||||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
|
||||||
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _LOS_ARCH_TIMER_H
|
|
||||||
#define _LOS_ARCH_TIMER_H
|
|
||||||
|
|
||||||
#include "los_config.h"
|
|
||||||
#include "los_compiler.h"
|
|
||||||
#include "los_timer.h"
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
#if __cplusplus
|
|
||||||
extern "C" {
|
|
||||||
#endif /* __cplusplus */
|
|
||||||
#endif /* __cplusplus */
|
|
||||||
|
|
||||||
UINT32 HalTickStart(void);
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
#if __cplusplus
|
|
||||||
}
|
|
||||||
#endif /* __cplusplus */
|
|
||||||
#endif /* __cplusplus */
|
|
||||||
|
|
||||||
#endif /* _LOS_ARCH_TIMER_H */
|
|
||||||
|
|
@ -1,165 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
|
|
||||||
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
* are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice, this list of
|
|
||||||
* conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
|
|
||||||
* of conditions and the following disclaimer in the documentation and/or other materials
|
|
||||||
* provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
|
|
||||||
* to endorse or promote products derived from this software without specific prior written
|
|
||||||
* permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
|
||||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
|
||||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
|
||||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
|
||||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
|
||||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
|
||||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
|
||||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
|
||||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
|
||||||
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*/
|
|
||||||
#include <stdio.h>
|
|
||||||
#include <assert.h>
|
|
||||||
#include "securec.h"
|
|
||||||
#include "los_arch_context.h"
|
|
||||||
#include "los_arch_interrupt.h"
|
|
||||||
#include "los_task.h"
|
|
||||||
#include "los_sched.h"
|
|
||||||
#include "los_interrupt.h"
|
|
||||||
#include "los_debug.h"
|
|
||||||
#include "los_context.h"
|
|
||||||
|
|
||||||
STATIC volatile UINT32 g_sysNeedSched = FALSE;
|
|
||||||
#define ATTRIBUTE_ISR __attribute__((isr))
|
|
||||||
|
|
||||||
/* ****************************************************************************
|
|
||||||
Function : ArchInit
|
|
||||||
Description : arch init function
|
|
||||||
Input : None
|
|
||||||
Output : None
|
|
||||||
Return : None
|
|
||||||
**************************************************************************** */
|
|
||||||
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
|
|
||||||
{
|
|
||||||
}
|
|
||||||
|
|
||||||
/* ****************************************************************************
|
|
||||||
Function : ArchSysExit
|
|
||||||
Description : Task exit function
|
|
||||||
Input : None
|
|
||||||
Output : None
|
|
||||||
Return : None
|
|
||||||
**************************************************************************** */
|
|
||||||
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
|
|
||||||
{
|
|
||||||
printf("\nArchSysExit\n");
|
|
||||||
while (1) {
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/* ****************************************************************************
|
|
||||||
Function : ArchTskStackRegInit
|
|
||||||
Description : Task exit function
|
|
||||||
Input : None
|
|
||||||
Output : None
|
|
||||||
Return : None
|
|
||||||
**************************************************************************** */
|
|
||||||
VOID ArchTskStackRegInit(TaskContext *context)
|
|
||||||
{
|
|
||||||
context->R1 = 0x01010101L;
|
|
||||||
context->R2 = 0x02020202L;
|
|
||||||
context->R3 = 0x03030303L;
|
|
||||||
context->R4 = 0x04040404L;
|
|
||||||
context->R5 = 0x05050505L;
|
|
||||||
context->R6 = 0x06060606L;
|
|
||||||
context->R7 = 0x07070707L;
|
|
||||||
context->R8 = 0x08080808L;
|
|
||||||
context->R9 = 0x09090909L;
|
|
||||||
context->R10 = 0x10101010L;
|
|
||||||
context->R11 = 0x11111111L;
|
|
||||||
context->R12 = 0x12121212L;
|
|
||||||
context->R13 = 0x13131313L;
|
|
||||||
context->R15 = 0xfffffffeL;
|
|
||||||
context->R16 = 0x16161616L;
|
|
||||||
context->R17 = 0x17171717L;
|
|
||||||
context->R18 = 0x18181818L;
|
|
||||||
context->R19 = 0x19191919L;
|
|
||||||
context->R20 = 0x20202020L;
|
|
||||||
context->R21 = 0x21212121L;
|
|
||||||
context->R22 = 0x22222222L;
|
|
||||||
context->R23 = 0x23232323L;
|
|
||||||
context->R24 = 0x24242424L;
|
|
||||||
context->R25 = 0x25252525L;
|
|
||||||
context->R26 = 0x26262626L;
|
|
||||||
context->R27 = 0x27272727L;
|
|
||||||
context->R28 = 0x28282828L;
|
|
||||||
context->R29 = 0x29292929L;
|
|
||||||
context->R30 = 0x30303030L;
|
|
||||||
context->R31 = 0x31313131L;
|
|
||||||
context->VR0 = 0x12345678L;
|
|
||||||
context->VR1 = 0x12345678L;
|
|
||||||
context->VR2 = 0x12345678L;
|
|
||||||
context->VR3 = 0x12345678L;
|
|
||||||
context->VR4 = 0x12345678L;
|
|
||||||
context->VR5 = 0x12345678L;
|
|
||||||
context->VR6 = 0x12345678L;
|
|
||||||
context->VR7 = 0x12345678L;
|
|
||||||
context->VR8 = 0x12345678L;
|
|
||||||
context->VR9 = 0x12345678L;
|
|
||||||
context->VR10 = 0x12345678L;
|
|
||||||
context->VR11 = 0x12345678L;
|
|
||||||
context->VR12 = 0x12345678L;
|
|
||||||
context->VR13 = 0x12345678L;
|
|
||||||
context->VR14 = 0x12345678L;
|
|
||||||
context->VR15 = 0x12345678L;
|
|
||||||
context->EPSR = 0x80000340L;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* ****************************************************************************
|
|
||||||
Function : ArchTskStackInit
|
|
||||||
Description : Task stack initialization function
|
|
||||||
Input : taskID --- TaskID
|
|
||||||
stackSize --- Total size of the stack
|
|
||||||
topStack --- Top of task's stack
|
|
||||||
Output : None
|
|
||||||
Return : Context pointer
|
|
||||||
**************************************************************************** */
|
|
||||||
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
|
|
||||||
{
|
|
||||||
TaskContext *context = NULL;
|
|
||||||
context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext));
|
|
||||||
context->R0 = taskID;
|
|
||||||
ArchTskStackRegInit(context);
|
|
||||||
context->EPC = (UINT32)OsTaskEntry;
|
|
||||||
return (VOID *)context;
|
|
||||||
}
|
|
||||||
|
|
||||||
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
|
|
||||||
{
|
|
||||||
(VOID)LOS_IntLock();
|
|
||||||
OsSchedStart();
|
|
||||||
HalStartToRun();
|
|
||||||
return LOS_OK; /* never return */
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
VOID HalIrqEndCheckNeedSched(VOID)
|
|
||||||
{
|
|
||||||
}
|
|
||||||
volatile int g_sysSchedCount = 0;
|
|
||||||
int *p_sysSchedCount = &g_sysSchedCount;
|
|
||||||
VOID ArchTaskSchedule(VOID)
|
|
||||||
{
|
|
||||||
HalTaskContextSwitch();
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
@ -1,129 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved.
|
|
||||||
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
* are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice, this list of
|
|
||||||
* conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
|
|
||||||
* of conditions and the following disclaimer in the documentation and/or other materials
|
|
||||||
* provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
|
|
||||||
* to endorse or promote products derived from this software without specific prior written
|
|
||||||
* permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
|
||||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
|
||||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
|
||||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
|
||||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
|
||||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
|
||||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
|
||||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
|
||||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
|
||||||
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*/
|
|
||||||
#include <csi_config.h>
|
|
||||||
|
|
||||||
#define VIC_TSPDR 0XE000EC08
|
|
||||||
#define OS_TASK_STATUS_RUNNING 0x0010
|
|
||||||
#define VIC_TSPDR 0XE000EC08
|
|
||||||
|
|
||||||
.section .text
|
|
||||||
.align 2
|
|
||||||
/********************************************************************
|
|
||||||
* Functions: HalTaskContextSwitch
|
|
||||||
*
|
|
||||||
********************************************************************/
|
|
||||||
.global HalTaskContextSwitch
|
|
||||||
.type HalTaskContextSwitch, %function
|
|
||||||
HalTaskContextSwitch:
|
|
||||||
lrw r0, VIC_TSPDR
|
|
||||||
bgeni r1, 0
|
|
||||||
stw r1, (r0)
|
|
||||||
nop
|
|
||||||
nop
|
|
||||||
nop
|
|
||||||
rts
|
|
||||||
|
|
||||||
.type HalStartToRun, %function
|
|
||||||
.global HalStartToRun
|
|
||||||
HalStartToRun:
|
|
||||||
psrclr ie
|
|
||||||
lrw r4, g_losTask
|
|
||||||
ld.w r4, (r4)
|
|
||||||
ld.w sp, (r4)
|
|
||||||
|
|
||||||
ldw r0, (sp, 192)
|
|
||||||
mtcr r0, epc
|
|
||||||
ldw r0, (sp, 188)
|
|
||||||
mtcr r0, epsr
|
|
||||||
|
|
||||||
ldm r0-r13, (sp)
|
|
||||||
ldw r15, (sp, 56)
|
|
||||||
addi sp, 60
|
|
||||||
ldm r16-r31, (sp)
|
|
||||||
addi sp, 64
|
|
||||||
fldms vr0-vr15, (sp)
|
|
||||||
addi sp, 72
|
|
||||||
|
|
||||||
rte
|
|
||||||
|
|
||||||
.align 2
|
|
||||||
.type tspend_handler, %function
|
|
||||||
.global tspend_handler
|
|
||||||
tspend_handler:
|
|
||||||
|
|
||||||
subi sp, 196
|
|
||||||
stm r0-r13, (sp)
|
|
||||||
stw r15, (sp, 56)
|
|
||||||
addi r0, sp, 60
|
|
||||||
stm r16-r31, (r0)
|
|
||||||
addi r0, 64
|
|
||||||
fstms vr0-vr15, (r0)
|
|
||||||
mfcr r1, epsr
|
|
||||||
stw r1, (r0, 64)
|
|
||||||
mfcr r1, epc
|
|
||||||
stw r1, (r0, 68)
|
|
||||||
|
|
||||||
jbsr OsSchedTaskSwitch
|
|
||||||
bez r0, ret_con
|
|
||||||
|
|
||||||
lrw r2, g_losTask
|
|
||||||
ldw r0, (r2)
|
|
||||||
stw sp, (r0)
|
|
||||||
|
|
||||||
lrw r3, g_losTask + 4
|
|
||||||
ldw r0, (r3)
|
|
||||||
stw r0, (r2)
|
|
||||||
|
|
||||||
#if 0
|
|
||||||
lrw r4, g_sysSchedCount
|
|
||||||
ldw r3, (r4, 0)
|
|
||||||
subi r3, 1
|
|
||||||
stw r3, (r4, 0)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
ldw sp, (r0)
|
|
||||||
|
|
||||||
ret_con:
|
|
||||||
ldw r0, (sp, 192)
|
|
||||||
mtcr r0, epc
|
|
||||||
ldw r0, (sp, 188)
|
|
||||||
mtcr r0, epsr
|
|
||||||
|
|
||||||
ldm r0-r13, (sp)
|
|
||||||
ldw r15, (sp, 56)
|
|
||||||
addi sp, 60
|
|
||||||
ldm r16-r31, (sp)
|
|
||||||
addi sp, 64
|
|
||||||
fldms vr0-vr15, (sp)
|
|
||||||
addi sp, 72
|
|
||||||
|
|
||||||
rte
|
|
||||||
|
|
||||||
|
|
@ -1,173 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
|
|
||||||
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
* are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice, this list of
|
|
||||||
* conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
|
|
||||||
* of conditions and the following disclaimer in the documentation and/or other materials
|
|
||||||
* provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
|
|
||||||
* to endorse or promote products derived from this software without specific prior written
|
|
||||||
* permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
|
||||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
|
||||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
|
||||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
|
||||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
|
||||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
|
||||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
|
||||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
|
||||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
|
||||||
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "los_interrupt.h"
|
|
||||||
#include <stdarg.h>
|
|
||||||
#include <csi_core.h>
|
|
||||||
#include "securec.h"
|
|
||||||
#include "los_context.h"
|
|
||||||
#include "los_arch_context.h"
|
|
||||||
#include "los_arch_interrupt.h"
|
|
||||||
#include "los_debug.h"
|
|
||||||
#include "los_hook.h"
|
|
||||||
#include "los_task.h"
|
|
||||||
#include "los_sched.h"
|
|
||||||
#include "los_memory.h"
|
|
||||||
#include "los_membox.h"
|
|
||||||
|
|
||||||
#define INT_OFFSET 6
|
|
||||||
#define PRI_OFF_PER_INT 8
|
|
||||||
#define PRI_PER_REG 4
|
|
||||||
#define PRI_OFF_IN_REG 6
|
|
||||||
#define PRI_BITS 2
|
|
||||||
#define PRI_HI 0
|
|
||||||
#define PRI_LOW 7
|
|
||||||
#define MASK_8_BITS 0xFF
|
|
||||||
#define MASK_32_BITS 0xFFFFFFFF
|
|
||||||
#define BYTES_OF_128_INT 4
|
|
||||||
|
|
||||||
#define OS_USER_HWI_MIN 0
|
|
||||||
#define OS_USER_HWI_MAX (LOSCFG_PLATFORM_HWI_LIMIT - 1)
|
|
||||||
#define HWI_ALIGNSIZE 0x400
|
|
||||||
|
|
||||||
UINT32 volatile g_intCount = 0;
|
|
||||||
CHAR g_trapStackBase[OS_TRAP_STACK_SIZE];
|
|
||||||
|
|
||||||
STATIC VIC_TYPE *VIC_REG = (VIC_TYPE *)VIC_REG_BASE;
|
|
||||||
|
|
||||||
UINT32 HwiNumValid(UINT32 num)
|
|
||||||
{
|
|
||||||
return ((num) >= OS_USER_HWI_MIN) && ((num) <= OS_USER_HWI_MAX);
|
|
||||||
}
|
|
||||||
|
|
||||||
UINT32 HalGetPsr(VOID)
|
|
||||||
{
|
|
||||||
UINT32 intSave;
|
|
||||||
__asm__ volatile("mfcr %0, psr" : "=r" (intSave) : : "memory");
|
|
||||||
return intSave;
|
|
||||||
}
|
|
||||||
|
|
||||||
UINT32 HalSetVbr(UINT32 intSave)
|
|
||||||
{
|
|
||||||
__asm__ volatile("mtcr %0, vbr" : : "r"(intSave) : "memory");
|
|
||||||
return intSave;
|
|
||||||
}
|
|
||||||
|
|
||||||
UINT32 ArchIntLock(VOID)
|
|
||||||
{
|
|
||||||
UINT32 flags = __get_PSR();
|
|
||||||
__disable_irq();
|
|
||||||
return flags;
|
|
||||||
}
|
|
||||||
|
|
||||||
UINT32 ArchIntUnLock(VOID)
|
|
||||||
{
|
|
||||||
UINT32 flags = __get_PSR();
|
|
||||||
__enable_irq();
|
|
||||||
return flags;
|
|
||||||
}
|
|
||||||
|
|
||||||
VOID ArchIntRestore(UINT32 intSave)
|
|
||||||
{
|
|
||||||
__asm__ __volatile__(
|
|
||||||
"mtcr %0, psr \n"
|
|
||||||
:
|
|
||||||
:"r" (intSave)
|
|
||||||
:"memory"
|
|
||||||
);
|
|
||||||
}
|
|
||||||
|
|
||||||
UINT32 ArchIntLocked(VOID)
|
|
||||||
{
|
|
||||||
UINT32 intSave;
|
|
||||||
__asm__ volatile("mfcr %0, psr" : "=r" (intSave) : : "memory");
|
|
||||||
return !(intSave & (1 << INT_OFFSET));
|
|
||||||
}
|
|
||||||
|
|
||||||
UINT32 ArchIsIntActive(VOID)
|
|
||||||
{
|
|
||||||
UINT32 intSave;
|
|
||||||
|
|
||||||
intSave = LOS_IntLock();
|
|
||||||
if (g_intCount > 0) {
|
|
||||||
LOS_IntRestore(intSave);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
LOS_IntRestore(intSave);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
|
|
||||||
|
|
||||||
/* *
|
|
||||||
* @ingroup los_hwi
|
|
||||||
* Set interrupt vector table.
|
|
||||||
*/
|
|
||||||
VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
|
|
||||||
{
|
|
||||||
if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
|
|
||||||
csi_vic_set_vector(num, vector);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#else
|
|
||||||
/* *
|
|
||||||
* @ingroup los_hwi
|
|
||||||
* Set interrupt vector table.
|
|
||||||
*/
|
|
||||||
VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
|
|
||||||
{
|
|
||||||
if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
|
|
||||||
csi_vic_set_vector(num, vector);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
int csi_kernel_intrpt_enter(void)
|
|
||||||
{
|
|
||||||
UINT32 intSave;
|
|
||||||
intSave = LOS_IntLock();
|
|
||||||
g_intCount++;
|
|
||||||
LOS_IntRestore(intSave);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
int csi_kernel_intrpt_exit(void)
|
|
||||||
{
|
|
||||||
UINT32 intSave;
|
|
||||||
|
|
||||||
intSave = LOS_IntLock();
|
|
||||||
if (g_intCount > 0) {
|
|
||||||
g_intCount--;
|
|
||||||
}
|
|
||||||
HalIrqEndCheckNeedSched();
|
|
||||||
LOS_IntRestore(intSave);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
@ -1,144 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
|
|
||||||
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
* are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice, this list of
|
|
||||||
* conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
|
|
||||||
* of conditions and the following disclaimer in the documentation and/or other materials
|
|
||||||
* provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
|
|
||||||
* to endorse or promote products derived from this software without specific prior written
|
|
||||||
* permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
|
||||||
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
|
||||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
|
|
||||||
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
|
||||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
|
||||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
|
||||||
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
|
||||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
|
||||||
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
|
||||||
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "los_timer.h"
|
|
||||||
#include "los_config.h"
|
|
||||||
#include "los_tick.h"
|
|
||||||
#include "los_arch_interrupt.h"
|
|
||||||
#include "los_debug.h"
|
|
||||||
|
|
||||||
typedef struct {
|
|
||||||
UINT32 CTRL;
|
|
||||||
UINT32 LOAD;
|
|
||||||
UINT32 VAL;
|
|
||||||
UINT32 CALIB;
|
|
||||||
} CORE_TIM_TYPE;
|
|
||||||
|
|
||||||
#define CORE_TIM_BASE (0xE000E010UL)
|
|
||||||
#define SysTick ((CORE_TIM_TYPE *)CORE_TIM_BASE)
|
|
||||||
|
|
||||||
STATIC VIC_TYPE *VIC_REG = (VIC_TYPE *)VIC_REG_BASE;
|
|
||||||
|
|
||||||
#define CORETIM_ENABLE (1UL << 0)
|
|
||||||
#define CORETIM_INTMASK (1UL << 1)
|
|
||||||
#define CORETIM_SOURCE (1UL << 2)
|
|
||||||
#define CORETIM_MODE (1UL << 16)
|
|
||||||
|
|
||||||
#define TIM_INT_NUM 25
|
|
||||||
|
|
||||||
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
|
|
||||||
STATIC VOID SysTickReload(UINT64 nextResponseTime);
|
|
||||||
STATIC UINT64 SysTickCycleGet(UINT32 *period);
|
|
||||||
STATIC VOID SysTickLock(VOID);
|
|
||||||
STATIC VOID SysTickUnlock(VOID);
|
|
||||||
|
|
||||||
STATIC ArchTickTimer g_archTickTimer = {
|
|
||||||
.freq = 0,
|
|
||||||
.irqNum = TIM_INT_NUM,
|
|
||||||
.init = SysTickStart,
|
|
||||||
.getCycle = SysTickCycleGet,
|
|
||||||
.reload = SysTickReload,
|
|
||||||
.lock = SysTickLock,
|
|
||||||
.unlock = SysTickUnlock,
|
|
||||||
.tickHandler = NULL,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* ****************************************************************************
|
|
||||||
Function : HalTickStart
|
|
||||||
Description : Configure Tick Interrupt Start
|
|
||||||
Input : none
|
|
||||||
output : none
|
|
||||||
return : LOS_OK - Success , or LOS_ERRNO_TICK_CFG_INVALID - failed
|
|
||||||
**************************************************************************** */
|
|
||||||
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
|
|
||||||
{
|
|
||||||
ArchTickTimer *tick = &g_archTickTimer;
|
|
||||||
|
|
||||||
tick->freq = OS_SYS_CLOCK;
|
|
||||||
|
|
||||||
SysTick->LOAD = (OS_CYCLE_PER_TICK - 1);
|
|
||||||
SysTick->VAL = 0;
|
|
||||||
SysTick->CTRL |= (CORETIM_SOURCE | CORETIM_ENABLE | CORETIM_INTMASK);
|
|
||||||
|
|
||||||
VIC_REG->IWER[0] = 0x1 << TIM_INT_NUM;
|
|
||||||
|
|
||||||
return LOS_OK;
|
|
||||||
}
|
|
||||||
|
|
||||||
STATIC VOID SysTickReload(UINT64 nextResponseTime)
|
|
||||||
{
|
|
||||||
SysTick->CTRL &= ~CORETIM_ENABLE;
|
|
||||||
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
|
|
||||||
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
|
||||||
SysTick->CTRL |= CORETIM_ENABLE;
|
|
||||||
}
|
|
||||||
|
|
||||||
STATIC UINT64 SysTickCycleGet(UINT32 *period)
|
|
||||||
{
|
|
||||||
UINT32 hwCycle;
|
|
||||||
UINT32 intSave = LOS_IntLock();
|
|
||||||
*period = SysTick->LOAD;
|
|
||||||
hwCycle = *period - SysTick->VAL;
|
|
||||||
LOS_IntRestore(intSave);
|
|
||||||
return (UINT64)hwCycle;
|
|
||||||
}
|
|
||||||
|
|
||||||
STATIC VOID SysTickLock(VOID)
|
|
||||||
{
|
|
||||||
SysTick->CTRL &= ~CORETIM_ENABLE;
|
|
||||||
}
|
|
||||||
|
|
||||||
STATIC VOID SysTickUnlock(VOID)
|
|
||||||
{
|
|
||||||
SysTick->CTRL |= CORETIM_ENABLE;
|
|
||||||
}
|
|
||||||
|
|
||||||
ArchTickTimer *ArchSysTickTimerGet(VOID)
|
|
||||||
{
|
|
||||||
return &g_archTickTimer;
|
|
||||||
}
|
|
||||||
|
|
||||||
VOID Wfi(VOID)
|
|
||||||
{
|
|
||||||
__asm__ volatile("wait");
|
|
||||||
}
|
|
||||||
|
|
||||||
VOID Dsb(VOID)
|
|
||||||
{
|
|
||||||
__asm__ volatile("sync" : : : "memory");
|
|
||||||
}
|
|
||||||
|
|
||||||
UINT32 ArchEnterSleep(VOID)
|
|
||||||
{
|
|
||||||
Dsb();
|
|
||||||
Wfi();
|
|
||||||
return LOS_OK;
|
|
||||||
}
|
|
||||||
|
|
@ -59,13 +59,33 @@ typedef struct TagTskContext {
|
||||||
UINT32 R12;
|
UINT32 R12;
|
||||||
UINT32 R13;
|
UINT32 R13;
|
||||||
UINT32 R15;
|
UINT32 R15;
|
||||||
|
#ifdef CPU_CK804
|
||||||
|
UINT32 R16;
|
||||||
|
UINT32 R17;
|
||||||
|
UINT32 R18;
|
||||||
|
UINT32 R19;
|
||||||
|
UINT32 R20;
|
||||||
|
UINT32 R21;
|
||||||
|
UINT32 R22;
|
||||||
|
UINT32 R23;
|
||||||
|
UINT32 R24;
|
||||||
|
UINT32 R25;
|
||||||
|
UINT32 R26;
|
||||||
|
UINT32 R27;
|
||||||
|
UINT32 R28;
|
||||||
|
UINT32 R29;
|
||||||
|
UINT32 R30;
|
||||||
|
UINT32 R31;
|
||||||
|
#endif
|
||||||
UINT32 EPSR;
|
UINT32 EPSR;
|
||||||
UINT32 EPC;
|
UINT32 EPC;
|
||||||
} TaskContext;
|
} TaskContext;
|
||||||
|
|
||||||
VOID HalStartToRun(VOID);
|
VOID HalStartToRun(VOID);
|
||||||
VOID HalTaskContextSwitch(VOID);
|
VOID HalTaskContextSwitch(VOID);
|
||||||
|
#ifndef CPU_CK804
|
||||||
VOID HalIrqEndCheckNeedSched(VOID);
|
VOID HalIrqEndCheckNeedSched(VOID);
|
||||||
|
#endif
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
#if __cplusplus
|
#if __cplusplus
|
||||||
|
|
|
||||||
|
|
@ -82,7 +82,7 @@ typedef VOID (**HWI_VECTOR_FUNC)(VOID);
|
||||||
* @ingroup los_arch_interrupt
|
* @ingroup los_arch_interrupt
|
||||||
* Count of interrupts.
|
* Count of interrupts.
|
||||||
*/
|
*/
|
||||||
extern UINT32 g_intCount;
|
extern volatile UINT32 g_intCount;
|
||||||
|
|
||||||
/* *
|
/* *
|
||||||
* @ingroup los_arch_interrupt
|
* @ingroup los_arch_interrupt
|
||||||
|
|
|
||||||
|
|
@ -38,7 +38,9 @@
|
||||||
#include "los_interrupt.h"
|
#include "los_interrupt.h"
|
||||||
#include "los_debug.h"
|
#include "los_debug.h"
|
||||||
|
|
||||||
|
#ifndef CPU_CK804
|
||||||
STATIC UINT32 g_sysNeedSched = FALSE;
|
STATIC UINT32 g_sysNeedSched = FALSE;
|
||||||
|
#endif
|
||||||
|
|
||||||
/* ****************************************************************************
|
/* ****************************************************************************
|
||||||
Function : ArchInit
|
Function : ArchInit
|
||||||
|
|
@ -93,8 +95,29 @@ LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VO
|
||||||
context->R11 = 0x11111111L;
|
context->R11 = 0x11111111L;
|
||||||
context->R12 = 0x12121212L;
|
context->R12 = 0x12121212L;
|
||||||
context->R13 = 0x13131313L;
|
context->R13 = 0x13131313L;
|
||||||
|
#ifdef CPU_CK804
|
||||||
|
context->R15 = (UINT32)ArchSysExit;
|
||||||
|
context->R16 = 0x16161616L;
|
||||||
|
context->R17 = 0x17171717L;
|
||||||
|
context->R18 = 0x18181818L;
|
||||||
|
context->R19 = 0x19191919L;
|
||||||
|
context->R20 = 0x20202020L;
|
||||||
|
context->R21 = 0x21212121L;
|
||||||
|
context->R22 = 0x22222222L;
|
||||||
|
context->R23 = 0x23232323L;
|
||||||
|
context->R24 = 0x24242424L;
|
||||||
|
context->R25 = 0x25252525L;
|
||||||
|
context->R26 = 0x26262626L;
|
||||||
|
context->R27 = 0x27272727L;
|
||||||
|
context->R28 = 0x28282828L;
|
||||||
|
context->R29 = 0x29292929L;
|
||||||
|
context->R30 = 0x30303030L;
|
||||||
|
context->R31 = 0x31313131L;
|
||||||
|
context->EPSR = 0x80000340L;
|
||||||
|
#else
|
||||||
context->R15 = (UINT32)ArchSysExit;
|
context->R15 = (UINT32)ArchSysExit;
|
||||||
context->EPSR = 0xe0000144L;
|
context->EPSR = 0xe0000144L;
|
||||||
|
#endif
|
||||||
context->EPC = (UINT32)OsTaskEntry;
|
context->EPC = (UINT32)OsTaskEntry;
|
||||||
return (VOID *)context;
|
return (VOID *)context;
|
||||||
}
|
}
|
||||||
|
|
@ -107,6 +130,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
|
||||||
return LOS_OK; /* never return */
|
return LOS_OK; /* never return */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifndef CPU_CK804
|
||||||
VOID HalIrqEndCheckNeedSched(VOID)
|
VOID HalIrqEndCheckNeedSched(VOID)
|
||||||
{
|
{
|
||||||
if (g_sysNeedSched && g_taskScheduled && LOS_CHECK_SCHEDULE) {
|
if (g_sysNeedSched && g_taskScheduled && LOS_CHECK_SCHEDULE) {
|
||||||
|
|
@ -132,3 +156,10 @@ VOID ArchTaskSchedule(VOID)
|
||||||
LOS_IntRestore(intSave);
|
LOS_IntRestore(intSave);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
#else
|
||||||
|
VOID ArchTaskSchedule(VOID)
|
||||||
|
{
|
||||||
|
HalTaskContextSwitch();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -32,6 +32,89 @@
|
||||||
#define OS_TASK_STATUS_RUNNING 0x0010
|
#define OS_TASK_STATUS_RUNNING 0x0010
|
||||||
#define VIC_TSPDR 0XE000EC08
|
#define VIC_TSPDR 0XE000EC08
|
||||||
|
|
||||||
|
#ifdef CPU_CK804
|
||||||
|
.section .text
|
||||||
|
.align 2
|
||||||
|
.type HalStartToRun, %function
|
||||||
|
.global HalStartToRun
|
||||||
|
HalStartToRun:
|
||||||
|
lrw r1, g_losTask
|
||||||
|
lrw r2, g_losTask + 4
|
||||||
|
|
||||||
|
ldw r0, (r2)
|
||||||
|
|
||||||
|
st.w r0, (r1)
|
||||||
|
st.w r0, (r2)
|
||||||
|
|
||||||
|
ldw sp, (r0)
|
||||||
|
|
||||||
|
ldw r0, (sp, 128)
|
||||||
|
mtcr r0, epc
|
||||||
|
ldw r0, (sp, 124)
|
||||||
|
mtcr r0, epsr
|
||||||
|
ldw r15, (sp, 56)
|
||||||
|
ldm r0-r13, (sp)
|
||||||
|
addi sp, 60
|
||||||
|
ldm r16-r31, (sp)
|
||||||
|
addi sp, 72
|
||||||
|
|
||||||
|
rte
|
||||||
|
|
||||||
|
.align 2
|
||||||
|
.type HalTaskContextSwitch, %function
|
||||||
|
.global HalTaskContextSwitch
|
||||||
|
HalTaskContextSwitch:
|
||||||
|
lrw r0, VIC_TSPDR
|
||||||
|
bgeni r1, 0
|
||||||
|
stw r1, (r0)
|
||||||
|
nop
|
||||||
|
nop
|
||||||
|
nop
|
||||||
|
rts
|
||||||
|
|
||||||
|
.align 2
|
||||||
|
.type tspend_handler, %function
|
||||||
|
.global tspend_handler
|
||||||
|
tspend_handler:
|
||||||
|
|
||||||
|
subi sp, 132
|
||||||
|
stm r0-r13, (sp)
|
||||||
|
stw r15, (sp, 56)
|
||||||
|
addi r0, sp, 60
|
||||||
|
stm r16-r31, (r0)
|
||||||
|
mfcr r1, epsr
|
||||||
|
stw r1, (sp, 124)
|
||||||
|
mfcr r1, epc
|
||||||
|
stw r1, (sp, 128)
|
||||||
|
|
||||||
|
jbsr OsSchedTaskSwitch
|
||||||
|
bez r0, ret_con
|
||||||
|
|
||||||
|
lrw r2, g_losTask
|
||||||
|
ldw r0, (r2)
|
||||||
|
stw sp, (r0)
|
||||||
|
|
||||||
|
lrw r3, g_losTask + 4
|
||||||
|
ldw r0, (r3)
|
||||||
|
stw r0, (r2)
|
||||||
|
|
||||||
|
ldw sp, (r0)
|
||||||
|
|
||||||
|
ret_con:
|
||||||
|
ldw r0, (sp, 128)
|
||||||
|
mtcr r0, epc
|
||||||
|
ldw r0, (sp, 124)
|
||||||
|
mtcr r0, epsr
|
||||||
|
ldw r15, (sp, 56)
|
||||||
|
ldm r0-r13, (sp)
|
||||||
|
addi sp, 60
|
||||||
|
ldm r16-r31, (sp)
|
||||||
|
|
||||||
|
addi sp, 72
|
||||||
|
|
||||||
|
rte
|
||||||
|
|
||||||
|
#else
|
||||||
.section .text
|
.section .text
|
||||||
.align 2
|
.align 2
|
||||||
.type HalStartToRun, %function
|
.type HalStartToRun, %function
|
||||||
|
|
@ -87,3 +170,4 @@ HalTaskContextSwitch:
|
||||||
|
|
||||||
rte
|
rte
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -32,6 +32,57 @@
|
||||||
.import HalExcHandleEntry
|
.import HalExcHandleEntry
|
||||||
.extern g_trapStackBase
|
.extern g_trapStackBase
|
||||||
|
|
||||||
|
#ifdef CPU_CK804
|
||||||
|
.section .text
|
||||||
|
.align 2
|
||||||
|
.global HandleEntry
|
||||||
|
HandleEntry:
|
||||||
|
mov r10, sp
|
||||||
|
lrw r14, g_trapStackBase
|
||||||
|
|
||||||
|
stm r0-r15, (sp)
|
||||||
|
stw r10, (sp, 56)
|
||||||
|
addi r0, sp, 64
|
||||||
|
stm r16-r31, (r0)
|
||||||
|
mfcr r0, epsr
|
||||||
|
stw r0, (sp, 128)
|
||||||
|
mfcr r0, epc
|
||||||
|
stw r0, (sp, 132)
|
||||||
|
mov r0, sp
|
||||||
|
|
||||||
|
mfcr r1, epc
|
||||||
|
|
||||||
|
mov sp, r10
|
||||||
|
lrw r2, HalExcHandleEntry
|
||||||
|
jmp r2
|
||||||
|
|
||||||
|
.section .text
|
||||||
|
.align 2
|
||||||
|
.global IrqEntry
|
||||||
|
IrqEntry:
|
||||||
|
psrset ee
|
||||||
|
subi sp, 136
|
||||||
|
stm r0-r15, (sp)
|
||||||
|
addi r0, sp, 64
|
||||||
|
stm r16-r31, (r0)
|
||||||
|
mfcr r0, epsr
|
||||||
|
stw r0, (sp, 128)
|
||||||
|
mfcr r0, epc
|
||||||
|
stw r0, (sp, 132)
|
||||||
|
|
||||||
|
jbsr HalInterrupt
|
||||||
|
|
||||||
|
ldw r0, (sp, 132)
|
||||||
|
mtcr r0, epc
|
||||||
|
ldw r0, (sp, 128)
|
||||||
|
bseti r0, r0, 6
|
||||||
|
mtcr r0, epsr
|
||||||
|
ldm r0-r15, (sp)
|
||||||
|
addi sp, 64
|
||||||
|
ldm r16-r31, (sp)
|
||||||
|
addi sp, 72
|
||||||
|
rte
|
||||||
|
#else
|
||||||
.section .text
|
.section .text
|
||||||
.align 2
|
.align 2
|
||||||
.global HandleEntry
|
.global HandleEntry
|
||||||
|
|
@ -75,3 +126,4 @@ IrqEntry:
|
||||||
ldm r0-r15, (sp)
|
ldm r0-r15, (sp)
|
||||||
addi sp, 72
|
addi sp, 72
|
||||||
rte
|
rte
|
||||||
|
#endif
|
||||||
|
|
@ -52,13 +52,12 @@
|
||||||
#define MASK_8_BITS 0xFF
|
#define MASK_8_BITS 0xFF
|
||||||
#define MASK_32_BITS 0xFFFFFFFF
|
#define MASK_32_BITS 0xFFFFFFFF
|
||||||
#define BYTES_OF_128_INT 4
|
#define BYTES_OF_128_INT 4
|
||||||
#define TIM_INT_NUM 1
|
|
||||||
|
|
||||||
#define OS_USER_HWI_MIN 0
|
#define OS_USER_HWI_MIN 0
|
||||||
#define OS_USER_HWI_MAX (LOSCFG_PLATFORM_HWI_LIMIT - 1)
|
#define OS_USER_HWI_MAX (LOSCFG_PLATFORM_HWI_LIMIT - 1)
|
||||||
#define HWI_ALIGNSIZE 0x400
|
#define HWI_ALIGNSIZE 0x400
|
||||||
|
|
||||||
UINT32 g_intCount = 0;
|
UINT32 volatile g_intCount = 0;
|
||||||
CHAR g_trapStackBase[OS_TRAP_STACK_SIZE];
|
CHAR g_trapStackBase[OS_TRAP_STACK_SIZE];
|
||||||
|
|
||||||
VIC_TYPE *VIC_REG = (VIC_TYPE *)VIC_REG_BASE;
|
VIC_TYPE *VIC_REG = (VIC_TYPE *)VIC_REG_BASE;
|
||||||
|
|
@ -334,7 +333,9 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
|
||||||
|
|
||||||
intSave = LOS_IntLock();
|
intSave = LOS_IntLock();
|
||||||
g_intCount--;
|
g_intCount--;
|
||||||
|
#ifndef CPU_CK804
|
||||||
HalIrqEndCheckNeedSched();
|
HalIrqEndCheckNeedSched();
|
||||||
|
#endif
|
||||||
LOS_IntRestore(intSave);
|
LOS_IntRestore(intSave);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -586,6 +587,10 @@ WEAK VOID __stack_chk_fail(VOID)
|
||||||
__builtin_return_address(0));
|
__builtin_return_address(0));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
WEAK void HalHwiHandleReInit(UINT32 hwiFormAddr)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
/* ****************************************************************************
|
/* ****************************************************************************
|
||||||
Function : HalHwiInit
|
Function : HalHwiInit
|
||||||
Description : initialization of the hardware interrupt
|
Description : initialization of the hardware interrupt
|
||||||
|
|
@ -604,6 +609,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
|
||||||
for (i = OS_SYS_VECTOR_CNT; i < (LOSCFG_PLATFORM_HWI_LIMIT + OS_SYS_VECTOR_CNT); i++) {
|
for (i = OS_SYS_VECTOR_CNT; i < (LOSCFG_PLATFORM_HWI_LIMIT + OS_SYS_VECTOR_CNT); i++) {
|
||||||
g_hwiForm[i] = (HWI_PROC_FUNC)IrqEntry;
|
g_hwiForm[i] = (HWI_PROC_FUNC)IrqEntry;
|
||||||
}
|
}
|
||||||
|
HalHwiHandleReInit((UINT32)&g_hwiForm);
|
||||||
|
|
||||||
HalSetVbr((UINT32)&g_hwiForm);
|
HalSetVbr((UINT32)&g_hwiForm);
|
||||||
for (int i = 0; i < BYTES_OF_128_INT; i++) {
|
for (int i = 0; i < BYTES_OF_128_INT; i++) {
|
||||||
|
|
|
||||||
|
|
@ -50,7 +50,11 @@ typedef struct {
|
||||||
#define CORETIM_SOURCE (1UL << 2)
|
#define CORETIM_SOURCE (1UL << 2)
|
||||||
#define CORETIM_MODE (1UL << 16)
|
#define CORETIM_MODE (1UL << 16)
|
||||||
|
|
||||||
|
#ifdef CPU_CK804
|
||||||
|
#define TIM_INT_NUM 25
|
||||||
|
#else
|
||||||
#define TIM_INT_NUM 1
|
#define TIM_INT_NUM 1
|
||||||
|
#endif
|
||||||
|
|
||||||
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
|
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
|
||||||
STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
|
STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue