feat: synchronizing arch api
命名规范:修改少量Arch接口,命名规范化调整: 1.修改arch/include下接口声明,所有arch对外提供调用函数均以ArchXX命名 2.提取多个架构均有实现的公共函数声明至arch/include对应头文件中以供外部调用,并修改命名格式为ArchXX 3.修改OS_HWI_WITH_ARG为LOSCFG_PLATFORM_HWI_WITH_ARG并移至los_config.h中 4.typedef VOID (*OS_TICK_HANDLER)(VOID);暂时移至arch/include/los_timer.h中 5.实现atomic原子操作相关接口,位于arch/include/los_atomic.h,arm架构部分与汇编指令相关原子操作接口使用ARCH_ARM宏进行控制是否编译 BREAKING CHANGE: 1.修改arch/include下接口,以ArchXX命名函数 2.提取公共函数声明:ArchAtomicXchg32bits、ArchAtomicDecRet、ArchAtomicCmpXchg32bits 3.新增部分原子操作c内联实现 Close #I4N7XV Signed-off-by: LiteOS2021 <dinglu@huawei.com>
This commit is contained in:
@@ -1,143 +0,0 @@
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/*
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* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
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* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice, this list
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* of conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _LOS_ARCH_ATOMIC_H
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#define _LOS_ARCH_ATOMIC_H
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#include "los_compiler.h"
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#ifdef __cplusplus
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#if __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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#endif /* __cplusplus */
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/**
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* @ingroup los_arch_atomic
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* @brief Atomic exchange for 32-bit variable.
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*
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* @par Description:
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* This API is used to implement the atomic exchange for 32-bit variable.
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* @attention
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* <ul>The pointer v must not be NULL.</ul>
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*
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* @param v [IN] The variable pointer.
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* @param val [IN] The exchange value.
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*
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* @retval #INT32 The previous value of the atomic variable
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* @par Dependency:
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* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
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* @see
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*/
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STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
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{
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UINT32 intSave;
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INT32 prevVal;
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intSave = LOS_IntLock();
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prevVal = *v;
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*v = val;
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LOS_IntRestore(intSave);
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return prevVal;
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}
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/**
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* @ingroup los_arch_atomic
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* @brief Atomic auto-decrement.
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*
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* @par Description:
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* This API is used to implement the atomic auto-decrement and return the result of auto-decrement.
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* @attention
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* <ul>
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* <li>The pointer v must not be NULL.</li>
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* <li>The value which v point to must not be INT_MIN to avoid overflow after reducing 1.</li>
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* </ul>
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*
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* @param v [IN] The addSelf variable pointer.
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*
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* @retval #INT32 The return value of variable auto-decrement.
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* @par Dependency:
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* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
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* @see
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*/
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STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
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{
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UINT32 intSave;
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intSave = LOS_IntLock();
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*v -= 1;
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LOS_IntRestore(intSave);
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return intSave;
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}
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/**
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* @ingroup los_arch_atomic
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* @brief Atomic exchange for 32-bit variable with compare.
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*
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* @par Description:
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* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
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* @attention
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* <ul>The pointer v must not be NULL.</ul>
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*
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* @param v [IN] The variable pointer.
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* @param val [IN] The new value.
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* @param oldVal [IN] The old value.
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*
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* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
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* @retval FALSE The previous value of the atomic variable is equal to oldVal.
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* @par Dependency:
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* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
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* @see
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*/
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STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
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{
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UINT32 intSave;
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INT32 prevVal;
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intSave = LOS_IntLock();
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prevVal = *v;
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if (prevVal == oldVal) {
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*v = val;
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}
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LOS_IntRestore(intSave);
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return (prevVal != oldVal);
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}
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#ifdef __cplusplus
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#if __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* __cplusplus */
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#endif /* _LOS_ARCH_ATOMIC_H */
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@@ -199,7 +199,7 @@ extern UINT32 g_intCount;
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*/
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#define OS_ERRNO_HWI_FASTMODE_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x07)
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#if (OS_HWI_WITH_ARG == 1)
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#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
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/* *
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* @ingroup los_arch_interrupt
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* Set interrupt vector table.
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@@ -34,7 +34,7 @@
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#include "los_config.h"
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#include "los_compiler.h"
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#include "los_context.h"
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#include "los_timer.h"
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#ifdef __cplusplus
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#if __cplusplus
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@@ -96,19 +96,19 @@ UINT32 g_stackDefault[] = {
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0x00000000, /* REG_OFF_SPILL_RESERVED */
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};
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LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
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LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
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{
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HalHwiInit();
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}
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LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
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LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
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{
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LOS_IntLock();
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while (1) {
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}
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}
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LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
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LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
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{
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TaskContext *context = NULL;
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errno_t result;
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@@ -141,7 +141,7 @@ VOID HalStartToRun(VOID)
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__asm__ volatile ("call0 OsStartToRun");
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}
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LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID)
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LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
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{
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UINT32 ret;
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@@ -157,7 +157,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID)
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return LOS_OK;
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}
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VOID HalTaskSchedule(VOID)
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VOID ArchTaskSchedule(VOID)
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{
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UINT32 intSave;
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@@ -180,6 +180,6 @@ VOID HalTaskSchedule(VOID)
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VOID HalIrqEndCheckNeedSched(VOID)
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{
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if (g_sysNeedSched && g_taskScheduled && LOS_CHECK_SCHEDULE) {
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HalTaskSchedule();
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ArchTaskSchedule();
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}
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}
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@@ -50,7 +50,7 @@ UINT32 g_intCount = 0;
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*/
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STATIC HWI_PROC_FUNC __attribute__((aligned(0x100))) g_hwiForm[OS_VECTOR_CNT] = {0};
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#if (OS_HWI_WITH_ARG == 1)
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#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
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typedef struct {
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HWI_PROC_FUNC pfnHandler;
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@@ -105,7 +105,7 @@ UINT32 HwiNumValid(UINT32 num)
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* @ingroup los_hwi
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* Lock all interrupt.
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*/
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UINT32 HalIntLock(VOID)
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UINT32 ArchIntLock(VOID)
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{
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UINT32 ret;
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@@ -117,7 +117,7 @@ UINT32 HalIntLock(VOID)
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* @ingroup los_hwi
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* Restore interrupt status.
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*/
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VOID HalIntRestore(UINT32 intSave)
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VOID ArchIntRestore(UINT32 intSave)
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{
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__asm__ volatile("wsr.ps %0; rsync" : : "r"(intSave) : "memory");
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}
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@@ -126,7 +126,7 @@ VOID HalIntRestore(UINT32 intSave)
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* @ingroup los_hwi
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* Unlock interrupt.
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*/
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UINT32 HalIntUnLock(VOID)
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UINT32 ArchIntUnLock(VOID)
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{
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UINT32 intSave;
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@@ -139,7 +139,7 @@ UINT32 HalIntUnLock(VOID)
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* @ingroup los_hwi
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* Determine if the interrupt is locked
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*/
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STATIC INLINE UINT32 HalIntLocked(VOID)
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STATIC INLINE UINT32 ArchIntLocked(VOID)
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{
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UINT32 intSave;
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__asm__ volatile("rsr %0, ps " : "=r"(intSave) : : "memory");
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@@ -234,7 +234,7 @@ UINT32 HalIrqClear(HWI_HANDLE_T vector)
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return LOS_OK;
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}
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INLINE UINT32 HalIsIntActive(VOID)
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INLINE UINT32 ArchIsIntActive(VOID)
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{
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return (g_intCount > 0);
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}
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@@ -286,7 +286,7 @@ VOID HalInterrupt(VOID)
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HalPreInterruptHandler(hwiIndex);
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#if (OS_HWI_WITH_ARG == 1)
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#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
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if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
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g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
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}
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@@ -307,7 +307,7 @@ VOID HalInterrupt(VOID)
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}
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/* ****************************************************************************
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Function : HalHwiCreate
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Function : ArchHwiCreate
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Description : create hardware interrupt
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Input : hwiNum --- hwi num to create
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hwiPrio --- priority of the hwi
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@@ -317,11 +317,11 @@ VOID HalInterrupt(VOID)
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Output : None
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Return : LOS_OK on success or error code on failure
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**************************************************************************** */
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UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
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HWI_PRIOR_T hwiPrio,
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HWI_MODE_T mode,
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HWI_PROC_FUNC handler,
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HWI_ARG_T arg)
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UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
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HWI_PRIOR_T hwiPrio,
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HWI_MODE_T mode,
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HWI_PROC_FUNC handler,
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HWI_ARG_T arg)
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{
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UINT32 intSave;
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@@ -342,7 +342,7 @@ UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
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}
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intSave = LOS_IntLock();
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#if (OS_HWI_WITH_ARG == 1)
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#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
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OsSetVector(hwiNum, handler, arg);
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#else
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OsSetVector(hwiNum, handler);
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@@ -355,13 +355,13 @@ UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
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}
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/* ****************************************************************************
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Function : HalHwiDelete
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Function : ArchHwiDelete
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Description : Delete hardware interrupt
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Input : hwiNum --- hwi num to delete
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Output : None
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Return : LOS_OK on success or error code on failure
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**************************************************************************** */
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LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
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LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
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{
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UINT32 intSave;
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@@ -522,7 +522,7 @@ VOID HalExcHandleEntry(UINTPTR faultAddr, EXC_CONTEXT_S *excBufAddr, UINT32 type
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OsDoExcHook(EXC_INTERRUPT);
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OsExcInfoDisplay(&g_excInfo);
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HalSysExit();
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ArchSysExit();
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}
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/* Stack protector */
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@@ -82,7 +82,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
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}
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#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
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#if (OS_HWI_WITH_ARG == 1)
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#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
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OsSetVector(OS_TICK_INT_NUM, (HWI_PROC_FUNC)handler, NULL);
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#else
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OsSetVector(OS_TICK_INT_NUM, (HWI_PROC_FUNC)handler);
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@@ -102,7 +102,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
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return LOS_OK;
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}
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WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
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WEAK VOID ArchSysTickReload(UINT64 nextResponseTime)
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{
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UINT32 timerL;
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timerL = GetCcount();
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@@ -110,7 +110,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
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SetCcompare(timerL);
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}
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WEAK UINT64 HalGetTickCycle(UINT32 *period)
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WEAK UINT64 ArchGetTickCycle(UINT32 *period)
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{
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UINT32 tickCycleH;
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UINT32 tickCycleL;
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@@ -132,12 +132,12 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period)
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return tickCycle;
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}
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WEAK VOID HalTickLock(VOID)
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WEAK VOID ArchTickLock(VOID)
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{
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HalIrqMask(OS_TICK_INT_NUM);
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}
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WEAK VOID HalTickUnlock(VOID)
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WEAK VOID ArchTickUnlock(VOID)
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{
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HalIrqUnmask(OS_TICK_INT_NUM);
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}
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@@ -152,7 +152,7 @@ VOID Dsb(VOID)
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__asm__ volatile("dsync" : : : "memory");
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}
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UINT32 HalEnterSleep(VOID)
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UINT32 ArchEnterSleep(VOID)
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{
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Dsb();
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Wfi();
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