e748fdbe57
1.【需求描述】： 支持内核态和用户态堆内存非法访问检测，包括：越界访问、double free、释放后使用；支持libc常用高频函数内存检测；支持安全函数内存检测；读写检测可配可裁剪。 2.【方案描述】： L0 ~ L1: (1).影子内存映射与标记 (2).编译器使能-fsanitize=kernel-address 自动插桩检测点 (3).实时校验影子内存的合法性； (4).错误访问打印回溯栈 BREAKING CHANGE: 新增支持API: LOS_LmsCheckPoolAdd使能检测指定内存池 LOS_LmsCheckPoolDel不检测指定内存池 LOS_LmsAddrProtect为指定内存段上锁，不允许访问 LOS_LmsAddrDisableProtect去能指定内存段的访问保护 Close #I4HYAV Signed-off-by: LiteOS2021 <dinglu@huawei.com> Change-Id: Id8e5c890656da9edc4a22227e6a3c32205c024ce
137 lines
3.6 KiB
ArmAsm
137 lines
3.6 KiB
ArmAsm
/*
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* Copyright (c) 2021-2021 Huawei Device Co., Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice, this list
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* of conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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.syntax unified
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.arch armv7-a
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.fpu neon
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#define FUNCTION(x) \
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.globl x; \
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.p2align 2; \
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.type x,%function; \
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x:
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#if defined(LOSCFG_KERNEL_LMS)
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FUNCTION(__memset)
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#else
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FUNCTION(memset)
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#endif
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@ r0 = address
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@ r1 = char
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@ r2 = count
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@ returns original address in r0
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.fnstart
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push {r4}
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cmp r2, #0
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beq Lreturn
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vdup.8 q0, r1
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mov r4, r0 @ r4 = r0 = address
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L64_byte_alignment:
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ands r3, r0, #7
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beq L64_byte_aligned
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rsb r3, r3, #8 @ r3 = unalignedCnt = 8 - (address % 7)
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cmp r2, r3
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movlo r3, r2
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sub r2, r2, r3
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Lloop1:
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strb r1, [r4], #1
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subs r3, r3, #1
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bgt Lloop1
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/**
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* Set 64 bytes each time, and use floating-point registers to improve efficiency.
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*/
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L64_byte_aligned:
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vmov q1, q0
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vmov q2, q0
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cmp r2, #64
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blo L32_byte_aligned
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vmov q3, q0
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sub r2, r2, #64
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Lloop2:
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vstmia r4!, {d0 - d7}
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subs r2, r2, #64
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bgt Lloop2
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/**
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* The dichotomy handles the case of less than 64 bytes,
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* and the front will subtract 64 more, and you need to make it up at this time.
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*/
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add r2, r2, #64
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L32_byte_aligned:
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cmp r2, #0
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beq Lreturn
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cmp r2, #32
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blo L16_byte_aligned
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sub r2, r2, #32
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vstmia r4!, {d0 - d3}
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L16_byte_aligned:
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cmp r2, #0
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beq Lreturn
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cmp r2, #16
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blo L8_byte_aligned
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sub r2, r2, #16
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vstmia r4!, {d0 - d1}
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L8_byte_aligned:
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cmp r2, #0
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beq Lreturn
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cmp r2, #8
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blo L4_byte_aligned
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sub r2, r2, #8
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vstmia r4!, {d0}
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L4_byte_aligned:
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cmp r2, #0
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beq Lreturn
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cmp r2, #4
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blo Lless_4_byte
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sub r2, r2, #4
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vst1.32 {d0[0]}, [r4]!
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Lless_4_byte:
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cmp r2, #0
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beq Lreturn
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strb r1, [r4], #1
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sub r2, r2, #1
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b Lless_4_byte
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Lreturn:
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pop {r4}
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bx lr
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Lfunc_end:
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.size memset, Lfunc_end - memset
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.cantunwind
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.fnend @ -- End function
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