yystopf/openharmony_kernel_liteos_a
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fix: 编码规范修改

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1.拼写错误
2.未使用的参数使用void
3.删除lint相关注释
4.函数返回值处理

Signed-off-by: zhushengle <zhushengle@huawei.com>
Change-Id: I155d786172d62f47d940b32b0a1b36406d3c047f
This commit is contained in:
zhushengle
2022-03-21 11:58:38 +08:00
parent ba727e2678
commit d161a0b03d
98 changed files with 443 additions and 289 deletions
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8
arch/arm/arm/include/los_atomic.h
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@@ -246,7 +246,7 @@ STATIC INLINE INT32 LOS_AtomicIncRet(Atomic *v)
* @brief Atomic auto-decrement.
*
* @par Description:
* This API is used to implementating the atomic auto-decrement.
* This API is used to implement the atomic auto-decrement.
* @attention
* <ul>
* <li>The pointer v must not be NULL.</li>
@@ -280,7 +280,7 @@ STATIC INLINE VOID LOS_AtomicDec(Atomic *v)
* @brief Atomic auto-decrement.
*
* @par Description:
* This API is used to implementating the atomic auto-decrement and return the result of auto-decrement.
* This API is used to implement the atomic auto-decrement and return the result of auto-decrement.
* @attention
* <ul>
* <li>The pointer v must not be NULL.</li>
@@ -531,7 +531,7 @@ STATIC INLINE INT64 LOS_Atomic64IncRet(Atomic64 *v)
* @brief Atomic64 auto-decrement.
*
* @par Description:
* This API is used to implementating the atomic64 auto-decrement.
* This API is used to implement the atomic64 auto-decrement.
* @attention
* <ul>
* <li>The pointer v must not be NULL.</li>
@@ -566,7 +566,7 @@ STATIC INLINE VOID LOS_Atomic64Dec(Atomic64 *v)
* @brief Atomic64 auto-decrement.
*
* @par Description:
* This API is used to implementating the atomic64 auto-decrement and return the result of auto-decrement.
* This API is used to implement the atomic64 auto-decrement and return the result of auto-decrement.
* @attention
* <ul>
* <li>The pointer v must not be NULL.</li>

4
arch/arm/gic/gic_v2.c
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@@ -119,12 +119,12 @@ VOID HalIrqInit(VOID)
{
UINT32 i;
/* set externel interrupts to be level triggered, active low. */
/* set external interrupts to be level triggered, active low. */
for (i = 32; i < OS_HWI_MAX_NUM; i += 16) {
GIC_REG_32(GICD_ICFGR(i / 16)) = 0;
}
/* set externel interrupts to CPU 0 */
/* set external interrupts to CPU 0 */
for (i = 32; i < OS_HWI_MAX_NUM; i += 4) {
GIC_REG_32(GICD_ITARGETSR(i / 4)) = 0x01010101;
}

2
arch/arm/gic/gic_v3.c
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@@ -362,7 +362,7 @@ VOID HalIrqInit(VOID)
GicWaitForRwp(GICD_CTLR);
ISB;
/* set externel interrupts to be level triggered, active low. */
/* set external interrupts to be level triggered, active low. */
for (i = 32; i < OS_HWI_MAX_NUM; i += 16) {
GIC_REG_32(GICD_ICFGR(i / 16)) = 0;
}

4
arch/arm/include/gic_common.h
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@@ -77,8 +77,8 @@ enum {
#define GICD_PIDR2V3 (GICD_OFFSET + 0xffe8)
#ifdef LOSCFG_ARCH_GIC_V3
#define GICD_IGRPMODR(n) (GICD_OFFSET + 0x0d00 + (n) * 4) /* Interrupt Group Mode Reisters */
#define GICD_IROUTER(n) (GICD_OFFSET + 0x6000 + (n) * 8) /* Interrupt Rounter Reisters */
#define GICD_IGRPMODR(n) (GICD_OFFSET + 0x0d00 + (n) * 4) /* Interrupt Group Mode Registers */
#define GICD_IROUTER(n) (GICD_OFFSET + 0x6000 + (n) * 8) /* Interrupt Rounter Registers */
#endif
#define GIC_REG_8(reg) (*(volatile UINT8 *)((UINTPTR)(GIC_BASE_ADDR + (reg))))

0
arch/arm/include/gic_v3.h Executable file → Normal file
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