update openharmony 1.0.1
This commit is contained in:
4
platform/hw/arm/interrupt/gic/gic_v2.c
Normal file → Executable file
4
platform/hw/arm/interrupt/gic/gic_v2.c
Normal file → Executable file
@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
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* Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
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* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
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* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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4
platform/hw/arm/interrupt/gic/gic_v3.c
Normal file → Executable file
4
platform/hw/arm/interrupt/gic/gic_v3.c
Normal file → Executable file
@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
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* Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
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* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
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* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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33
platform/hw/arm/timer/arm_generic/arm_generic_timer.c
Normal file → Executable file
33
platform/hw/arm/timer/arm_generic/arm_generic_timer.c
Normal file → Executable file
@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
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* Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
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* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
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* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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@@ -31,6 +31,7 @@
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#include "los_hw_pri.h"
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#include "los_tick_pri.h"
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#include "los_sched_pri.h"
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#include "los_sys_pri.h"
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#include "gic_common.h"
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@@ -87,8 +88,6 @@
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#endif
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#define OS_CYCLE_PER_TICK (g_sysClock / LOSCFG_BASE_CORE_TICK_PER_SECOND)
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UINT32 HalClockFreqRead(VOID)
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{
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return READ_TIMER_REG32(TIMER_REG_CNTFRQ);
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@@ -127,27 +126,12 @@ UINT64 HalClockGetCycles(VOID)
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return cntpct;
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}
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LITE_OS_SEC_TEXT VOID OsTickEntry(VOID)
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{
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TimerCtlWrite(0);
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OsTickHandler();
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/*
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* use last cval to generate the next tick's timing is
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* absolute and accurate. DO NOT use tval to drive the
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* generic time in which case tick will be slower.
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*/
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TimerCvalWrite(TimerCvalRead() + OS_CYCLE_PER_TICK);
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TimerCtlWrite(1);
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}
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LITE_OS_SEC_TEXT_INIT VOID HalClockInit(VOID)
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{
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UINT32 ret;
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g_sysClock = HalClockFreqRead();
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ret = LOS_HwiCreate(OS_TICK_INT_NUM, MIN_INTERRUPT_PRIORITY, 0, OsTickEntry, 0);
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ret = LOS_HwiCreate(OS_TICK_INT_NUM, MIN_INTERRUPT_PRIORITY, 0, OsTickHandler, 0);
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if (ret != LOS_OK) {
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PRINT_ERR("%s, %d create tick irq failed, ret:0x%x\n", __FUNCTION__, __LINE__, ret);
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}
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@@ -155,6 +139,11 @@ LITE_OS_SEC_TEXT_INIT VOID HalClockInit(VOID)
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LITE_OS_SEC_TEXT_INIT VOID HalClockStart(VOID)
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{
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UINT32 ret = OsSchedSetTickTimerType(64); /* 64 bit tick timer */
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if (ret != LOS_OK) {
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return;
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}
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HalIrqUnmask(OS_TICK_INT_NUM);
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/* triggle the first tick */
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@@ -165,7 +154,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalClockStart(VOID)
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VOID HalDelayUs(UINT32 usecs)
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{
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UINT64 cycles = (UINT64)usecs * HalClockFreqRead() / OS_SYS_US_PER_SECOND;
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UINT64 cycles = (UINT64)usecs * g_sysClock / OS_SYS_US_PER_SECOND;
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UINT64 deadline = HalClockGetCycles() + cycles;
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while (HalClockGetCycles() < deadline) {
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@@ -186,7 +175,7 @@ UINT32 HalClockGetTickTimerCycles(VOID)
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return (UINT32)((cval > cycles) ? (cval - cycles) : 0);
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}
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VOID HalClockTickTimerReload(UINT32 cycles)
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VOID HalClockTickTimerReload(UINT64 cycles)
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{
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HalIrqMask(OS_TICK_INT_NUM);
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HalIrqClear(OS_TICK_INT_NUM);
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@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2013-2019, Huawei Technologies Co., Ltd. All rights reserved.
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* Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved.
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* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
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* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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@@ -31,6 +31,7 @@
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#include "asm/platform.h"
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#include "los_hwi.h"
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#include "los_sched_pri.h"
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#include "los_tick_pri.h"
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#define OS_CYCLE_PER_TICK (TIMER_FREQ / LOSCFG_BASE_CORE_TICK_PER_SECOND)
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@@ -67,6 +68,11 @@ VOID HalClockFreqWrite(UINT32 freq)
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VOID HalClockStart(VOID)
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{
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UINT32 ret = OsSchedSetTickTimerType(32); /* 32 bit tick timer */
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if (ret != LOS_OK) {
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return;
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}
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HalIrqUnmask(PRVTIMER_INT_NUM);
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g_privateTimer->load = OS_CYCLE_PER_TICK;
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@@ -124,12 +130,12 @@ UINT32 HalClockGetTickTimerCycles(VOID)
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return g_privateTimer->count;
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}
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VOID HalClockTickTimerReload(UINT32 period)
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VOID HalClockTickTimerReload(UINT64 period)
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{
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HalIrqUnmask(PRVTIMER_INT_NUM);
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/* set control counter regs to defaults */
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g_privateTimer->load = period;
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g_privateTimer->load = (UINT32)period;
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g_privateTimer->control = 0x06; /* IAE bits = 110, not eanbled yet */
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g_privateTimer->control |= 0x01; /* reenable private timer */
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}
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