diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f7775a1e..f87fa49c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -82,17 +82,17 @@ config ARCH_CPU choice prompt "GIC version" - default PLATFORM_BSP_GIC_V2 + default ARCH_GIC_V2 help Interrupt Controller. -config PLATFORM_BSP_GIC_V2 +config ARCH_GIC_V2 bool "GIC Version 2" help This GIC(General Interrupt Controller) version 2 driver is compatatble with GIC version 1 and version 2. -config PLATFORM_BSP_GIC_V3 +config ARCH_GIC_V3 bool "GIC Version 3" depends on ARCH_ARM_V8A || ARCH_ARM_V8R help diff --git a/arch/arm/gic/Makefile b/arch/arm/gic/Makefile index 3a14bc14..76218e41 100755 --- a/arch/arm/gic/Makefile +++ b/arch/arm/gic/Makefile @@ -33,9 +33,9 @@ MODULE_NAME := $(notdir $(shell pwd)) # LOCAL_SRCS := $(wildcard *.c) -ifeq ($(LOSCFG_PLATFORM_BSP_GIC_V2), y) +ifeq ($(LOSCFG_ARCH_GIC_V2), y) LOCAL_SRCS := gic_v2.c -else ifeq ($(LOSCFG_PLATFORM_BSP_GIC_V3), y) +else ifeq ($(LOSCFG_ARCH_GIC_V3), y) LOCAL_SRCS := gic_v3.c endif diff --git a/arch/arm/gic/gic_v2.c b/arch/arm/gic/gic_v2.c index 1b30d2db..75c23219 100644 --- a/arch/arm/gic/gic_v2.c +++ b/arch/arm/gic/gic_v2.c @@ -36,7 +36,7 @@ STATIC_ASSERT(OS_USER_HWI_MAX <= 1020, "hwi max is too large!"); -#ifdef LOSCFG_PLATFORM_BSP_GIC_V2 +#ifdef LOSCFG_ARCH_GIC_V2 STATIC UINT32 g_curIrqNum = 0; diff --git a/arch/arm/gic/gic_v3.c b/arch/arm/gic/gic_v3.c index 61049f38..03b8cfd8 100644 --- a/arch/arm/gic/gic_v3.c +++ b/arch/arm/gic/gic_v3.c @@ -36,7 +36,7 @@ #include "los_hwi_pri.h" #include "los_mp.h" -#ifdef LOSCFG_PLATFORM_BSP_GIC_V3 +#ifdef LOSCFG_ARCH_GIC_V3 STATIC UINT32 g_curIrqNum = 0; diff --git a/arch/arm/include/gic_common.h b/arch/arm/include/gic_common.h index 3a72a9c8..fe5a3d16 100644 --- a/arch/arm/include/gic_common.h +++ b/arch/arm/include/gic_common.h @@ -47,7 +47,7 @@ enum { #define GIC_REV_MASK 0xF0 #define GIC_REV_OFFSET 0x4 -#ifdef LOSCFG_PLATFORM_BSP_GIC_V2 +#ifdef LOSCFG_ARCH_GIC_V2 #define GICC_CTLR (GICC_OFFSET + 0x00) /* CPU Interface Control Register */ #define GICC_PMR (GICC_OFFSET + 0x04) /* Interrupt Priority Mask Register */ #define GICC_BPR (GICC_OFFSET + 0x08) /* Binary Point Register */ @@ -76,7 +76,7 @@ enum { #define GICD_PIDR2V2 (GICD_OFFSET + 0xfe8) #define GICD_PIDR2V3 (GICD_OFFSET + 0xffe8) -#ifdef LOSCFG_PLATFORM_BSP_GIC_V3 +#ifdef LOSCFG_ARCH_GIC_V3 #define GICD_IGRPMODR(n) (GICD_OFFSET + 0x0d00 + (n) * 4) /* Interrupt Group Mode Reisters */ #define GICD_IROUTER(n) (GICD_OFFSET + 0x6000 + (n) * 8) /* Interrupt Rounter Reisters */ #endif