From 947e27ddbfeea976deb3716ff89f7793f5d7a2f3 Mon Sep 17 00:00:00 2001
From: Yan_yan <yanyan0731@163.com>
Date: Thu, 29 Oct 2020 15:05:31 +0800
Subject: [PATCH] modify the dir under  processor

---
 docs/.vuepress/sidebar.js          | 7 ++++---
 docs/doc/processor/README.md       | 4 ++--
 docs/doc/processor/arm.md          | 1 +
 docs/doc/processor/riscv.md        | 2 +-
 docs/doc/processor/riscv_fpga.md   | 1 -
 docs/doc/processor/riscv_sfcore.md | 1 +
 docs/doc/processor/riscv_sk.md     | 1 -
 7 files changed, 9 insertions(+), 8 deletions(-)
 create mode 100644 docs/doc/processor/arm.md
 delete mode 100644 docs/doc/processor/riscv_fpga.md
 create mode 100644 docs/doc/processor/riscv_sfcore.md
 delete mode 100644 docs/doc/processor/riscv_sk.md

diff --git a/docs/.vuepress/sidebar.js b/docs/.vuepress/sidebar.js
index 493c57f..3517cab 100755
--- a/docs/.vuepress/sidebar.js
+++ b/docs/.vuepress/sidebar.js
@@ -8,7 +8,8 @@ const sidebar = {
     '/doc/kernel/synchron',
     '/doc/kernel/threadcommunication',
     '/doc/kernel/int',
-    '/doc/kernel/tmr'
+    '/doc/kernel/tmr',
+    '/doc/kernel/task'
   ],
   'component': [
     '/doc/component/fs',
@@ -65,8 +66,8 @@ const sidebar = {
   ],
   'processor': [
     '/doc/processor/riscv',
-    '/doc/processor/riscv_sk',
-    '/doc/processor/riscv_fpga'
+    '/doc/processor/arm',
+    '/doc/processor/riscv_sfcore'
   ],
   'selfterminal': [
     '/doc/selfterminal/aiit-arm',
diff --git a/docs/doc/processor/README.md b/docs/doc/processor/README.md
index 1326517..0fe48a3 100644
--- a/docs/doc/processor/README.md
+++ b/docs/doc/processor/README.md
@@ -4,7 +4,7 @@
 
 - [RISC-V](/doc/processor/riscv.md)
 
-- [RISC-V软核](/doc/processor/riscv_sk.md)
+- [ARM](/doc/processor/arm.md)
 
-- [ARM+contex M系列](/doc/processor/riscv_fpga.md)
+- [RISC-V软核](/doc/processor/riscv_sfcore.md)
 
diff --git a/docs/doc/processor/arm.md b/docs/doc/processor/arm.md
new file mode 100644
index 0000000..435256a
--- /dev/null
+++ b/docs/doc/processor/arm.md
@@ -0,0 +1 @@
+# ARM
\ No newline at end of file
diff --git a/docs/doc/processor/riscv.md b/docs/doc/processor/riscv.md
index 186077d..ec37ab0 100644
--- a/docs/doc/processor/riscv.md
+++ b/docs/doc/processor/riscv.md
@@ -1 +1 @@
-# riscv
\ No newline at end of file
+# RISC-V
\ No newline at end of file
diff --git a/docs/doc/processor/riscv_fpga.md b/docs/doc/processor/riscv_fpga.md
deleted file mode 100644
index 0ad42c9..0000000
--- a/docs/doc/processor/riscv_fpga.md
+++ /dev/null
@@ -1 +0,0 @@
-# riscv+fpga
\ No newline at end of file
diff --git a/docs/doc/processor/riscv_sfcore.md b/docs/doc/processor/riscv_sfcore.md
new file mode 100644
index 0000000..3a86557
--- /dev/null
+++ b/docs/doc/processor/riscv_sfcore.md
@@ -0,0 +1 @@
+# RISC-V 软核
\ No newline at end of file
diff --git a/docs/doc/processor/riscv_sk.md b/docs/doc/processor/riscv_sk.md
deleted file mode 100644
index 2ac5934..0000000
--- a/docs/doc/processor/riscv_sk.md
+++ /dev/null
@@ -1 +0,0 @@
-# riscv_软核
\ No newline at end of file