Merge branch 'prepare_for_master' of https://git.trustie.net/xuos/xiuos into xidatong

This commit is contained in:
Liu_Weichao
2022-04-12 10:05:48 +08:00
904 changed files with 17381 additions and 926 deletions
@@ -99,7 +99,7 @@ void ethernetif_clk_init(void)
{
const clock_enet_pll_config_t config = {.enableClkOutput = true, .enableClkOutput25M = false, .loopDivider = 1};
CLOCK_InitEnetPll(&config);
SysTick_Config(USEC_TO_COUNT(1000U, CLOCK_GetFreq(kCLOCK_CoreSysClk)));
SysTick_Config(SystemCoreClock / TICK_PER_SECOND);
}
void ethernetif_gpio_init(void)
@@ -109,9 +109,7 @@ void ethernetif_gpio_init(void)
IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1TxClkOutputDir, true);
GPIO_PinInit(GPIO1, 3, &gpio_config);
GPIO_PinInit(GPIO1, 10, &gpio_config);
/* pull up the ENET_INT before RESET. */
GPIO_WritePinOutput(GPIO1, 10, 1);
GPIO_WritePinOutput(GPIO1, 3, 0);
enet_delay();
GPIO_WritePinOutput(GPIO1, 3, 1);
@@ -41,11 +41,9 @@ void LPUART1_IRQHandler(int irqn, void *arg)
{
x_base lock = 0;
// KPrintf("LPUART1_IRQHandler \n");
lock = DISABLE_INTERRUPT();
lock = DisableIRQ(UART1_IRQn);
UartIsr(&serial_bus_1, &serial_driver_1, &serial_device_1);
ENABLE_INTERRUPT(lock);
EnableIRQ(UART1_IRQn);
}
DECLARE_HW_IRQ(UART1_IRQn, LPUART1_IRQHandler, NONE);
#endif
+10
View File
@@ -59,6 +59,10 @@ extern int ExtSramInit(void);
#endif
#endif
#ifdef BSP_USING_LWIP
extern int ETH_BSP_Config();
#endif
void BOARD_SD_Pin_Config(uint32_t speed, uint32_t strength)
{
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_00_USDHC1_CMD,
@@ -278,8 +282,10 @@ void InitBoardHardware()
BOARD_InitPins();
BOARD_BootClockRUN();
#ifndef BSP_USING_LWIP
NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
SysTick_Config(SystemCoreClock / TICK_PER_SECOND);
#endif
#ifdef BSP_USING_GPIO
Imxrt1052HwGpioInit();
@@ -307,6 +313,10 @@ void InitBoardHardware()
#endif
#endif
#ifdef BSP_USING_LWIP
ETH_BSP_Config();
#endif
#ifdef BSP_USING_LPUART
Imxrt1052HwUartInit();
#endif
@@ -62,7 +62,7 @@ void InitBoardHardware(void);
#define NVIC_PRIORITYGROUP_4 0x00000003U /*!< 4 bits for pre-emption priority*/
/*! @brief The ENET PHY address. */
#define BOARD_ENET0_PHY_ADDRESS (0x02U) /* Phy address of enet port 0. */
#define BOARD_ENET0_PHY_ADDRESS (0x0U) /* Phy address of enet port 0. */
/* USB PHY condfiguration */
#define BOARD_USB_PHY_D_CAL (0x0CU)