test rk3568 uart
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@@ -34,10 +34,10 @@ Modification:
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#define ARCH_BIT 64
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/* A72 physical memory layout */
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#define PHY_MEM_BASE (0x0000000040000000ULL)
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#define PHY_USER_FREEMEM_BASE (0x0000000046000000ULL)
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#define PHY_USER_FREEMEM_TOP (0x0000000048000000ULL)
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#define PHY_MEM_STOP (0x0000000048000000ULL)
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#define PHY_MEM_BASE (0x0000000000A00000ULL)
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#define PHY_USER_FREEMEM_BASE (0x0000000001A00000ULL)
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#define PHY_USER_FREEMEM_TOP (0x0000000001A00000ULL)
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#define PHY_MEM_STOP (0x0000000002000000ULL)
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/* PTE-PAGE_SIZE */
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#define LEVEL4_PTE_SHIFT 12
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@@ -61,9 +61,9 @@ Modification:
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#define MAX_NR_FREE_PAGES ((PHY_MEM_STOP - PHY_MEM_BASE) >> LEVEL4_PTE_SHIFT)
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/* Deivce memory layout */
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#define DEV_PHYMEM_BASE (0x0000000000000000ULL)
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#define DEV_PHYMEM_BASE (0x00000000C0000000ULL)
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#define DEV_VRTMEM_BASE (0x0000004000000000ULL)
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#define DEV_MEM_SZ (0x0000000010000000ULL)
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#define DEV_MEM_SZ (0x0000000040000000ULL)
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/* User memory layout */
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#define USER_STACK_SIZE PAGE_SIZE
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