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Merge branch rk3568_dev of https://www.gitlink.org.cn/tuyuyang/xiuos with commit 6bc856b7a6 into local

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This commit is contained in:
songyanguang
2024-08-15 19:26:02 +08:00
parent 059da067df
commit a9273b9879
155 changed files with 2734 additions and 2127 deletions
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Ubiquitous/XiZi_AIoT/services/app/Makefile
+4 -8
View File
@@ -10,10 +10,10 @@ cflags = -std=c11 -O2 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -
board_specs = stub.o
#cflags = -Wall -g -std=c11
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O2 -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
board_specs = stub.o
endif
@@ -43,9 +43,9 @@ INC_DIR = -I$(KERNEL_ROOT)/services/shell/letter-shell \
-I$(KERNEL_ROOT)/services/app
ifeq ($(BOARD), imx6q-sabrelite)
all: init test_fault simple_client simple_server shell fs_server semaphore_server test_semaphore test_ipc_null test_thread test_irq_hdlr test_irq_block test_irq_send eth_driver epit_server test_net lwip readme.txt | bin
all: test_fault simple_client simple_server shell fs_server semaphore_server test_semaphore test_ipc_null test_thread test_irq_hdlr test_irq_block test_irq_send eth_driver epit_server test_net lwip readme.txt | bin
else
all: init test_fault simple_client simple_server shell fs_server semaphore_server test_ipc_null test_thread test_semaphore test_net lwip readme.txt eth_hal | bin
all: test_fault simple_client simple_server shell fs_server semaphore_server test_ipc_null test_thread test_semaphore test_net lwip readme.txt eth_hal | bin
endif
../tools/mkfs/mkfs ./fs.img $^
@mv $(filter-out readme.txt, $^) bin
@@ -97,10 +97,6 @@ shell: shell_port.o libserial.o printf.o shell_cmd_list.o shell.o shell_ext.o li
@${ld} ${user_ldflags} -e main -o $@ $^ ${board_specs}
@${objdump} -S $@ > $@.asm
init: init.o libfs.o libipc.o session.o libserial.o printf.o usyscall.o arch_usyscall.o libmem.o
@${ld} ${user_ldflags} -e main -o $@ $^ ${board_specs}
@${objdump} -S $@ > $@.asm
test_fault: test_fault.o libserial.o printf.o usyscall.o arch_usyscall.o
@${ld} ${user_ldflags} -e main -o $@ $^ ${board_specs}
@${objdump} -S $@ > $@.asm
Ubiquitous/XiZi_AIoT/services/app/init.c
-42
View File
@@ -1,42 +0,0 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
// init: The initial user-level program
#include <stdbool.h>
#include "libfs.h"
#include "libserial.h"
#include "usyscall.h"
int main(int argc, char* argv[])
{
struct Session session;
printf("init: connecting MemFS\n");
while (connect_session(&session, "MemFS", 8092) < 0)
;
printf("init: connect MemFS success\n");
int fd;
char* shell_task_param[2] = { "/shell", 0 };
if ((fd = open(&session, shell_task_param[0])) < 0) {
printf("Open %s failed\n", shell_task_param[0]);
exit(1);
}
if (spawn(&session, fd, read, fsize, shell_task_param[0], shell_task_param) < 0) {
printf("Syscall Spawn shell failed\n");
}
close(&session, fd);
exit(0);
return 0;
}
Ubiquitous/XiZi_AIoT/services/app/shell_port.c
+1 -1
View File
@@ -50,7 +50,7 @@ int main(void)
shellInit(&shell, shellBuffer, 512);
while (connect_session(&session_fs, "MemFS", 8092) < 0)
while (connect_session(&session_fs, "MemFS", 0x10000) < 0)
;
if (!session_fs.buf) {
printf("session connect faield\n");
Ubiquitous/XiZi_AIoT/services/app/simple_client.c
+1 -1
View File
@@ -108,7 +108,7 @@ int main(int argc, char** argv)
struct Session fs_session;
static char id_buf[33] = { 0 };
if (id > 1) {
if (connect_session(&fs_session, "MemFS", 8192) < 0) {
if (connect_session(&fs_session, "MemFS", 0x4000) < 0) {
printf("connect fs_session failed\n");
} else {
int fd;
Ubiquitous/XiZi_AIoT/services/app/simple_server.c
+1 -2
View File
@@ -30,8 +30,7 @@ int IPC_DO_SERVE_FUNC(Ipc_hello_string)(char* buf, int* len)
return 0;
}
// IPC_SERVER_INTERFACE(Ipc_add, 2);
IPC_SERVER_THREAD_INTERFACE(Ipc_add, 2);
IPC_SERVER_INTERFACE(Ipc_add, 2);
IPC_SERVER_INTERFACE(Ipc_hello_string, 2);
IPC_SERVER_REGISTER_INTERFACES(IpcSimpleServer, 2, Ipc_hello_string, Ipc_add);
Ubiquitous/XiZi_AIoT/services/boards/ok1028a-c/Makefile → Ubiquitous/XiZi_AIoT/services/boards/3568/Makefile
+2 -2
View File
@@ -8,10 +8,10 @@ toolchain ?= arm-xilinx-eabi-
user_ldflags = -N -Ttext 0
cflags = -march=armv7-a -std=c11 -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc
Ubiquitous/XiZi_AIoT/services/boards/ok1028a-c/arch_usyscall.c → Ubiquitous/XiZi_AIoT/services/boards/3568/arch_usyscall.c
View File
Ubiquitous/XiZi_AIoT/services/boards/3568/libserial.c
+250
View File
@@ -0,0 +1,250 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/// this file is only used for debug
#include <stddef.h>
#include <stdint.h>
#include "libserial.h"
#include "usyscall.h"
/*
* For driver model we always use one byte per register, and sort out the
* differences in the driver
*/
#define CONFIG_SYS_NS16550_REG_SIZE (-1)
#define UART_REG(x) \
unsigned char x; \
unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1];
/**
* struct ns16550_platdata - information about a NS16550 port
*
* @base: Base register address
* @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...)
* @clock: UART base clock speed in Hz
*/
struct ns16550_platdata {
unsigned long base;
int reg_shift;
int clock;
int reg_offset;
uint32_t fcr;
};
struct udevice;
struct NS16550 {
UART_REG(rbr); /* 0 */
UART_REG(ier); /* 1 */
UART_REG(fcr); /* 2 */
UART_REG(lcr); /* 3 */
UART_REG(mcr); /* 4 */
UART_REG(lsr); /* 5 */
UART_REG(msr); /* 6 */
UART_REG(spr); /* 7 */
#ifdef CONFIG_SOC_DA8XX
UART_REG(reg8); /* 8 */
UART_REG(reg9); /* 9 */
UART_REG(revid1); /* A */
UART_REG(revid2); /* B */
UART_REG(pwr_mgmt); /* C */
UART_REG(mdr1); /* D */
#else
UART_REG(mdr1); /* 8 */
UART_REG(reg9); /* 9 */
UART_REG(regA); /* A */
UART_REG(regB); /* B */
UART_REG(regC); /* C */
UART_REG(regD); /* D */
UART_REG(regE); /* E */
UART_REG(uasr); /* F */
UART_REG(scr); /* 10*/
UART_REG(ssr); /* 11*/
#endif
#ifdef CONFIG_DM_SERIAL
struct ns16550_platdata* plat;
#endif
};
#define thr rbr
#define iir fcr
#define dll rbr
#define dlm ier
typedef struct NS16550* NS16550_t;
/*
* These are the definitions for the FIFO Control Register
*/
#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */
#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */
#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */
#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */
#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */
#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */
#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */
#define UART_FCR_RXSR 0x02 /* Receiver soft reset */
#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */
/* Ingenic JZ47xx specific UART-enable bit. */
#define UART_FCR_UME 0x10
/* Clear & enable FIFOs */
#define UART_FCR_DEFVAL (UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR)
/*
* These are the definitions for the Modem Control Register
*/
#define UART_MCR_DTR 0x01 /* DTR */
#define UART_MCR_RTS 0x02 /* RTS */
#define UART_MCR_OUT1 0x04 /* Out 1 */
#define UART_MCR_OUT2 0x08 /* Out 2 */
#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */
#define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS */
#define UART_MCR_DMA_EN 0x04
#define UART_MCR_TX_DFR 0x08
/*
* These are the definitions for the Line Control Register
*
* Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting
* UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits.
*/
#define UART_LCR_WLS_MSK 0x03 /* character length select mask */
#define UART_LCR_WLS_5 0x00 /* 5 bit character length */
#define UART_LCR_WLS_6 0x01 /* 6 bit character length */
#define UART_LCR_WLS_7 0x02 /* 7 bit character length */
#define UART_LCR_WLS_8 0x03 /* 8 bit character length */
#define UART_LCR_STB 0x04 /* # stop Bits, off=1, on=1.5 or 2) */
#define UART_LCR_PEN 0x08 /* Parity eneble */
#define UART_LCR_EPS 0x10 /* Even Parity Select */
#define UART_LCR_STKP 0x20 /* Stick Parity */
#define UART_LCR_SBRK 0x40 /* Set Break */
#define UART_LCR_BKSE 0x80 /* Bank select enable */
#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
/*
* These are the definitions for the Line Status Register
*/
#define UART_LSR_DR 0x01 /* Data ready */
#define UART_LSR_OE 0x02 /* Overrun */
#define UART_LSR_PE 0x04 /* Parity error */
#define UART_LSR_FE 0x08 /* Framing error */
#define UART_LSR_BI 0x10 /* Break */
#define UART_LSR_THRE 0x20 /* Xmit holding register empty */
#define UART_LSR_TEMT 0x40 /* Xmitter empty */
#define UART_LSR_ERR 0x80 /* Error */
#define UART_MSR_DCD 0x80 /* Data Carrier Detect */
#define UART_MSR_RI 0x40 /* Ring Indicator */
#define UART_MSR_DSR 0x20 /* Data Set Ready */
#define UART_MSR_CTS 0x10 /* Clear to Send */
#define UART_MSR_DDCD 0x08 /* Delta DCD */
#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */
#define UART_MSR_DDSR 0x02 /* Delta DSR */
#define UART_MSR_DCTS 0x01 /* Delta CTS */
/*
* These are the definitions for the Interrupt Identification Register
*/
#define UART_IIR_NO_INT 0x01 /* No interrupts pending */
#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */
#define UART_IIR_MSI 0x00 /* Modem status interrupt */
#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */
#define UART_IIR_RDI 0x04 /* Receiver data interrupt */
#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */
/*
* These are the definitions for the Interrupt Enable Register
*/
#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */
#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */
#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */
#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
/* useful defaults for LCR */
#define UART_LCR_8N1 0x03
#define UART_ADDR (0xFE660000)
#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
#define UART_MCRVAL (UART_MCR_DTR | UART_MCR_RTS) /* RTS/DTR */
#define out_le32(a, v) (*(volatile uint32_t*)(a) = (v))
#define in_le32(a) (*(volatile uint32_t*)(a))
#ifndef CONFIG_SYS_NS16550_IER
#define CONFIG_SYS_NS16550_IER 0x00
#endif /* CONFIG_SYS_NS16550_IER */
#define serial_dout(reg, value) \
serial_out_shift((char*)com_port + ((char*)reg - (char*)com_port) * (1 << 2), \
2, value)
#define serial_din(reg) \
serial_in_shift((char*)com_port + ((char*)reg - (char*)com_port) * (1 << 2), \
2)
static inline void serial_out_shift(void* addr, int shift, int value)
{
out_le32(addr, value);
}
static inline int serial_in_shift(void* addr, int shift)
{
return in_le32(addr);
}
#ifndef CONFIG_SYS_NS16550_CLK
#define CONFIG_SYS_NS16550_CLK 0
#endif
bool init_uart_mmio()
{
static int mapped = 0;
if (mapped == 0) {
if (-1 == mmap(UART_ADDR, UART_ADDR, 4096, true)) {
return false;
}
mapped = 1;
}
return true;
}
void putc(char ch)
{
static struct NS16550* com_port = (struct NS16550*)UART_ADDR;
if (ch == '\n') {
putc('\r');
}
while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
;
serial_dout(&com_port->thr, ch);
}
char getc(void)
{
static struct NS16550* com_port = (struct NS16550*)UART_ADDR;
while (!(serial_din(&com_port->lsr) & UART_LSR_DR))
;
return serial_din(&com_port->rbr);
}
Ubiquitous/XiZi_AIoT/services/boards/ok1028a-c/stub.c → Ubiquitous/XiZi_AIoT/services/boards/3568/stub.c
View File
Ubiquitous/XiZi_AIoT/services/boards/imx6q-sabrelite/Makefile
+2 -2
View File
@@ -8,10 +8,10 @@ toolchain ?= arm-xilinx-eabi-
user_ldflags = -N -Ttext 0
cflags = -march=armv7-a -std=c11 -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc
Ubiquitous/XiZi_AIoT/services/boards/ok1028a-c/libserial.c
-113
View File
@@ -1,113 +0,0 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/// this file is only used for debug
#include "libserial.h"
#include "usyscall.h"
#define USER_UART_BASE 0x6FFFF000
#define UART0_BASE (0x09000000ULL)
#define UART0_REG(reg) ((volatile uint32_t*)(USER_UART_BASE + reg))
// the UART control registers.
// pl011
#define DR 0x00
#define FR 0x18
#define FR_RXFE (1 << 4) // recieve fifo empty
#define FR_TXFF (1 << 5) // transmit fifo full
#define FR_RXFF (1 << 6) // recieve fifo full
#define FR_TXFE (1 << 7) // transmit fifo empty
#define IBRD 0x24
#define FBRD 0x28
#define LCRH 0x2c
#define LCRH_FEN (1 << 4)
#define LCRH_WLEN_8BIT (3 << 5)
#define CR 0x30
#define IMSC 0x38
#define INT_RX_ENABLE (1 << 4)
#define INT_TX_ENABLE (1 << 5)
#define ICR 0x44
#define UART_READ_REG(reg) (*(UART0_REG(reg)))
#define UART_WRITE_REG(reg, v) (*(UART0_REG(reg)) = (v))
#define UART_TX_BUF_SIZE 32
static char uart_tx_buf[UART_TX_BUF_SIZE];
uint64_t uart_tx_w; // write next to uart_tx_buf[uart_tx_w % UART_TX_BUF_SIZE]
uint64_t uart_tx_r; // read next from uart_tx_buf[uart_tx_r % UART_TX_BUF_SIZE]
bool init_uart_mmio()
{
static int mapped = 0;
if (mapped == 0) {
if (-1 == mmap(USER_UART_BASE, UART0_BASE, 4096, true)) {
return false;
}
mapped = 1;
}
return true;
}
// if the UART is idle, and a character is waiting
// in the transmit buffer, send it.
// caller must hold uart_tx_lock.
// called from both the top- and bottom-half.
void uartstart()
{
while (1) {
if (uart_tx_w == uart_tx_r) {
// transmit buffer is empty.
return;
}
if (UART_READ_REG(FR) & FR_TXFF) {
// the UART transmit holding register is full,
// so we cannot give it another byte.
// it will interrupt when it's ready for a new byte.
return;
}
int c = uart_tx_buf[uart_tx_r % UART_TX_BUF_SIZE];
uart_tx_r += 1;
// maybe uartputc() is waiting for space in the buffer.
UART_WRITE_REG(DR, c);
}
}
// add a character to the output buffer and tell the
// UART to start sending if it isn't already.
// blocks if the output buffer is full.
// because it may block, it can't be called
// from interrupts; it's only suitable for use
// by write().
void putc(char c)
{
while (uart_tx_w == uart_tx_r + UART_TX_BUF_SIZE)
;
uart_tx_buf[uart_tx_w % UART_TX_BUF_SIZE] = c;
uart_tx_w += 1;
uartstart();
return;
}
// read one input character from the UART.
// return -1 if none is waiting.
char getc(void)
{
if (UART_READ_REG(FR) & FR_RXFE)
return 0xFF;
else
return UART_READ_REG(DR);
}
Ubiquitous/XiZi_AIoT/services/boards/zynq7000-zc702/Makefile
+2 -2
View File
@@ -9,10 +9,10 @@ user_ldflags = --start-group,-lgcc,-lc,--end-group
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
#cflags = -Wall -g -std=c11
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/Makefile → Ubiquitous/XiZi_AIoT/services/drivers/3568/Makefile
View File
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/Makefile → Ubiquitous/XiZi_AIoT/services/drivers/3568/hal/Makefile
+8 -1
View File
@@ -19,6 +19,13 @@ cflags = -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -stati
board_specs = stub.o
endif
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
board_specs = $(KERNEL_ROOT)/services/app/stub.o
endif
cc = ${toolchain}gcc
ld = ${toolchain}g++
objdump = ${toolchain}objdump
@@ -28,7 +35,7 @@ c_useropts = -O2
INC_DIR = -I$(KERNEL_ROOT)/services/app \
-I$(KERNEL_ROOT)/services/boards/$(BOARD) \
-I$(KERNEL_ROOT)/services/lib/serial \
-I$(KERNEL_ROOT)/services/drivers/rk-3568/include \
-I$(KERNEL_ROOT)/services/drivers/3568/include \
-I$(KERNEL_ROOT)/services/lib/usyscall \
-I$(KERNEL_ROOT)/services/lib/ipc \
-I$(KERNEL_ROOT)/services/lib/memory
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/hal_base.c → Ubiquitous/XiZi_AIoT/services/drivers/3568/hal/hal_base.c
+4 -6
View File
@@ -122,12 +122,10 @@ __attribute__((always_inline)) static inline HAL_Status TimerDelayUs(uint32_t us
from = HAL_TIMER_GetCount(SYS_TIMER);
count = PLL_INPUT_OSC_RATE / 1000000 * us;
do {
now = HAL_TIMER_GetCount(SYS_TIMER);
pass = now > from ? now - from : from - now;
} while (pass < count);
return HAL_OK;
}
#endif
@@ -314,13 +312,13 @@ __attribute__((weak)) HAL_Status HAL_DelayMs(uint32_t ms)
*/
HAL_Status HAL_DelayUs(uint32_t us)
{
#if defined(SYS_TIMER) && defined(HAL_TIMER_MODULE_ENABLED)
// #if defined(SYS_TIMER) && defined(HAL_TIMER_MODULE_ENABLED)
return TimerDelayUs(us);
#else
// return TimerDelayUs(us);
// #else
return HAL_CPUDelayUs(us);
#endif
// #endif
}
/**
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/hal_bsp.c → Ubiquitous/XiZi_AIoT/services/drivers/3568/hal/hal_bsp.c
View File
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/hal_cru.c → Ubiquitous/XiZi_AIoT/services/drivers/3568/hal/hal_cru.c
+1 -263
View File
@@ -956,268 +956,6 @@ HAL_Status HAL_CRU_SetPllPowerDown(struct PLL_SETUP *pSetup)
}
#endif
#ifdef CRU_CLK_USE_CON_BANK
static const struct HAL_CRU_DEV *CRU_GetInfo(void)
{
return &g_cruDev;
}
HAL_Check HAL_CRU_ClkIsEnabled(uint32_t clk)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t index = CLK_GATE_GET_REG_OFFSET(clk);
uint32_t shift = CLK_GATE_GET_BITS_SHIFT(clk);
uint32_t bank = CLK_GATE_GET_REG_BANK(clk);
uint32_t reg;
HAL_Check ret;
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].gateOffset + index * 4;
ret = (HAL_Check)(!((CRU_READ(reg) & (1 << shift)) >> shift));
return ret;
}
HAL_Status HAL_CRU_ClkEnable(uint32_t clk)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t index = CLK_GATE_GET_REG_OFFSET(clk);
uint32_t shift = CLK_GATE_GET_BITS_SHIFT(clk);
uint32_t bank = CLK_GATE_GET_REG_BANK(clk);
uint32_t reg;
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].gateOffset + index * 4;
CRU_WRITE(reg, shift, 1U << shift, 0U);
return HAL_OK;
}
HAL_Status HAL_CRU_ClkDisable(uint32_t clk)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t index = CLK_GATE_GET_REG_OFFSET(clk);
uint32_t shift = CLK_GATE_GET_BITS_SHIFT(clk);
uint32_t bank = CLK_GATE_GET_REG_BANK(clk);
uint32_t reg;
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].gateOffset + index * 4;
CRU_WRITE(reg, shift, 1U << shift, 1U);
return HAL_OK;
}
HAL_Status HAL_CRU_ClkDisableUnused(uint32_t bank, uint32_t index, uint32_t val)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t reg;
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].gateOffset + index * 4;
CRU_WRITE(reg, 0, 0, val);
return HAL_OK;
}
HAL_Check HAL_CRU_ClkIsReset(uint32_t clk)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t index = CLK_GATE_GET_REG_OFFSET(clk);
uint32_t shift = CLK_GATE_GET_BITS_SHIFT(clk);
uint32_t bank = CLK_GATE_GET_REG_BANK(clk);
uint32_t reg;
HAL_Check ret;
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].softOffset + index * 4;
ret = (HAL_Check)((CRU_READ(reg) & (1 << shift)) >> shift);
return ret;
}
HAL_Status HAL_CRU_ClkResetAssert(uint32_t clk)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t index = CLK_RESET_GET_REG_OFFSET(clk);
uint32_t shift = CLK_RESET_GET_BITS_SHIFT(clk);
uint32_t bank = CLK_GATE_GET_REG_BANK(clk);
uint32_t reg;
HAL_ASSERT(shift < 16);
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].softOffset + index * 4;
CRU_WRITE(reg, shift, 1U << shift, 1U);
return HAL_OK;
}
HAL_Status HAL_CRU_ClkResetDeassert(uint32_t clk)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t index = CLK_RESET_GET_REG_OFFSET(clk);
uint32_t shift = CLK_RESET_GET_BITS_SHIFT(clk);
uint32_t bank = CLK_GATE_GET_REG_BANK(clk);
uint32_t reg;
HAL_ASSERT(shift < 16);
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].softOffset + index * 4;
CRU_WRITE(reg, shift, 1U << shift, 0U);
return HAL_OK;
}
HAL_Status HAL_CRU_ClkResetSyncAssert(int numClks, uint32_t *clks)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t index = CLK_RESET_GET_REG_OFFSET(clks[0]);
uint32_t bank = CLK_GATE_GET_REG_BANK(clks[0]);
uint32_t val = 0;
uint32_t reg;
int i;
for (i = 0; i < numClks; i++) {
val |= HAL_BIT(CLK_RESET_GET_BITS_SHIFT(clks[i]));
if (index != CLK_RESET_GET_REG_OFFSET(clks[i])) {
return HAL_ERROR;
}
}
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].softOffset + index * 4;
CRU_WRITE(reg, 0, val, val);
HAL_DBG("%s: index: 0x%lx, val: 0x%lx\n", __func__, index, val);
return HAL_OK;
}
HAL_Status HAL_CRU_ClkResetSyncDeassert(int numClks, uint32_t *clks)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t index = CLK_RESET_GET_REG_OFFSET(clks[0]);
uint32_t bank = CLK_GATE_GET_REG_BANK(clks[0]);
uint32_t val = 0;
uint32_t reg;
int i;
for (i = 0; i < numClks; i++) {
val |= HAL_BIT(CLK_RESET_GET_BITS_SHIFT(clks[i]));
if (index != CLK_RESET_GET_REG_OFFSET(clks[i])) {
return HAL_ERROR;
}
}
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].softOffset + index * 4;
CRU_WRITE(reg, 0, val, 0);
HAL_DBG("%s: index: 0x%lx, val: 0x%lx\n", __func__, index, val);
return HAL_OK;
}
HAL_Status HAL_CRU_ClkSetDiv(uint32_t divName, uint32_t divValue)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t shift, mask, index;
uint32_t reg, bank;
index = CLK_DIV_GET_REG_OFFSET(divName);
shift = CLK_DIV_GET_BITS_SHIFT(divName);
HAL_ASSERT(shift < 16);
mask = CLK_DIV_GET_MASK(divName);
if (divValue > mask) {
divValue = mask;
}
bank = CLK_DIV_GET_BANK(divName);
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].selOffset + index * 4;
CRU_WRITE(reg, shift, mask, (divValue - 1U));
return HAL_OK;
}
uint32_t HAL_CRU_ClkGetDiv(uint32_t divName)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t shift, mask, index, divValue;
uint32_t reg, bank;
index = CLK_DIV_GET_REG_OFFSET(divName);
shift = CLK_DIV_GET_BITS_SHIFT(divName);
HAL_ASSERT(shift < 16);
mask = CLK_DIV_GET_MASK(divName);
bank = CLK_DIV_GET_BANK(divName);
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].selOffset + index * 4;
divValue = ((CRU_READ(reg) & mask) >> shift) + 1;
return divValue;
}
HAL_SECTION_SRAM_CODE
HAL_Status HAL_CRU_ClkSetMux(uint32_t muxName, uint32_t muxValue)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t shift, mask, index;
uint32_t reg, bank;
index = CLK_MUX_GET_REG_OFFSET(muxName);
shift = CLK_MUX_GET_BITS_SHIFT(muxName);
HAL_ASSERT(shift < 16);
mask = CLK_MUX_GET_MASK(muxName);
bank = CLK_MUX_GET_BANK(muxName);
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].selOffset + index * 4;
CRU_WRITE(reg, shift, mask, muxValue);
return HAL_OK;
}
HAL_SECTION_SRAM_CODE
uint32_t HAL_CRU_ClkGetMux(uint32_t muxName)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t shift, mask, index, muxValue;
uint32_t reg, bank;
index = CLK_MUX_GET_REG_OFFSET(muxName);
shift = CLK_MUX_GET_BITS_SHIFT(muxName);
HAL_ASSERT(shift < 16);
mask = CLK_MUX_GET_MASK(muxName);
bank = CLK_MUX_GET_BANK(muxName);
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].selOffset + index * 4;
muxValue = ((CRU_READ(reg) & mask) >> shift);
return muxValue;
}
HAL_Status HAL_CRU_ClkSetFracDiv(uint32_t fracDivName,
uint32_t numerator,
uint32_t denominator)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t reg, bank;
uint32_t index;
index = CLK_DIV_GET_REG_OFFSET(fracDivName);
bank = CLK_DIV_GET_BANK(fracDivName);
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].selOffset + index * 4;
CRU_WRITE(reg, 0, 0, ((numerator << 16) | denominator));
return HAL_OK;
}
HAL_Status HAL_CRU_ClkGetFracDiv(uint32_t fracDivName,
uint32_t *numerator,
uint32_t *denominator)
{
const struct HAL_CRU_DEV *ctrl = CRU_GetInfo();
uint32_t reg, bank;
uint32_t index;
uint32_t val;
index = CLK_DIV_GET_REG_OFFSET(fracDivName);
bank = CLK_DIV_GET_BANK(fracDivName);
reg = ctrl->banks[bank].cruBase + ctrl->banks[bank].selOffset + index * 4;
val = CRU_READ(reg);
*numerator = (val & 0xffff0000) >> 16;
*denominator = (val & 0x0000ffff);
return HAL_OK;
}
#else /* CRU_CLK_USE_CON_BANK */
HAL_Check HAL_CRU_ClkIsEnabled(uint32_t clk)
{
uint32_t index = CLK_GATE_GET_REG_OFFSET(clk);
@@ -1575,7 +1313,7 @@ HAL_Status HAL_CRU_ClkGetFracDiv(uint32_t fracDivName,
return HAL_OK;
}
#endif /* CRU_CLK_USE_CON_BANK */
HAL_Status HAL_CRU_FracdivGetConfig(uint32_t rateOut, uint32_t rate,
uint32_t *numerator,
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/hal_cru_rk3568.c → Ubiquitous/XiZi_AIoT/services/drivers/3568/hal/hal_cru_rk3568.c
View File
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/hal_debug.c → Ubiquitous/XiZi_AIoT/services/drivers/3568/hal/hal_debug.c
View File
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/hal_gmac.c → Ubiquitous/XiZi_AIoT/services/drivers/3568/hal/hal_gmac.c
+41 -15
View File
@@ -284,7 +284,6 @@
#define GMAC_DESC3_LD (0x1 << 28)
#define GMAC_DESC3_BUF1V (0x1 << 24)
#define DES3_ERROR_SUMMARY (1 << 15)
#define DES3_ERROR_SUMMARY (1 << 15)
/* Generic MII registers. */
@@ -1515,19 +1514,24 @@ void HAL_GMAC_DisableDmaIRQ(struct GMAC_HANDLE *pGMAC)
*/
HAL_Status HAL_GMAC_DMATxDescInit(struct GMAC_HANDLE *pGMAC,
struct GMAC_Desc *txDescs,
uint8_t *txBuff, uint32_t count)
struct GMAC_Desc *txDescs_dma,
uint8_t *txBuff, uint8_t *txBuff_dma, uint32_t count)
{
struct GMAC_Desc *desc;
uint32_t i = 0;
HAL_ASSERT(pGMAC != NULL);
HAL_ASSERT(txDescs != NULL);
HAL_ASSERT(txDescs_dma != NULL);
HAL_ASSERT(txBuff != NULL);
HAL_ASSERT(txBuff_dma != NULL);
pGMAC->txDescIdx = 0;
pGMAC->txDescs = txDescs;
pGMAC->txDescs_dma = txDescs_dma;
pGMAC->txBuf = txBuff;
pGMAC->txBuf_dma = txBuff_dma;
pGMAC->txSize = count;
/* Fill each DMATxDesc descriptor with the right values */
@@ -1557,19 +1561,24 @@ HAL_Status HAL_GMAC_DMATxDescInit(struct GMAC_HANDLE *pGMAC,
*/
HAL_Status HAL_GMAC_DMARxDescInit(struct GMAC_HANDLE *pGMAC,
struct GMAC_Desc *rxDescs,
uint8_t *rxBuff, uint32_t count)
struct GMAC_Desc *rxDescs_dma,
uint8_t *rxBuff, uint8_t *rxBuff_dma, uint32_t count)
{
struct GMAC_Desc *desc;
uint32_t i = 0;
HAL_ASSERT(pGMAC != NULL);
HAL_ASSERT(rxDescs != NULL);
HAL_ASSERT(rxDescs_dma != NULL);
HAL_ASSERT(rxBuff != NULL);
HAL_ASSERT(rxBuff_dma != NULL);
pGMAC->rxDescIdx = 0;
pGMAC->rxDescs = rxDescs;
pGMAC->rxDescs_dma = rxDescs_dma;
pGMAC->rxBuf = rxBuff;
pGMAC->rxBuf_dma = rxBuff_dma;
pGMAC->rxSize = count;
/* Fill each DMARxDesc descriptor with the right values */
@@ -1577,7 +1586,7 @@ HAL_Status HAL_GMAC_DMARxDescInit(struct GMAC_HANDLE *pGMAC,
/* Get the pointer on the ith member of the Rx Desc list */
desc = rxDescs + i;
desc->des0 = (uint64_t)(rxBuff + i * HAL_GMAC_MAX_PACKET_SIZE);
desc->des0 = (uint32_t)(uint64_t)(rxBuff_dma + i * HAL_GMAC_MAX_PACKET_SIZE);
desc->des1 = 0;
desc->des2 = 0;
desc->des3 = GMAC_DESC3_OWN | GMAC_DESC3_BUF1V | GMAC_DESC3_IOC;
@@ -1771,7 +1780,7 @@ HAL_Status HAL_GMAC_Start(struct GMAC_HANDLE *pGMAC, uint8_t *addr)
/* DMA init */
WRITE_REG(pGMAC->pReg->DMA_SYSBUS_MODE, DMA_SYSBUS_MODE_BLEN16 |
DMA_SYSBUS_MODE_BLEN8 | DMA_SYSBUS_MODE_BLEN4);
DMA_SYSBUS_MODE_BLEN8 | DMA_SYSBUS_MODE_BLEN4 | 1 << 12 | 1 << 14);
/* Mask interrupts by writing to CSR7 */
WRITE_REG(pGMAC->pReg->DMA_CH0_INTERRUPT_ENABLE, DMA_CHAN_INTR_DEFAULT_MASK);
@@ -1787,9 +1796,9 @@ HAL_Status HAL_GMAC_Start(struct GMAC_HANDLE *pGMAC, uint8_t *addr)
value |= (rxFifosz << DMA_CH0_RX_CONTROL_RBSZ_SHIFT) & DMA_CH0_RX_CONTROL_RBSZ_MASK;
value = value | (8 << DMA_CH0_RX_CONTROL_RXPBL_SHIFT);
WRITE_REG(pGMAC->pReg->DMA_CH0_RX_CONTROL, value);
WRITE_REG(pGMAC->pReg->DMA_CH0_RXDESC_LIST_ADDRESS, (uint64_t)pGMAC->rxDescs);
WRITE_REG(pGMAC->pReg->DMA_CH0_RXDESC_LIST_ADDRESS, (uint32_t)(uint64_t)pGMAC->rxDescs_dma);
WRITE_REG(pGMAC->pReg->DMA_CH0_RXDESC_TAIL_POINTER,
(uint64_t)(pGMAC->rxDescs + pGMAC->rxSize));
(uint32_t)(uint64_t)(pGMAC->rxDescs_dma + pGMAC->rxSize));
/* init tx chan */
value = READ_REG(pGMAC->pReg->DMA_CH0_TX_CONTROL);
@@ -1797,8 +1806,8 @@ HAL_Status HAL_GMAC_Start(struct GMAC_HANDLE *pGMAC, uint8_t *addr)
value |= DMA_CH0_TX_CONTROL_OSF;
WRITE_REG(pGMAC->pReg->DMA_CH0_TX_CONTROL, value);
WRITE_REG(pGMAC->pReg->DMA_CH0_TXDESC_LIST_ADDRESS, (uint64_t)pGMAC->txDescs);
WRITE_REG(pGMAC->pReg->DMA_CH0_TXDESC_TAIL_POINTER, (uint64_t)pGMAC->txDescs);
WRITE_REG(pGMAC->pReg->DMA_CH0_TXDESC_LIST_ADDRESS, (uint32_t)(uint64_t)pGMAC->txDescs_dma);
WRITE_REG(pGMAC->pReg->DMA_CH0_TXDESC_TAIL_POINTER, (uint32_t)(uint64_t)pGMAC->txDescs_dma);
HAL_GMAC_WriteHWAddr(pGMAC, addr);
@@ -1935,6 +1944,12 @@ uint8_t *HAL_GMAC_GetTXBuffer(struct GMAC_HANDLE *pGMAC)
return pGMAC->txBuf + pGMAC->txDescIdx * HAL_GMAC_MAX_PACKET_SIZE;
}
uint8_t *HAL_GMAC_GetTXBufferDMA(struct GMAC_HANDLE *pGMAC)
{
HAL_ASSERT(pGMAC != NULL);
return pGMAC->txBuf_dma + pGMAC->txDescIdx * HAL_GMAC_MAX_PACKET_SIZE;
}
/**
* @brief Get current RX buffer.
* @param pGMAC: pointer to a GMAC_HANDLE structure that contains
@@ -1949,6 +1964,13 @@ uint8_t *HAL_GMAC_GetRXBuffer(struct GMAC_HANDLE *pGMAC)
return pGMAC->rxBuf + pGMAC->rxDescIdx * HAL_GMAC_MAX_PACKET_SIZE;
}
uint8_t *HAL_GMAC_GetRXBufferDMA(struct GMAC_HANDLE *pGMAC)
{
HAL_ASSERT(pGMAC != NULL);
return pGMAC->rxBuf_dma + pGMAC->rxDescIdx * HAL_GMAC_MAX_PACKET_SIZE;
}
/**
* @brief Send a packet with the length, clean packet' dcached memory before send.
* @param pGMAC: pointer to a GMAC_HANDLE structure that contains
@@ -1977,8 +1999,8 @@ HAL_Status HAL_GMAC_Send(struct GMAC_HANDLE *pGMAC, void *packet,
pGMAC->txDescIdx++;
pGMAC->txDescIdx %= pGMAC->txSize;
desc->des0 = (uint64_t)packet;
desc->des0 = (uint32_t)(uint64_t)packet;
desc->des1 = 0;
desc->des2 = length;
/*
@@ -1986,9 +2008,8 @@ HAL_Status HAL_GMAC_Send(struct GMAC_HANDLE *pGMAC, void *packet,
* writes to the rest of the descriptor too.
*/
desc->des3 = GMAC_DESC3_OWN | GMAC_DESC3_FD | GMAC_DESC3_LD;
WRITE_REG(pGMAC->pReg->DMA_CH0_TXDESC_TAIL_POINTER,
(uint64_t)(pGMAC->txDescs + pGMAC->txDescIdx));
(uint32_t)(uint64_t)(pGMAC->txDescs_dma + pGMAC->txDescIdx));
for (i = 0; i < 1000000; i++) {
if (!(desc->des3 & GMAC_DESC3_OWN)) {
@@ -2025,6 +2046,7 @@ uint8_t *HAL_GMAC_Recv(struct GMAC_HANDLE *pGMAC, int32_t *length)
*length = 0;
desc = pGMAC->rxDescs + pGMAC->rxDescIdx;
HAL_DBG("Rx at %p\n", desc->des0);
des3 = desc->des3;
if (des3 & GMAC_DESC3_OWN) {
HAL_DBG("%s: RX packet not available\n", __func__);
@@ -2072,18 +2094,22 @@ uint8_t *HAL_GMAC_Recv(struct GMAC_HANDLE *pGMAC, int32_t *length)
void HAL_GMAC_CleanRX(struct GMAC_HANDLE *pGMAC)
{
struct GMAC_Desc *desc;
struct GMAC_Desc *desc_dma;
HAL_ASSERT(pGMAC != NULL);
/* Get the pointer on the ith member of the Tx Desc list */
desc = pGMAC->rxDescs + pGMAC->rxDescIdx;
desc->des0 = (uint64_t)(pGMAC->rxBuf + (pGMAC->rxDescIdx *
desc->des0 = (uint32_t)(uint64_t)(pGMAC->rxBuf_dma + (pGMAC->rxDescIdx *
HAL_GMAC_MAX_PACKET_SIZE));
desc->des1 = 0;
desc->des2 = 0;
desc->des3 = GMAC_DESC3_OWN | GMAC_DESC3_BUF1V | GMAC_DESC3_IOC;
WRITE_REG(pGMAC->pReg->DMA_CH0_RXDESC_TAIL_POINTER, (uint64_t)desc);
HAL_DBG("Clean buff %p\n", desc->des0);
desc_dma = pGMAC->rxDescs_dma + pGMAC->rxDescIdx;
HAL_DBG("Clean desc %p\n", desc_dma);
WRITE_REG(pGMAC->pReg->DMA_CH0_RXDESC_TAIL_POINTER, (uint32_t)(uint64_t)desc_dma);
pGMAC->rxDescIdx++;
pGMAC->rxDescIdx %= pGMAC->rxSize;
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/hal_gmac_3568.c → Ubiquitous/XiZi_AIoT/services/drivers/3568/hal/hal_gmac_3568.c
View File
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/hal_gpio.c → Ubiquitous/XiZi_AIoT/services/drivers/3568/hal/hal_gpio.c
View File
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/hal_pinctrl_v2.c → Ubiquitous/XiZi_AIoT/services/drivers/3568/hal/hal_pinctrl_v2.c
View File
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/hal_timer.c → Ubiquitous/XiZi_AIoT/services/drivers/3568/hal/hal_timer.c
View File
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/system_rk3568.c → Ubiquitous/XiZi_AIoT/services/drivers/3568/hal/system_rk3568.c
View File
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/hal/test_gmac.c → Ubiquitous/XiZi_AIoT/services/drivers/3568/hal/test_gmac.c
+181 -185
View File
@@ -6,7 +6,7 @@
#include "hal_bsp.h"
#include "hal_base.h"
#include "hal_gmac.h"
#include "usyscall.h"
#if (defined(HAL_GMAC_MODULE_ENABLED) || defined(HAL_GMAC1000_MODULE_ENABLED))
/*************************** GMAC DRIVER ****************************/
@@ -14,11 +14,6 @@
/***************************** MACRO Definition ******************************/
#define __is_print(ch) ((unsigned int)((ch) - ' ') < 127u - ' ')
#define CONFIG_SYS_NONCACHED_MEMORY (4 << 20) /* 4M */
/* 1MB granularity */
#define MMU_SECTION_SIZE (1 << 20)
/***************************** Structure Definition **************************/
/***************************** Function Declare ******************************/
@@ -51,7 +46,7 @@
#define BMCR_RESET 0x8000 /* Reset to default state */
#define BMCR_SPEED10 0x0000 /* Select 10Mbps */
#define GMAC_TEST_TIMES 1600
#define GMAC_TEST_TIMES 16
/********************* Private Structure Definition **************************/
/* GMAC consumer config data. */
@@ -74,33 +69,23 @@ struct GMAC_ETH_CONFIG {
int32_t rxDelay;
struct GMAC_Desc *txDescs;
struct GMAC_Desc *txDescs_dma;
struct GMAC_Desc *rxDescs;
struct GMAC_Desc *rxDescs_dma;
uint8_t *txBuff;
uint8_t *txBuff_dma;
uint8_t *rxBuff;
uint8_t *rxBuff_dma;
/* MAC address info, hw address */
uint8_t macAddr[6];
};
/********************* Private Variable Definition ***************************/
#ifdef NC_MEM_BASE
static const unsigned long os_no_cache_start = (unsigned long)NC_MEM_BASE;
#else
static const unsigned long os_no_cache_start = 0;
#endif
/*
* Reserve one MMU section worth of address space below the malloc() area that
* will be mapped uncached.
*/
static unsigned long noncached_start;
static unsigned long noncached_end;
static unsigned long noncached_next;
static unsigned int m_nocachemem_inited = 0;
static uint8_t dstAddr[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
static uint8_t dstAddr[6] = { 0x00, 0x0C, 0x29, 0xf8, 0x7a, 0x6b };
#if defined(HAL_GMAC_MODULE_ENABLED) && defined(SOC_RK3568)
static struct GMAC_ETH_CONFIG ethConfigTable[] =
@@ -113,31 +98,30 @@ static struct GMAC_ETH_CONFIG ethConfigTable[] =
.extClk = false,
.resetGpioBank = GPIO2,
.resetGpioNum = GPIO_PIN_D3,
.resetGpioBank = GPIO3,
.resetGpioNum = GPIO_PIN_A4,
.resetDelayMs = { 0, 20, 100 },
.txDelay = 0x3C,
.rxDelay = 0x2f,
.txDelay = 0x2f,
.rxDelay = 0x00,
},
#ifdef HAL_GMAC1
{
.halDev = &g_gmac1Dev,
.mode = PHY_INTERFACE_MODE_RGMII,
.maxSpeed = 1000,
.phyAddr = 1,
.extClk = false,
// {
// .halDev = &g_gmac1Dev,
// .mode = PHY_INTERFACE_MODE_RGMII,
// .maxSpeed = 1000,
// .phyAddr = 1,
.resetGpioBank = GPIO2,
.resetGpioNum = GPIO_PIN_D1,
.resetDelayMs = { 0, 20, 100 },
// .extClk = false,
.txDelay = 0x4f,
.rxDelay = 0x26,
},
#endif
// .resetGpioBank = GPIO4,
// .resetGpioNum = GPIO_PIN_B6,
// .resetDelayMs = { 0, 20, 100 },
// .txDelay = 0x4f,
// .rxDelay = 0x26,
// },
};
#endif
@@ -223,31 +207,6 @@ static void Dump_Regs(struct GMAC_HANDLE *pGMAC)
}
}
static void PHY_Read(struct GMAC_HANDLE *pGMAC, uint32_t phyReg)
{
int data;
data = HAL_GMAC_MDIORead(pGMAC, pGMAC->phyConfig.phyAddress, phyReg);
if (data >= 0) {
printf("PHY_Read: %02lX --> %08X\n", phyReg, data);
} else {
printf("PHY_Read: %02lX --> faild\n", phyReg);
}
}
static void PHY_Write(struct GMAC_HANDLE *pGMAC, uint32_t phyReg, uint32_t data)
{
// struct GMAC_HANDLE *pGMAC;
int status;
status = HAL_GMAC_MDIOWrite(pGMAC, pGMAC->phyConfig.phyAddress, phyReg, data);
if (!status) {
printf("PHY_Write: %02lX --> %08lX\n", phyReg, data);
} else {
printf("PHY_Write: %02lX --> faild\n", phyReg);
}
}
static void PHY_Dump(struct GMAC_ETH_CONFIG *eth, struct GMAC_HANDLE *pGMAC)
{
int data, i;
@@ -277,14 +236,11 @@ static void GMAC_PHY_Reset(struct GMAC_ETH_CONFIG *config)
HAL_GPIO_SetPinLevel(config->resetGpioBank,
config->resetGpioNum,
GPIO_HIGH);
HAL_DelayMs(config->resetDelayMs[0]);
HAL_GPIO_SetPinLevel(config->resetGpioBank,
config->resetGpioNum,
GPIO_LOW);
HAL_DelayMs(config->resetDelayMs[1]);
HAL_GPIO_SetPinLevel(config->resetGpioBank,
config->resetGpioNum,
GPIO_HIGH);
@@ -294,15 +250,12 @@ static void GMAC_PHY_Reset(struct GMAC_ETH_CONFIG *config)
static inline void NET_Random_ETHAddr(uint8_t *addr)
{
unsigned int seed = HAL_TIMER_GetCount(SYS_TIMER) | 0xffffffff;
uint8_t i;
for (i = 0; i < 6; i++) {
addr[i] = rand();
}
addr[0] &= 0xfe; /* clear multicast bit */
addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
addr[0] = 0xe6;
addr[1] = 0x47;
addr[2] = 0xcd;
addr[3] = 0x20;
addr[4] = 0xcf;
addr[5] = 0xd9;
}
static inline void NET_Random_Package(uint8_t *addr, uint16_t len)
@@ -326,7 +279,7 @@ static void PHY_Update_Links(struct GMAC_ETH_CONFIG *eth, struct GMAC_HANDLE *pG
return;
}
HAL_DelayMs(7000);
HAL_DelayMs(10000);
status = HAL_GMAC_PHYUpdateLink(pGMAC);
if (status == HAL_OK) {
@@ -383,74 +336,42 @@ static HAL_Status GMAC_ETH_IRQ(struct GMAC_HANDLE *pGMAC)
/* rt_interrupt_leave(); */
}
static HAL_Status noncached_init(void)
{
unsigned long start, end;
size_t size;
if (os_no_cache_start <= 0) {
printf("Noncached_init failed, plase defined no cached memort\n");
return -1;
}
start = HAL_GMAC_ALIGN(os_no_cache_start, 64);
size = HAL_GMAC_ALIGN(CONFIG_SYS_NONCACHED_MEMORY, MMU_SECTION_SIZE);
end = start + size;
noncached_start = start;
noncached_end = end;
noncached_next = start;
m_nocachemem_inited = 1;
return 0;
}
static unsigned long noncached_alloc(size_t size, size_t align)
{
if (!m_nocachemem_inited) {
if (noncached_init())
return (unsigned long)NULL;
}
unsigned long next = HAL_GMAC_ALIGN(noncached_next, align);
if (next >= noncached_end || (noncached_end - next) < size) {
return 0;
}
noncached_next = next + size;
return next;
}
static void *malloc_align(size_t size, size_t align)
static void *malloc_align(size_t size, size_t align, uintptr_t va, uintptr_t *pa)
{
void *align_ptr;
void *ptr;
// void *ptr;
size_t align_size;
/* align the alignment size to 4 byte */
align = ((align + 0x03) & ~0x03);
/* get total aligned size */
align_size = ((size + 0x03) & ~0x03) + align;
align_size = ((size + 0x03) & ~0x03);
/* allocate memory block from heap */
ptr = malloc(align_size);
if (ptr != NULL) {
/* the allocated memory block is aligned */
if (((uint64_t)ptr & (align - 1)) == 0) {
align_ptr = (void *)((uint64_t)ptr + align);
} else {
align_ptr = (void *)(((uint64_t)ptr + (align - 1)) & ~(align - 1));
}
HAL_DBG("size: %d, align:%d\n",align_size, align);
// ptr = malloc(align_size);
/* set the pointer before alignment pointer to the real pointer */
*((uint64_t *)((uint64_t)align_ptr - sizeof(void *))) = (uint64_t)ptr;
ptr = align_ptr;
if (naive_mmap(&va, pa, align_size, true) < 0){
HAL_DBG("Alloc failed\n");
}
// printf("%p,%p\n",(void *)va, *pa);
// void* ptr = (void *)va;
// if (ptr != 0) {
// /* the allocated memory block is aligned */
// if (((uint64_t)ptr & (align - 1)) == 0) {
// align_ptr = (void *)((uint64_t)ptr + align);
// } else {
// align_ptr = (void *)(((uint64_t)ptr + (align - 1)) & ~(align - 1));
// }
return ptr;
// /* set the pointer before alignment pointer to the real pointer */
// *((uint64_t *)((uint64_t)align_ptr - sizeof(void *))) = (uint64_t)ptr;
// ptr = align_ptr;
// }
return (void *)va;
}
static void free_align(void *ptr)
@@ -459,6 +380,7 @@ static void free_align(void *ptr)
real_ptr = (void *)*(uint64_t *)((uint64_t)ptr - sizeof(void *));
free(real_ptr);
}
/********************* Public Function Definition ****************************/
@@ -470,6 +392,7 @@ static HAL_Status GMAC_Send_Test(struct GMAC_ETH_CONFIG *eth, struct GMAC_HANDLE
HAL_Status status;
if (!pGMAC->phyStatus.link) {
HAL_DBG("pGMAC->phyStatus.link: %d", pGMAC->phyStatus.link);
return -1;
}
@@ -479,6 +402,7 @@ static HAL_Status GMAC_Send_Test(struct GMAC_ETH_CONFIG *eth, struct GMAC_HANDLE
}
ptr = (uint8_t *)HAL_GMAC_GetTXBuffer(pGMAC);
HAL_DBG("txPtr:%p\n", ptr);
memcpy(ptr, dstAddr, 6);
memcpy(ptr + 6, eth->macAddr, 6);
ptr[12] = 0x40;
@@ -493,14 +417,16 @@ static HAL_Status GMAC_Send_Test(struct GMAC_ETH_CONFIG *eth, struct GMAC_HANDLE
}
/* dump packages */
Dump_Hex("Tx", ptr, len);
// Dump_Hex("Tx", ptr, len);
// HAL_DCACHE_CleanByRange((uint64_t)ptr, len);
status = HAL_GMAC_Send(pGMAC, ptr, len);
uint8_t * ptr_dma = (uint8_t *)HAL_GMAC_GetTXBufferDMA(pGMAC);
status = HAL_GMAC_Send(pGMAC, ptr_dma, len);
if (status) {
printf("GMAC send failed: %d\n", status);
}
print_desc(pGMAC);
return status;
}
@@ -511,12 +437,14 @@ static uint16_t GMAC_Recv_Test(struct GMAC_HANDLE *pGMAC)
int32_t size;
if (!pGMAC->phyStatus.link) {
HAL_DBG("pGMAC->phyStatus.link: %d", pGMAC->phyStatus.link);
return -1;
}
status = GMAC_ETH_IRQ(pGMAC);
ptr = HAL_GMAC_Recv(pGMAC, &size);
while (status && ptr) {
print_desc(pGMAC);
if (size > 0 && ptr) {
/* dump packages */
Dump_Hex("Rx", ptr, size);
@@ -529,35 +457,59 @@ static uint16_t GMAC_Recv_Test(struct GMAC_HANDLE *pGMAC)
}
ptr = HAL_GMAC_Recv(pGMAC, &size);
}
return 0;
}
static HAL_Status GMAC_Memory_Init(struct GMAC_ETH_CONFIG *eth, struct GMAC_HANDLE *pGMAC)
{
eth->rxDescs = (struct GMAC_Desc *)noncached_alloc(GMAC_DESC_RX_SIZE, ARCH_DMA_MINALIGN);
eth->txDescs = (struct GMAC_Desc *)noncached_alloc(GMAC_DESC_TX_SIZE, ARCH_DMA_MINALIGN);
{
uintptr_t rx_va = 0x1000000000, rx_pa = 0;
if (naive_mmap(&rx_va, &rx_pa, GMAC_DESC_RX_SIZE, true) < 0){
HAL_DBG("RX Desc alloc failed\n");
}
eth->rxDescs = (struct GMAC_Desc *)0x1000000000;
eth->rxDescs_dma = (struct GMAC_Desc *)rx_pa;
if (!eth->rxDescs || !eth->txDescs)
uintptr_t tx_va = 0x1000400000, tx_pa = 0;
if (naive_mmap(&tx_va, &tx_pa, GMAC_DESC_TX_SIZE, true) < 0){
HAL_DBG("TX Desc alloc failed\n");
}
eth->txDescs = (struct GMAC_Desc *)0x1000400000;
eth->txDescs_dma = (struct GMAC_Desc *)tx_pa;
if (!eth->rxDescs || !eth->txDescs_dma ||
!eth->txDescs || !eth->txDescs_dma){
return -1;
}
HAL_DBG("rx:%p, %p\n",eth->rxDescs, eth->rxDescs_dma);
HAL_DBG("tx:%p, %p\n",eth->txDescs, eth->txDescs_dma);
eth->rxBuff = malloc_align(GMAC_RX_BUFFER_SIZE, ARCH_DMA_MINALIGN);
eth->txBuff = malloc_align(GMAC_TX_BUFFER_SIZE, ARCH_DMA_MINALIGN);
if (!eth->rxBuff || !eth->txBuff)
uintptr_t rxbuf_va = 0x1000800000, rxbuf_pa = 0;
uintptr_t txbuf_va = 0x1000C00000, txbuf_pa = 0;
eth->rxBuff = malloc_align(GMAC_RX_BUFFER_SIZE, ARCH_DMA_MINALIGN, rxbuf_va, &rxbuf_pa);
eth->rxBuff = (void *)0x1000800000;
eth->rxBuff_dma = (void *)rxbuf_pa;
eth->txBuff = malloc_align(GMAC_TX_BUFFER_SIZE, ARCH_DMA_MINALIGN, txbuf_va, &txbuf_pa);
eth->txBuff = (void *)0x1000C00000;
eth->txBuff_dma = (void *)txbuf_pa;
if (!eth->rxBuff || !eth->txBuff ||
!eth->rxBuff_dma || !eth->txBuff_dma){
return -1;
}
HAL_DBG("rx_buff:%p,%p\n",eth->rxBuff, eth->rxBuff_dma);
HAL_DBG("tx_buff:%p,%p,\n",eth->txBuff, eth->txBuff_dma);
HAL_DBG("GMAC_DESC_RX_SIZE:%d\n", GMAC_DESC_RX_SIZE);
HAL_DBG("GMAC_RX_BUFFER_SIZE:%d\n", GMAC_RX_BUFFER_SIZE);
memset(eth->rxDescs, 0, GMAC_DESC_RX_SIZE);
memset(eth->txDescs, 0, GMAC_DESC_TX_SIZE);
memset(eth->rxBuff, 0, GMAC_RX_BUFFER_SIZE);
// HAL_DCACHE_InvalidateByRange((uint64_t)eth->rxBuff, GMAC_RX_BUFFER_SIZE);
memset(eth->txBuff, 0, GMAC_TX_BUFFER_SIZE);
// HAL_DCACHE_CleanByRange((uint64_t)eth->txBuff, GMAC_TX_BUFFER_SIZE);
HAL_GMAC_DMARxDescInit(pGMAC, eth->rxDescs, eth->rxBuff, GMAC_DESCRIPTORS_RX);
HAL_GMAC_DMATxDescInit(pGMAC, eth->txDescs, eth->txBuff, GMAC_DESCRIPTORS_TX);
HAL_GMAC_DMARxDescInit(pGMAC, eth->rxDescs, eth->rxDescs_dma, eth->rxBuff, eth->rxBuff_dma, GMAC_DESCRIPTORS_RX);
HAL_GMAC_DMATxDescInit(pGMAC, eth->txDescs, eth->txDescs_dma, eth->txBuff, eth->txBuff_dma, GMAC_DESCRIPTORS_TX);
print_desc(pGMAC);
@@ -619,7 +571,6 @@ static HAL_Status GMAC_Init(uint8_t id)
}
/*************************** GMAC TEST ****************************/
#define GMAC_MAX_DEVICES 2
#ifdef SOC_RK3568
/**
@@ -631,8 +582,8 @@ static void GMAC0_Iomux_Config(void)
HAL_PINCTRL_SetIOMUX(GPIO_BANK2,
GPIO_PIN_B6, /* gmac0_rxd0 */
PIN_CONFIG_MUX_FUNC1);
HAL_PINCTRL_SetIOMUX(GPIO_BANK2,
GPIO_PIN_C0 | ///* eth0_refclko25m */
GPIO_PIN_C3 | /* gmac0_mdc */
GPIO_PIN_C4 | /* gmac0_mdio */
GPIO_PIN_C0 | /* gmac0_rxdvcrs */
@@ -643,7 +594,6 @@ static void GMAC0_Iomux_Config(void)
GPIO_PIN_A7 | /* gmac0_txd3 */
GPIO_PIN_A5, /* gmac0_rxclk */
PIN_CONFIG_MUX_FUNC2);
HAL_PINCTRL_SetIOMUX(GPIO_BANK2,
GPIO_PIN_B3 | /* gmac0_txd0 */
GPIO_PIN_B4 | /* gmac0_txd1 */
@@ -658,16 +608,6 @@ static void GMAC0_Iomux_Config(void)
GPIO_PIN_B0,
PIN_CONFIG_MUX_FUNC2 | PIN_CONFIG_DRV_LEVEL1);
#if 0
/* io-domian: 1.8v or 3.3v for vccio4 */
WRITE_REG_MASK_WE(GRF->IO_VSEL0,
GRF_IO_VSEL0_POC_VCCIO4_SEL18_MASK,
(1 << GRF_IO_VSEL0_POC_VCCIO4_SEL18_SHIFT));
WRITE_REG_MASK_WE(GRF->IO_VSEL1,
GRF_IO_VSEL1_POC_VCCIO4_SEL33_MASK,
(0 << GRF_IO_VSEL1_POC_VCCIO4_SEL33_SHIFT));
#endif
}
#endif
@@ -682,75 +622,131 @@ static void GMAC_Iomux_Config(uint8_t id)
}
/*************************** GMAC TEST MAIN ****************************/
#include "usyscall.h"
// IPC_SERVER_INTERFACE(Ipc_intr, 1);
// IPC_SERVER_REGISTER_INTERFACES(IpIntrHandler, 1, Ipc_intr);
int main() {
struct GMAC_ETH_CONFIG *eth;
struct GMAC_HANDLE *pGMAC;
int32_t bus, num = 0, i;
HAL_DBG("\n");
HAL_DBG("%s\n", __func__);
HAL_DBG(" GMAC Test:\n");
HAL_DBG("GMAC Test:\n");
num = sizeof(ethConfigTable) / sizeof(struct GMAC_ETH_CONFIG);
HAL_DBG(" GMAC Num: %ld\n", num);
HAL_DBG("GMAC Num: %ld\n", num);
for (bus = 0; bus < num; bus++) {
eth = &ethConfigTable[bus];
HAL_DBG("new pGmac\n");
if (eth) {
pGMAC = &eth->instance;
} else {
return -1;
}
HAL_DBG("map GMAC0\n");
if (!mmap(0x2000000000ULL+ GMAC0_BASE, GMAC0_BASE, 0x10000, true)) {
printf("eth_hal: mmap GMAC0(%8x) failed\n", GMAC0);
exit(1);
}
HAL_DBG("map GPIO2\n");
if (!mmap(0x2000000000ULL + GPIO2_BASE, GPIO2_BASE, 0x10000, true)) {
printf("eth_hal: mmap GPIO2(%8x) failed\n", GPIO2);
exit(1);
}
HAL_DBG("map GPIO3\n");
if (!mmap(0x2000000000ULL + GPIO3_BASE, GPIO3_BASE, 0x10000, true)) {
printf("eth_hal: mmap GPIO2(%8x) failed\n", GPIO2);
exit(1);
}
if (!mmap(0x2000000000ULL + GRF_BASE, GRF_BASE, 0x50000, true)) {
printf("eth_hal: mmap GRF(%8x) failed\n", GRF);
exit(1);
}
if (!mmap(0x2000000000ULL + CRU_BASE, CRU_BASE, 0x10000, true)) {
printf("eth_hal: mmap GRF(%8x) failed\n", GRF);
exit(1);
}
if (!mmap(0x2000000000ULL + TIMER5_BASE, CRU_BASE, 32, true)) {
printf("eth_hal: mmap GRF(%8x) failed\n", GRF);
exit(1);
}
if (!mmap(0x2000000000ULL + PMUCRU_BASE, PMUCRU_BASE, 0x10000, true)) {
printf("eth_hal: mmap GRF(%8x) failed\n", GRF);
exit(1);
}
HAL_DBG("config iomux\n");
/* ionmux */
GMAC_Iomux_Config(bus);
HAL_DBG("config cru\n");
HAL_CRU_ClkEnable(eth->halDev->pclkGateID);
HAL_CRU_ClkEnable(eth->halDev->clkGateID);
/* Register irq */
// register_irq(eth->halDev->irqNum, );
/* PHY reset */
HAL_DBG("reset phy\n");
GMAC_PHY_Reset(eth);
/* GMAC Init */
HAL_DBG("init gmac\n");
GMAC_Init(bus);
HAL_DBG("init memory\n");
GMAC_Memory_Init(eth, pGMAC);
/* Enable GMAC and DMA transmission and reception */
HAL_DBG("start gmac\n");
HAL_GMAC_Start(pGMAC, eth->macAddr);
// print_desc(pGMAC);
/* Update links information */
HAL_DBG("phy update link\n");
PHY_Update_Links(eth, pGMAC, bus);
// print_desc(pGMAC);
/* Dump MAC Regs */
Dump_Regs(pGMAC);
/* Dump PHY Regs */
PHY_Dump(eth, pGMAC);
// PHY_Dump(eth, pGMAC);
HAL_DBG("Init Down\n");
for (i = 0; i < GMAC_TEST_TIMES; i++) {
HAL_DBG("TEST Send %d\n", i);
/* GMAC Send 64 bytes */
GMAC_Send_Test(eth, pGMAC, 64);
// GMAC_Send_Test(eth, pGMAC, 64);
/* GMAC Send 1500 bytes */
GMAC_Send_Test(eth, pGMAC, 1500);
HAL_DelayMs(1000);
HAL_DBG("TEST Recv %d\n", i);
/* GMAC Recv */
GMAC_Recv_Test(pGMAC);
}
Dump_Regs(pGMAC);
HAL_CRU_ClkDisable(eth->halDev->pclkGateID);
HAL_CRU_ClkDisable(eth->halDev->clkGateID);
free_align(eth->txBuff);
free_align(eth->rxBuff);
// free_align(eth->txBuff);
// free_align(eth->rxBuff);
HAL_DBG("done\n");
}
exit(0);
return 0;
}
// typedef void (*isr_handler_t)(int vector, void *param);
// typedef void (*NVIC_IRQHandler)(void);
// isr_handler_t interrupt_install(int vector,
// isr_handler_t handler,
// void *param,
// const char *name)
// {
// HAL_NVIC_SetIRQHandler(vector, (NVIC_IRQHandler)handler);
// return handler;
// }
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_base.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/hal_base.h
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Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_bsp.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/hal_bsp.h
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Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_conf.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/hal_conf.h
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Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_cru.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/hal_cru.h
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Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_debug.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/hal_debug.h
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Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_def.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/hal_def.h
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Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_driver.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/hal_driver.h
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Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_gmac.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/hal_gmac.h
+10 -2
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@@ -269,9 +269,13 @@ struct GMAC_HANDLE {
struct GMAC_DMAStats extraStatus; /**< GMAC DMA transfer status */
struct GMAC_Desc *rxDescs; /**< First Rx descriptor pointer */
struct GMAC_Desc *rxDescs_dma;
struct GMAC_Desc *txDescs; /**< First Tx descriptor pointer */
struct GMAC_Desc *txDescs_dma;
uint8_t *txBuf; /**< First Tx buffer pointer */
uint8_t *txBuf_dma;
uint8_t *rxBuf; /**< First Tx buffer pointer */
uint8_t *rxBuf_dma;
uint32_t txDescIdx; /**< Current Tx descriptor index */
uint32_t rxDescIdx; /**< Current Rx descriptor pointer */
uint32_t txSize; /**< Tx descriptor size*/
@@ -307,17 +311,21 @@ void HAL_GMAC_EnableDmaIRQ(struct GMAC_HANDLE *pGMAC);
void HAL_GMAC_DisableDmaIRQ(struct GMAC_HANDLE *pGMAC);
HAL_Status HAL_GMAC_DMATxDescInit(struct GMAC_HANDLE *pGMAC,
struct GMAC_Desc *txDescs,
uint8_t *txBuff, uint32_t txBuffCount);
struct GMAC_Desc *txDescs_dma,
uint8_t *txBuff, uint8_t *txBuff_dma, uint32_t txBuffCount);
HAL_Status HAL_GMAC_DMARxDescInit(struct GMAC_HANDLE *pGMAC,
struct GMAC_Desc *rxDescs,
uint8_t *rxBuff, uint32_t rxBuffCount);
struct GMAC_Desc *rxDescs_dma,
uint8_t *rxBuff, uint8_t *rxBuff_dma, uint32_t rxBuffCount);
eGMAC_IRQ_Status HAL_GMAC_IRQHandler(struct GMAC_HANDLE *pGMAC);
HAL_Status HAL_GMAC_AdjustLink(struct GMAC_HANDLE *pGMAC, int32_t txDelay,
int32_t rxDelay);
uint32_t HAL_GMAC_GetTXIndex(struct GMAC_HANDLE *pGMAC);
uint32_t HAL_GMAC_GetRXIndex(struct GMAC_HANDLE *pGMAC);
uint8_t *HAL_GMAC_GetTXBuffer(struct GMAC_HANDLE *pGMAC);
uint8_t *HAL_GMAC_GetTXBufferDMA(struct GMAC_HANDLE *pGMAC);
uint8_t *HAL_GMAC_GetRXBuffer(struct GMAC_HANDLE *pGMAC);
uint8_t *HAL_GMAC_GetRXBufferDMA(struct GMAC_HANDLE *pGMAC);
HAL_Status HAL_GMAC_Send(struct GMAC_HANDLE *pGMAC,
void *packet, uint32_t length);
uint8_t *HAL_GMAC_Recv(struct GMAC_HANDLE *pGMAC, int32_t *length);
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_gpio.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/hal_gpio.h
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Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_list.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/hal_list.h
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Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_pinctrl.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/hal_pinctrl.h
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Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_pm.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/hal_pm.h
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Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/hal_timer.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/hal_timer.h
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Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/rk3568.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/rk3568.h
+7 -7
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@@ -1235,11 +1235,11 @@ struct INTMUX_REG {
/****************************************************************************************/
/* Module Variable Define */
#define GRF ((struct GRF_REG *) GRF_BASE)
#define PMUCRU ((struct PMUCRU_REG *) PMUCRU_BASE)
#define GRF ((struct GRF_REG *) (GRF_BASE + 0x2000000000ULL))
#define PMUCRU ((struct PMUCRU_REG *) (PMUCRU_BASE + 0x2000000000ULL))
#define TIMER6 ((struct TIMER_REG *) TIMER6_BASE)
#define TIMER7 ((struct TIMER_REG *) TIMER7_BASE)
#define CRU ((struct CRU_REG *) CRU_BASE)
#define CRU ((struct CRU_REG *) (CRU_BASE + 0x2000000000ULL))
#define I2C0 ((struct I2C_REG *) I2C0_BASE)
#define UART0 ((struct UART_REG *) UART0_BASE)
#define GPIO0 ((struct GPIO_REG *) GPIO0_BASE)
@@ -1247,7 +1247,7 @@ struct INTMUX_REG {
#define PMU ((struct PMU_REG *) PMU_BASE)
#define SPINLOCK ((struct SPINLOCK_REG *) SPINLOCK_BASE)
#define GMAC1 ((struct GMAC_REG *) GMAC1_BASE)
#define GMAC0 ((struct GMAC_REG *) GMAC0_BASE)
#define GMAC0 ((struct GMAC_REG *) (GMAC0_BASE + 0x2000000000ULL))
#define MMC ((struct MMC_REG *) MMC_BASE)
#define FSPI ((struct FSPI_REG *) FSPI_BASE)
#define DMA0 ((struct DMA_REG *) DMA0_BASE)
@@ -1265,7 +1265,7 @@ struct INTMUX_REG {
#define TIMER2 ((struct TIMER_REG *) TIMER2_BASE)
#define TIMER3 ((struct TIMER_REG *) TIMER3_BASE)
#define TIMER4 ((struct TIMER_REG *) TIMER4_BASE)
#define TIMER5 ((struct TIMER_REG *) TIMER5_BASE)
#define TIMER5 ((struct TIMER_REG *) (TIMER5_BASE + 0x2000000000ULL))
#define WDT ((struct WDT_REG *) WDT_BASE)
#define SPI0 ((struct SPI_REG *) SPI0_BASE)
#define SPI1 ((struct SPI_REG *) SPI1_BASE)
@@ -1286,8 +1286,8 @@ struct INTMUX_REG {
#define TSADC ((struct TSADC_REG *) TSADC_BASE)
#define SARADC ((struct SARADC_REG *) SARADC_BASE)
#define GPIO1 ((struct GPIO_REG *) GPIO1_BASE)
#define GPIO2 ((struct GPIO_REG *) GPIO2_BASE)
#define GPIO3 ((struct GPIO_REG *) GPIO3_BASE)
#define GPIO2 ((struct GPIO_REG *) (GPIO2_BASE + 0x2000000000ULL))
#define GPIO3 ((struct GPIO_REG *) (GPIO3_BASE + 0x2000000000ULL))
#define GPIO4 ((struct GPIO_REG *) GPIO4_BASE)
#define MBOX0 ((struct MBOX_REG *) MBOX0_BASE)
#define INTMUX ((struct INTMUX_REG *) INTMUX_BASE)
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/soc.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/soc.h
View File
Ubiquitous/XiZi_AIoT/services/drivers/rk-3568/include/system_rk3568.h → Ubiquitous/XiZi_AIoT/services/drivers/3568/include/system_rk3568.h
View File
Ubiquitous/XiZi_AIoT/services/drivers/Makefile
+1 -1
View File
@@ -1,4 +1,4 @@
SRC_DIR := $(BOARD) usb rk-3568
SRC_DIR := $(BOARD)
include $(KERNEL_ROOT)/compiler.mk
Ubiquitous/XiZi_AIoT/services/drivers/imx6q-sabrelite/clock/Makefile
+2 -2
View File
@@ -8,10 +8,10 @@ toolchain ?= arm-xilinx-eabi-
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
user_ldflags = -N -Ttext 0
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc
ld = ${toolchain}g++
Ubiquitous/XiZi_AIoT/services/drivers/imx6q-sabrelite/enet/Makefile
+2 -8
View File
@@ -9,14 +9,8 @@ ld = ${toolchain}g++
objdump = ${toolchain}objdump
user_ldflags = -N -Ttext 0
cflags = -std=c11 -march=armv7-a -mcpu=cortex-a9 -mtune=cortex-a9 -g \
-Wno-unused -Wno-format -fno-common -ffreestanding -fno-builtin -static \
-Wno-unaligned-access -fdce -Wall -Werror -Wno-uninitialized -Wno-strict-aliasing -fdiagnostics-show-option \
-mapcs -marm -mfpu=neon -ftree-vectorize -fno-math-errno -funsafe-math-optimizations -fno-signed-zeros -mfloat-abi=softfp \
-fno-omit-frame-pointer -fno-stack-protector -fno-pie
# cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic \
# -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic \
-static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
c_useropts = -O0
Ubiquitous/XiZi_AIoT/services/drivers/imx6q-sabrelite/gpio/Makefile
+2 -2
View File
@@ -8,10 +8,10 @@ toolchain ?= arm-xilinx-eabi-
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
user_ldflags = -N -Ttext 0
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc
Ubiquitous/XiZi_AIoT/services/drivers/imx6q-sabrelite/lib/Makefile
+2 -2
View File
@@ -8,10 +8,10 @@ toolchain ?= arm-xilinx-eabi-
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
user_ldflags = -N -Ttext 0
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc
Ubiquitous/XiZi_AIoT/services/drivers/ok1028a-c/Makefile
-3
View File
@@ -1,3 +0,0 @@
SRC_DIR :=
include $(KERNEL_ROOT)/compiler.mk
Ubiquitous/XiZi_AIoT/services/fs/fs_server/Makefile
+2 -2
View File
@@ -9,10 +9,10 @@ user_ldflags = --start-group,-lgcc,-lc,--end-group
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
#cflags = -Wall -g -std=c11
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc
Ubiquitous/XiZi_AIoT/services/fs/libfs/Makefile
+2 -2
View File
@@ -8,10 +8,10 @@ toolchain ?= arm-xilinx-eabi-
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
user_ldflags = -N -Ttext 0
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc
Ubiquitous/XiZi_AIoT/services/lib/ipc/Makefile
+2 -2
View File
@@ -9,10 +9,10 @@ user_ldflags = --start-group,-lgcc,-lc,--end-group
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
#cflags = -Wall -g -std=c11
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc
Ubiquitous/XiZi_AIoT/services/lib/ipc/libipc.c
-1
View File
@@ -182,7 +182,6 @@ void ipc_server_loop(struct IpcNode* ipc_node)
/* handle each session */
for (int i = 0; i < NR_MAX_SESSION; i++) {
if (session_list[i].buf == NULL) {
yield(SYS_TASK_YIELD_NO_REASON);
break;
}
cur_sess_id = session_list[i].id;
Ubiquitous/XiZi_AIoT/services/lib/memory/Makefile
+2 -2
View File
@@ -8,10 +8,10 @@ toolchain ?= arm-xilinx-eabi-
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
user_ldflags = -N -Ttext 0
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc
Ubiquitous/XiZi_AIoT/services/lib/serial/Makefile
+2 -2
View File
@@ -8,10 +8,10 @@ toolchain ?= arm-xilinx-eabi-
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
user_ldflags = -N -Ttext 0
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc
Ubiquitous/XiZi_AIoT/services/lib/usyscall/Makefile
+2 -2
View File
@@ -8,10 +8,10 @@ toolchain ?= arm-xilinx-eabi-
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
user_ldflags = -N -Ttext 0
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc
Ubiquitous/XiZi_AIoT/services/lib/usyscall/usyscall.c
+155 -140
View File
@@ -1,141 +1,156 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
#include "usyscall.h"
#include "libmem.h"
int spawn(struct Session* session, int fd, ipc_read_fn ipc_read, ipc_fsize_fn ipc_fsize, char* name, char** argv)
{
/* read elf image */
int file_size = ipc_fsize(session, fd);
void* img = malloc(file_size);
int read_len = 0;
while (read_len < file_size) {
int cur_read_len = file_size - read_len < 4096 ? file_size - read_len : 4096;
if (cur_read_len < 0) {
return -1;
}
read_len += ipc_read(session, fd, (char*)((uintptr_t)img + read_len), read_len, cur_read_len);
}
/* sys call */
int ret = syscall(SYSCALL_SPAWN, (uintptr_t)img, (uintptr_t)name, (uintptr_t)argv, 0);
free(img);
return ret;
}
int thread(void* entry, const char* name, char** argv)
{
return syscall(SYSCALL_THREAD, (uintptr_t)entry, (uintptr_t)name, (uintptr_t)argv, 0);
}
void exit(int status)
{
syscall(SYSCALL_EXIT, (uintptr_t)status, 0, 0, 0);
}
int yield(task_yield_reason reason)
{
return syscall(SYSCALL_YIELD, (uintptr_t)reason, 0, 0, 0);
}
int kill(int pid)
{
return syscall(SYSCALL_KILL, (intptr_t)pid, 0, 0, 0);
}
int register_server(char* name)
{
return syscall(SYSCALL_SERVER, (intptr_t)name, 0, 0, 0);
}
int session(char* path, int capacity, struct Session* user_session)
{
return syscall(SYSCALL_SESSION, (intptr_t)path, (intptr_t)capacity, (intptr_t)user_session, 0);
}
int poll_session(struct Session* userland_session_arr, int arr_capacity)
{
return syscall(SYSCALL_POLL_SESSION, (intptr_t)userland_session_arr, (intptr_t)arr_capacity, 0, 0);
}
int close_session(struct Session* session)
{
return syscall(SYSCALL_CLOSE_SESSION, (intptr_t)session, 0, 0, 0);
}
int get_memblock_info(sys_state_info* info)
{
return syscall(SYSCALL_SYS_STATE, SYS_STATE_MEMBLOCK_INFO, (intptr_t)info, 0, 0);
}
int set_priority(sys_state_info* info)
{
return syscall(SYSCALL_SYS_STATE, SYS_STATE_SET_TASK_PRIORITY, (intptr_t)info, 0, 0);
}
int task_heap_base()
{
return syscall(SYSCALL_SYS_STATE, SYS_STATE_GET_HEAP_BASE, 0, 0, 0);
}
int show_task()
{
return syscall(SYSCALL_SYS_STATE, SYS_STATE_SHOW_TASKS, 0, 0, 0);
}
int show_mem()
{
return syscall(SYSCALL_SYS_STATE, SYS_STATE_SHOW_MEM_INFO, 0, 0, 0);
}
int show_cpu()
{
return syscall(SYSCALL_SYS_STATE, SYS_STATE_SHOW_CPU_INFO, 0, 0, 0);
}
uintptr_t mmap(uintptr_t vaddr, uintptr_t paddr, int len, bool is_dev)
{
uintptr_t vaddr_inner = vaddr, paddr_inner = paddr;
if (syscall(SYSCALL_MMAP, (intptr_t)&vaddr_inner, (intptr_t)&paddr_inner, (intptr_t)len, (intptr_t)is_dev) < 0) {
return (uintptr_t)NULL;
}
return vaddr_inner;
}
int naive_mmap(uintptr_t* vaddr, uintptr_t* paddr, int len, bool is_dev)
{
return syscall(SYSCALL_MMAP, (uintptr_t)vaddr, (intptr_t)paddr, (intptr_t)len, (intptr_t)is_dev);
}
int register_irq(int irq, int opcode)
{
return syscall(SYSCALL_REGISTER_IRQ, (intptr_t)irq, (intptr_t)opcode, 0, 0);
}
int semaphore_new(int val)
{
return syscall(SYSCALL_SEMAPHORE, (intptr_t)SYS_SEM_NEW, (intptr_t)val, 0, 0);
}
bool semaphore_free(int sem_id)
{
return syscall(SYSCALL_SEMAPHORE, (intptr_t)SYS_SEM_FREE, (intptr_t)sem_id, 0, 0);
}
bool semaphore_wait(int sem_id)
{
return syscall(SYSCALL_SEMAPHORE, (intptr_t)SYS_SEM_WAIT, (intptr_t)sem_id, 0, 0);
}
bool semaphore_signal(int sem_id)
{
return syscall(SYSCALL_SEMAPHORE, (intptr_t)SYS_SEM_SIGNAL, (intptr_t)sem_id, 0, 0);
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
#include "usyscall.h"
#include "libmem.h"
int spawn(struct Session* session, int fd, ipc_read_fn ipc_read, ipc_fsize_fn ipc_fsize, char* name, char** argv)
{
/* read elf image */
int max_communicate_size = session->capacity - 0x1000;
int file_size = ipc_fsize(session, fd);
void* img = malloc(file_size);
int read_len = 0;
while (read_len < file_size) {
int cur_read_len = file_size - read_len < max_communicate_size ? file_size - read_len : max_communicate_size;
if (cur_read_len < 0) {
return -1;
}
read_len += ipc_read(session, fd, (char*)((uintptr_t)img + read_len), read_len, cur_read_len);
}
/* sys call */
int ret = syscall(SYSCALL_SPAWN, (uintptr_t)img, (uintptr_t)name, (uintptr_t)argv, 0);
free(img);
return ret;
}
int thread(void* entry, const char* name, char** argv)
{
return syscall(SYSCALL_THREAD, (uintptr_t)entry, (uintptr_t)name, (uintptr_t)argv, 0);
}
void exit(int status)
{
syscall(SYSCALL_EXIT, (uintptr_t)status, 0, 0, 0);
}
int yield(task_yield_reason reason)
{
return syscall(SYSCALL_YIELD, (uintptr_t)reason, 0, 0, 0);
}
int kill(int pid)
{
return syscall(SYSCALL_KILL, (intptr_t)pid, 0, 0, 0);
}
int register_server(char* name)
{
return syscall(SYSCALL_SERVER, (intptr_t)name, 0, 0, 0);
}
int session(char* path, int capacity, struct Session* user_session)
{
return syscall(SYSCALL_SESSION, (intptr_t)path, (intptr_t)capacity, (intptr_t)user_session, 0);
}
int poll_session(struct Session* userland_session_arr, int arr_capacity)
{
return syscall(SYSCALL_POLL_SESSION, (intptr_t)userland_session_arr, (intptr_t)arr_capacity, 0, 0);
}
int close_session(struct Session* session)
{
return syscall(SYSCALL_CLOSE_SESSION, (intptr_t)session, 0, 0, 0);
}
int get_memblock_info(sys_state_info* info)
{
return syscall(SYSCALL_SYS_STATE, SYS_STATE_MEMBLOCK_INFO, (intptr_t)info, 0, 0);
}
int set_priority(sys_state_info* info)
{
return syscall(SYSCALL_SYS_STATE, SYS_STATE_SET_TASK_PRIORITY, (intptr_t)info, 0, 0);
}
int task_heap_base()
{
return syscall(SYSCALL_SYS_STATE, SYS_STATE_GET_HEAP_BASE, 0, 0, 0);
}
int show_task()
{
return syscall(SYSCALL_SYS_STATE, SYS_STATE_SHOW_TASKS, 0, 0, 0);
}
int show_mem()
{
return syscall(SYSCALL_SYS_STATE, SYS_STATE_SHOW_MEM_INFO, 0, 0, 0);
}
int show_cpu()
{
return syscall(SYSCALL_SYS_STATE, SYS_STATE_SHOW_CPU_INFO, 0, 0, 0);
}
uintptr_t get_second()
{
sys_state_info info;
syscall(SYSCALL_SYS_STATE, SYS_STATE_GET_CURRENT_SECOND, (intptr_t)&info, 0, 0);
return info.current_second;
}
uintptr_t get_tick()
{
sys_state_info info;
syscall(SYSCALL_SYS_STATE, SYS_STATE_GET_CURRENT_TICK, (intptr_t)&info, 0, 0);
return info.current_tick;
}
uintptr_t mmap(uintptr_t vaddr, uintptr_t paddr, int len, bool is_dev)
{
uintptr_t vaddr_inner = vaddr, paddr_inner = paddr;
if (syscall(SYSCALL_MMAP, (intptr_t)&vaddr_inner, (intptr_t)&paddr_inner, (intptr_t)len, (intptr_t)is_dev) < 0) {
return (uintptr_t)NULL;
}
return vaddr_inner;
}
int naive_mmap(uintptr_t* vaddr, uintptr_t* paddr, int len, bool is_dev)
{
return syscall(SYSCALL_MMAP, (uintptr_t)vaddr, (intptr_t)paddr, (intptr_t)len, (intptr_t)is_dev);
}
int register_irq(int irq, int opcode)
{
return syscall(SYSCALL_REGISTER_IRQ, (intptr_t)irq, (intptr_t)opcode, 0, 0);
}
int semaphore_new(int val)
{
return syscall(SYSCALL_SEMAPHORE, (intptr_t)SYS_SEM_NEW, (intptr_t)val, 0, 0);
}
bool semaphore_free(int sem_id)
{
return syscall(SYSCALL_SEMAPHORE, (intptr_t)SYS_SEM_FREE, (intptr_t)sem_id, 0, 0);
}
bool semaphore_wait(int sem_id)
{
return syscall(SYSCALL_SEMAPHORE, (intptr_t)SYS_SEM_WAIT, (intptr_t)sem_id, 0, 0);
}
bool semaphore_signal(int sem_id)
{
return syscall(SYSCALL_SEMAPHORE, (intptr_t)SYS_SEM_SIGNAL, (intptr_t)sem_id, 0, 0);
}
Ubiquitous/XiZi_AIoT/services/lib/usyscall/usyscall.h
+107 -104
View File
@@ -1,105 +1,108 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
#pragma once
#include <stdint.h>
#include "libserial.h"
#include "session.h"
// clang-format off
#define SYSCALL_TEST 0
#define SYSCALL_SPAWN 1 // generate a brand new task to run elf
#define SYSCALL_EXIT 2 // exit task, delete the task cb
#define SYSCALL_YIELD 3 // yield task, go to scheduler
#define SYSCALL_MMAP 4 // map a virt page to phy page
#define SYSCALL_SERVER 5 // register current task as a server
#define SYSCALL_SESSION 6 // create a session to a server
#define SYSCALL_POLL_SESSION 7 // server poll for it's server sessions
#define SYSCALL_CLOSE_SESSION 8 // client close it's client sessions
#define SYSCALL_THREAD 9 // generate a thread using old memspace
#define SYSCALL_SYS_STATE 10 // run system state
#define SYSCALL_REGISTER_IRQ 11 //
#define SYSCALL_KILL 12 // kill the task by id
#define SYSCALL_SEMAPHORE 13 // semaphore related operations
// clang-format on
typedef enum {
SYS_STATE_TEST = 0,
SYS_STATE_SET_TASK_PRIORITY,
SYS_STATE_GET_HEAP_BASE,
SYS_STATE_MEMBLOCK_INFO,
SYS_STATE_SHOW_TASKS,
SYS_STATE_SHOW_MEM_INFO,
SYS_STATE_SHOW_CPU_INFO,
SYS_STATE_GET_CURRENT_TICK,
SYS_STATE_GET_CURRENT_SECOND,
} sys_state_option;
typedef enum {
SYS_TASK_YIELD_NO_REASON = 0x0,
SYS_TASK_YIELD_FOREVER = 0x1,
SYS_TASK_YIELD_BLOCK_IPC = 0x2,
} task_yield_reason;
typedef union {
struct {
uintptr_t memblock_start;
uintptr_t memblock_end;
} memblock_info;
int priority;
uintptr_t current_tick;
uintptr_t current_second;
} sys_state_info;
typedef enum {
SYS_SEM_NEW = 0,
SYS_SEM_FREE,
SYS_SEM_SIGNAL,
SYS_SEM_WAIT,
} sys_sem_option;
typedef int (*ipc_read_fn)(struct Session* session, int fd, char* dst, int offset, int len);
typedef int (*ipc_fsize_fn)(struct Session* session, int fd);
typedef int (*ipc_write_fn)(struct Session* session, int fd, char* src, int offset, int len);
int syscall(int sys_num, intptr_t a1, intptr_t a2, intptr_t a3, intptr_t a4);
int spawn(struct Session* session, int fd, ipc_read_fn ipc_read, ipc_fsize_fn ipc_fsize, char* name, char** argv);
int thread(void* entry, const char* name, char** argv);
void exit(int status);
int yield(task_yield_reason reason);
int kill(int pid);
int register_server(char* name);
int session(char* path, int capacity, struct Session* user_session);
int poll_session(struct Session* userland_session_arr, int arr_capacity);
int close_session(struct Session* session);
int register_irq(int irq, int opcode);
uintptr_t mmap(uintptr_t vaddr, uintptr_t paddr, int len, bool is_dev);
int naive_mmap(uintptr_t* vaddr, uintptr_t* paddr, int len, bool is_dev);
int task_heap_base();
int get_memblock_info(sys_state_info* info);
int set_priority(sys_state_info* info);
int show_task();
int show_mem();
int show_cpu();
int semaphore_new(int val);
bool semaphore_free(int sem_id);
bool semaphore_wait(int sem_id);
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
#pragma once
#include <stdint.h>
#include "libserial.h"
#include "session.h"
// clang-format off
#define SYSCALL_TEST 0
#define SYSCALL_SPAWN 1 // generate a brand new task to run elf
#define SYSCALL_EXIT 2 // exit task, delete the task cb
#define SYSCALL_YIELD 3 // yield task, go to scheduler
#define SYSCALL_MMAP 4 // map a virt page to phy page
#define SYSCALL_SERVER 5 // register current task as a server
#define SYSCALL_SESSION 6 // create a session to a server
#define SYSCALL_POLL_SESSION 7 // server poll for it's server sessions
#define SYSCALL_CLOSE_SESSION 8 // client close it's client sessions
#define SYSCALL_THREAD 9 // generate a thread using old memspace
#define SYSCALL_SYS_STATE 10 // run system state
#define SYSCALL_REGISTER_IRQ 11 //
#define SYSCALL_KILL 12 // kill the task by id
#define SYSCALL_SEMAPHORE 13 // semaphore related operations
// clang-format on
typedef enum {
SYS_STATE_TEST = 0,
SYS_STATE_SET_TASK_PRIORITY,
SYS_STATE_GET_HEAP_BASE,
SYS_STATE_MEMBLOCK_INFO,
SYS_STATE_SHOW_TASKS,
SYS_STATE_SHOW_MEM_INFO,
SYS_STATE_SHOW_CPU_INFO,
SYS_STATE_GET_CURRENT_TICK,
SYS_STATE_GET_CURRENT_SECOND,
} sys_state_option;
typedef enum {
SYS_TASK_YIELD_NO_REASON = 0x0,
SYS_TASK_YIELD_FOREVER = 0x1,
SYS_TASK_YIELD_BLOCK_IPC = 0x2,
} task_yield_reason;
typedef union {
struct {
uintptr_t memblock_start;
uintptr_t memblock_end;
} memblock_info;
int priority;
uintptr_t current_tick;
uintptr_t current_second;
} sys_state_info;
typedef enum {
SYS_SEM_NEW = 0,
SYS_SEM_FREE,
SYS_SEM_SIGNAL,
SYS_SEM_WAIT,
} sys_sem_option;
typedef int (*ipc_read_fn)(struct Session* session, int fd, char* dst, int offset, int len);
typedef int (*ipc_fsize_fn)(struct Session* session, int fd);
typedef int (*ipc_write_fn)(struct Session* session, int fd, char* src, int offset, int len);
int syscall(int sys_num, intptr_t a1, intptr_t a2, intptr_t a3, intptr_t a4);
int spawn(struct Session* session, int fd, ipc_read_fn ipc_read, ipc_fsize_fn ipc_fsize, char* name, char** argv);
int thread(void* entry, const char* name, char** argv);
void exit(int status);
int yield(task_yield_reason reason);
int kill(int pid);
int register_server(char* name);
int session(char* path, int capacity, struct Session* user_session);
int poll_session(struct Session* userland_session_arr, int arr_capacity);
int close_session(struct Session* session);
int register_irq(int irq, int opcode);
uintptr_t mmap(uintptr_t vaddr, uintptr_t paddr, int len, bool is_dev);
int naive_mmap(uintptr_t* vaddr, uintptr_t* paddr, int len, bool is_dev);
int task_heap_base();
int get_memblock_info(sys_state_info* info);
int set_priority(sys_state_info* info);
int show_task();
int show_mem();
int show_cpu();
uintptr_t get_second();
uintptr_t get_tick();
int semaphore_new(int val);
bool semaphore_free(int sem_id);
bool semaphore_wait(int sem_id);
bool semaphore_signal(int sem_id);
Ubiquitous/XiZi_AIoT/services/net/libnet/Makefile
+7
View File
@@ -17,6 +17,13 @@ cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -
board_specs = stub.o
endif
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
board_specs = $(KERNEL_ROOT)/services/app/stub.o
endif
cc = ${toolchain}gcc
ld = ${toolchain}g++
objdump = ${toolchain}objdump
Ubiquitous/XiZi_AIoT/services/net/net_server/lwip.mk
+7
View File
@@ -18,6 +18,13 @@ cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -
board_specs = $(KERNEL_ROOT)/services/app/stub.o
endif
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
board_specs = $(KERNEL_ROOT)/services/app/stub.o
endif
cc = ${toolchain}gcc
ld = ${toolchain}g++
objdump = ${toolchain}objdump
Ubiquitous/XiZi_AIoT/services/semaphore/Makefile
+2 -2
View File
@@ -9,10 +9,10 @@ user_ldflags = --start-group,-lgcc,-lc,--end-group
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
#cflags = -Wall -g -std=c11
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc
Ubiquitous/XiZi_AIoT/services/shell/letter-shell/Makefile
+2 -2
View File
@@ -8,10 +8,10 @@ toolchain ?= arm-xilinx-eabi-
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
user_ldflags = -N -Ttext 0
endif
ifeq ($(BOARD), ok1028a-c)
ifeq ($(BOARD), 3568)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
cflags = -Wall -O0 -g -std=c11 -mtune=cortex-a55 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
endif
cc = ${toolchain}gcc