From ab578dfe0eaaae26de8d2f96163ae17e86ec4899 Mon Sep 17 00:00:00 2001 From: Liu_Weichao Date: Wed, 13 Oct 2021 17:57:34 +0800 Subject: [PATCH 01/11] support 4G adapter and ec200t device --- .../Framework/connection/4G/EC200T/Kconfig | 2 +- .../Framework/connection/4G/EC200T/ec200t.c | 183 ++++++++++++------ .../Framework/connection/4G/adapter_4G.c | 12 +- APP_Framework/Framework/connection/adapter.h | 14 +- .../Framework/connection/adapter_agent.c | 62 +++++- APP_Framework/Framework/connection/at_agent.h | 14 +- .../connection/bluetooth/HC08/hc08.c | 18 +- .../Framework/connection/zigbee/E18/e18.c | 33 ---- 8 files changed, 218 insertions(+), 120 deletions(-) diff --git a/APP_Framework/Framework/connection/4G/EC200T/Kconfig b/APP_Framework/Framework/connection/4G/EC200T/Kconfig index a9b0ea2c2..a96619f19 100644 --- a/APP_Framework/Framework/connection/4G/EC200T/Kconfig +++ b/APP_Framework/Framework/connection/4G/EC200T/Kconfig @@ -17,7 +17,7 @@ if ADD_XIUOS_FETURES config ADAPTER_EC200T_DRIVER string "EC200T device uart driver path" - default "/dev/uart2_dev2" + default "/dev/usart2_dev2" depends on !ADAPTER_EC200T_DRIVER_EXTUART if ADAPTER_EC200T_DRIVER_EXTUART diff --git a/APP_Framework/Framework/connection/4G/EC200T/ec200t.c b/APP_Framework/Framework/connection/4G/EC200T/ec200t.c index 1185fc59c..25994ab64 100644 --- a/APP_Framework/Framework/connection/4G/EC200T/ec200t.c +++ b/APP_Framework/Framework/connection/4G/EC200T/ec200t.c @@ -21,6 +21,21 @@ #include #include +#define EC200T_AT_MODE_CMD "+++" +#define EC200T_GET_CCID_CMD "AT+CCID\r\n" +#define EC200T_GET_CPIN_CMD "AT+CPIN?\r\n" +#define EC200T_GET_CREG_CMD "AT+CREG?\r\n" +#define EC200T_OPEN_SOCKET_CMD "AT+QIOPEN=1,%u" +#define EC200T_CLOSE_SOCKET_CMD "AT+QICLOSE=%u\r\n" +#define EC200T_ACTIVE_PDP_CMD "AT+QIACT=1\r\n" +#define EC200T_DEACTIVE_PDP_CMD "AT+QIDEACT=1\r\n" +#define EC200T_CFG_TCP_CMD "AT+QICSGP" + +#define EC200T_OK_REPLY "OK" +#define EC200T_READY_REPLY "READY" +#define EC200T_CREG_REPLY ",1" +#define EC200T_CONNECT_REPLY "CONNECT" + static void Ec200tPowerSet(void) { int pin_fd; @@ -47,6 +62,8 @@ static void Ec200tPowerSet(void) PrivWrite(pin_fd, &pin_stat, 1); PrivClose(pin_fd); + + PrivTaskDelay(10000); } static int Ec200tOpen(struct Adapter *adapter) @@ -70,32 +87,6 @@ static int Ec200tOpen(struct Adapter *adapter) adapter->agent = at_agent; } - /*step3: serial write "+++", quit transparent mode*/ - ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "+++"); - - /*step4: serial write "AT+CCID", get SIM ID*/ - ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "AT+CCID\r\n"); - - PrivTaskDelay(2500); - - /*step5: serial write "AT+CPIN?", check SIM status*/ - ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "AT+CPIN?\r\n"); - - PrivTaskDelay(2500); - - /*step6: serial write "AT+CREG?", check whether registered to GSM net*/ - ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "AT+CREG?\r\n"); - - PrivTaskDelay(2500); - - /*step7: serial write "AT+QICLOSE", close socket connect before open socket*/ - ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "AT+QICLOSE=0\r\n"); - - PrivTaskDelay(2500); - - /*step8: serial write "AT+QIDEACT", close TCP net before open socket*/ - ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "AT+QIDEACT=1\r\n"); - PrivTaskDelay(2500); ADAPTER_DEBUG("Ec200t open done\n"); @@ -105,31 +96,41 @@ static int Ec200tOpen(struct Adapter *adapter) static int Ec200tClose(struct Adapter *adapter) { + int ret = 0; + uint8_t ec200t_cmd[64]; + if (!adapter->agent) { printf("Ec200tClose AT agent NULL\n"); return -1; } + AtSetReplyEndChar(adapter->agent, 0x4F, 0x4B); + /*step1: serial write "+++", quit transparent mode*/ ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "+++"); /*step2: serial write "AT+QICLOSE", close socket connect before open socket*/ - ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "AT+QICLOSE=0\r\n"); - - PrivTaskDelay(2500); + memset(ec200t_cmd, 0, sizeof(ec200t_cmd)); + sprintf(ec200t_cmd, EC200T_CLOSE_SOCKET_CMD, adapter->socket.socket_id); + ret = AtCmdConfigAndCheck(adapter->agent, ec200t_cmd, EC200T_OK_REPLY); + if (ret < 0) { + goto out; + } /*step3: serial write "AT+QIDEACT", close TCP net before open socket*/ - ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "AT+QIDEACT=1\r\n"); - - PrivTaskDelay(2500); + ret = AtCmdConfigAndCheck(adapter->agent, EC200T_DEACTIVE_PDP_CMD, EC200T_OK_REPLY); + if (ret < 0) { + goto out; + } +out: /*step4: close ec200t serial port*/ PrivClose(adapter->fd); /*step5: power down ec200t*/ Ec200tPowerSet(); - return 0; + return ret; } static int Ec200tIoctl(struct Adapter *adapter, int cmd, void *args) @@ -159,15 +160,41 @@ static int Ec200tIoctl(struct Adapter *adapter, int cmd, void *args) ioctl_cfg.ioctl_driver_type = SERIAL_TYPE; ioctl_cfg.args = &serial_cfg; PrivIoctl(adapter->fd, OPE_INT, &ioctl_cfg); + + Ec200tPowerSet(); return 0; } static int Ec200tConnect(struct Adapter *adapter, enum NetRoleType net_role, const char *ip, const char *port, enum IpType ip_type) { + int ret = 0; uint8_t ec200t_cmd[64]; - /*step1: serial write "AT+QICSGP", connect to China Mobile using ipv4 or ipv6*/ + AtSetReplyEndChar(adapter->agent, 0x4F, 0x4B); + + /*step1: serial write "+++", quit transparent mode*/ + ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "+++"); + + /*step2: serial write "AT+CCID", get SIM ID*/ + ret = AtCmdConfigAndCheck(adapter->agent, EC200T_GET_CCID_CMD, EC200T_OK_REPLY); + if (ret < 0) { + goto out; + } + + /*step3: serial write "AT+CPIN?", check SIM status*/ + ret = AtCmdConfigAndCheck(adapter->agent, EC200T_GET_CPIN_CMD, EC200T_READY_REPLY); + if (ret < 0) { + goto out; + } + + /*step4: serial write "AT+CREG?", check whether registered to GSM net*/ + ret = AtCmdConfigAndCheck(adapter->agent, EC200T_GET_CREG_CMD, EC200T_CREG_REPLY); + if (ret < 0) { + goto out; + } + + /*step5: serial write "AT+QICSGP", connect to China Mobile using ipv4 or ipv6*/ memset(ec200t_cmd, 0, sizeof(ec200t_cmd)); if (IPV4 == ip_type) { @@ -176,58 +203,105 @@ static int Ec200tConnect(struct Adapter *adapter, enum NetRoleType net_role, con strcpy(ec200t_cmd, "AT+QICSGP=1,2,\"CMNET\",\"\",\"\",1\r\n"); } - ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, ec200t_cmd); + ret = AtCmdConfigAndCheck(adapter->agent, ec200t_cmd, EC200T_OK_REPLY); + if (ret < 0) { + goto out; + } - PrivTaskDelay(2500); - - /*step2: serial write "AT+QIACT", open TCP net*/ - ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "AT+QIACT=1\r\n"); - - PrivTaskDelay(2500); - - /*step3: serial write "AT+QIOPEN", connect socket using TCP*/ + /*step6: serial write "AT+QICLOSE", close socket connect before open socket*/ memset(ec200t_cmd, 0, sizeof(ec200t_cmd)); - strcpy(ec200t_cmd, "AT+QIOPEN=1,0,\"TCP\",\""); + sprintf(ec200t_cmd, EC200T_CLOSE_SOCKET_CMD, adapter->socket.socket_id); + ret = AtCmdConfigAndCheck(adapter->agent, ec200t_cmd, EC200T_OK_REPLY); + if (ret < 0) { + goto out; + } + + /*step7: serial write "AT+QIDEACT", close TCP net before open socket*/ + ret = AtCmdConfigAndCheck(adapter->agent, EC200T_DEACTIVE_PDP_CMD, EC200T_OK_REPLY); + if (ret < 0) { + goto out; + } + + /*step8: serial write "AT+QIACT", open TCP net*/ + ret = AtCmdConfigAndCheck(adapter->agent, EC200T_ACTIVE_PDP_CMD, EC200T_OK_REPLY); + if (ret < 0) { + goto out; + } + + /*step9: serial write "AT+QIOPEN", connect socket using TCP*/ + memset(ec200t_cmd, 0, sizeof(ec200t_cmd)); + sprintf(ec200t_cmd, EC200T_OPEN_SOCKET_CMD, adapter->socket.socket_id); + strcat(ec200t_cmd, ",\"TCP\",\""); strcat(ec200t_cmd, ip); strcat(ec200t_cmd, "\","); strcat(ec200t_cmd, port); strcat(ec200t_cmd, ",0,2\r\n"); - ADAPTER_DEBUG("Ec200t connect AT CMD :%s\n", ec200t_cmd); - ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, ec200t_cmd); + AtSetReplyEndChar(adapter->agent, 0x43, 0x54); + + ret = AtCmdConfigAndCheck(adapter->agent, ec200t_cmd, EC200T_CONNECT_REPLY); + if (ret < 0) { + goto out; + } ADAPTER_DEBUG("Ec200t connect TCP done\n"); return 0; + +out: + ADAPTER_DEBUG("Ec200t connect TCP failed. Power down\n"); + Ec200tPowerSet(); + return -1; } static int Ec200tSend(struct Adapter *adapter, const void *buf, size_t len) { - PrivWrite(adapter->fd, buf, len); + x_err_t result = EOK; + if (adapter->agent) { + EntmSend(adapter->agent, (const char *)buf, len); + } else { + printf("Ec200tSend can not find agent\n"); + } return 0; } static int Ec200tRecv(struct Adapter *adapter, void *buf, size_t len) { - PrivRead(adapter->fd, buf, len); - return 0; + if (adapter->agent) { + return EntmRecv(adapter->agent, (char *)buf, len, 40000); + } else { + printf("Ec200tRecv can not find agent\n"); + } + + return -1; } static int Ec200tDisconnect(struct Adapter *adapter) { + int ret = 0; uint8_t ec200t_cmd[64]; + + AtSetReplyEndChar(adapter->agent, 0x4F, 0x4B); /*step1: serial write "+++", quit transparent mode*/ ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "+++"); /*step2: serial write "AT+QICLOSE", close socket connect before open socket*/ - ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "AT+QICLOSE=0\r\n"); - - PrivTaskDelay(2500); + memset(ec200t_cmd, 0, sizeof(ec200t_cmd)); + sprintf(ec200t_cmd, EC200T_CLOSE_SOCKET_CMD, adapter->socket.socket_id); + ret = AtCmdConfigAndCheck(adapter->agent, ec200t_cmd, EC200T_OK_REPLY); + if (ret < 0) { + goto out; + } ADAPTER_DEBUG("Ec200t disconnect TCP done\n"); return 0; + +out: + ADAPTER_DEBUG("Ec200t disconnect TCP failed. Power down\n"); + Ec200tPowerSet(); + return -1; } static const struct IpProtocolDone ec200t_done = @@ -261,10 +335,5 @@ AdapterProductInfoType Ec200tAttach(struct Adapter *adapter) product_info->model_done = (void *)&ec200t_done; - Ec200tPowerSet(); - return product_info; } - - - diff --git a/APP_Framework/Framework/connection/4G/adapter_4G.c b/APP_Framework/Framework/connection/4G/adapter_4G.c index c8728ee46..cb81c65fb 100644 --- a/APP_Framework/Framework/connection/4G/adapter_4G.c +++ b/APP_Framework/Framework/connection/4G/adapter_4G.c @@ -95,16 +95,18 @@ int Adapter4GTest(void) uint8 server_addr[64] = "115.238.53.61"; uint8 server_port[64] = "33333"; + adapter->socket.socket_id = 0; + AdapterDeviceOpen(adapter); AdapterDeviceControl(adapter, OPE_INT, &baud_rate); AdapterDeviceConnect(adapter, CLIENT, server_addr, server_port, IPV4); - while (1) { - AdapterDeviceSend(adapter, send_msg, strlen(send_msg)); - AdapterDeviceRecv(adapter, recv_msg, 128); - printf("4G recv msg %s\n", recv_msg); - } + // while (1) { + // AdapterDeviceSend(adapter, send_msg, strlen(send_msg)); + // AdapterDeviceRecv(adapter, recv_msg, 128); + // printf("4G recv msg %s\n", recv_msg); + // } #endif return 0; diff --git a/APP_Framework/Framework/connection/adapter.h b/APP_Framework/Framework/connection/adapter.h index 380aaa65c..eb492301c 100644 --- a/APP_Framework/Framework/connection/adapter.h +++ b/APP_Framework/Framework/connection/adapter.h @@ -42,7 +42,7 @@ extern "C" { #ifdef CONNECTION_FRAMEWORK_DEBUG #define ADAPTER_DEBUG printf #else -#define ADAPTER_DEBUF +#define ADAPTER_DEBUG #endif struct Adapter; @@ -52,8 +52,14 @@ typedef struct AdapterProductInfo *AdapterProductInfoType; struct Socket { - int id; - struct Adapter *adapter; + uint8_t type; ///< socket type:DGRAM->UDP,STREAM->TCP + uint8_t protocal; ///< udp or tcp + unsigned short listen_port; ///< 0-65535 + uint8_t socket_id; ///< socket id + uint8_t recv_control; ///< receive control + uint8_t af_type; ///< IPv4 or IPv6 + char *src_ip_addr; ///< source P address + char *dst_ip_addr; ///< destination IP address }; enum AdapterType @@ -156,7 +162,7 @@ struct Adapter struct AdapterProductInfo *info; ATAgentType agent; - //struct Socket *socket; + struct Socket socket; enum NetProtocolType net_protocol; enum NetRoleType net_role; diff --git a/APP_Framework/Framework/connection/adapter_agent.c b/APP_Framework/Framework/connection/adapter_agent.c index 874dd6e30..5a87b7ca6 100755 --- a/APP_Framework/Framework/connection/adapter_agent.c +++ b/APP_Framework/Framework/connection/adapter_agent.c @@ -175,18 +175,67 @@ __out: return result; } +int AtCmdConfigAndCheck(ATAgentType agent, char *cmd, char *check) +{ + int ret = 0; + char *result = NULL; + if (NULL == agent || NULL == cmd || NULL == check ) { + return -1; + } + + ATReplyType reply = CreateATReply(64); + if (NULL == reply) { + printf("%s %d at_create_resp failed!\n",__func__,__LINE__); + ret = -1; + goto __exit; + } + + ATOrderSend(agent, REPLY_TIME_OUT, reply, cmd); + PrivTaskDelay(3000); + + result = GetReplyText(reply); + if (!result) { + printf("%s %n get reply failed.\n",__func__,__LINE__); + ret = -1; + goto __exit; + } + printf("[reply result :\n"); + printf("%s]\n", result); + if(!strstr(result, check)) { + printf("%s %d check[%s] reply[%s] failed.\n",__func__,__LINE__,check,result); + ret = -1; + goto __exit; + } + +__exit: + DeleteATReply(reply); + return ret; +} + char *GetReplyText(ATReplyType reply) { return reply->reply_buffer; } -int AtSetReplyEndChar(ATAgentType agent, char ch) +int AtSetReplyLrEnd(ATAgentType agent, char enable) { if (!agent) { return -ERROR; } - agent->reply_end_char = ch; + agent->reply_lr_end = enable; + + return EOK; +} + +int AtSetReplyEndChar(ATAgentType agent, char last_ch, char end_ch) +{ + if (!agent) { + return -ERROR; + } + + agent->reply_end_last_char = last_ch; + agent->reply_end_char = end_ch; return EOK; } @@ -284,10 +333,11 @@ static int GetCompleteATReply(ATAgentType agent) is_full = true; } - if ((ch == '\n' && last_ch == '\r') || - ((ch == agent->reply_end_char) && (agent->reply_end_char)) || + if (((ch == '\n') && (last_ch == '\r') && (agent->reply_lr_end)) || + ((ch == agent->reply_end_char) && (agent->reply_end_char) && + (last_ch == agent->reply_end_last_char) && (agent->reply_end_last_char)) || ((read_len == agent->reply_char_num) && (agent->reply_char_num))){ - if (is_full){ + if (is_full) { printf("read line failed. The line data length is out of buffer size(%d)!", agent->maintain_max); memset(agent->maintain_buffer, 0x00, agent->maintain_max); agent->maintain_len = 0; @@ -351,7 +401,7 @@ static void *ATAgentReceiveProcess(void *param) if (agent->reply != NULL){ ATReplyType reply = agent->reply; - agent->maintain_buffer[agent->maintain_len - 1] = '\0'; + agent->maintain_buffer[agent->maintain_len] = '\0'; if (agent->maintain_len < reply->reply_max_len){ memcpy(reply->reply_buffer, agent->maintain_buffer, agent->maintain_len); diff --git a/APP_Framework/Framework/connection/at_agent.h b/APP_Framework/Framework/connection/at_agent.h index d9acd71e5..527de572a 100755 --- a/APP_Framework/Framework/connection/at_agent.h +++ b/APP_Framework/Framework/connection/at_agent.h @@ -26,6 +26,8 @@ #include #include +#define REPLY_TIME_OUT 3000 + enum ReceiveMode { ENTM_MODE = 1, @@ -52,6 +54,8 @@ struct ATAgent int lock; ATReplyType reply; + char reply_lr_end; + char reply_end_last_char; char reply_end_char; uint32 reply_char_num; int rsp_sem; @@ -69,18 +73,18 @@ typedef struct ATAgent *ATAgentType; int EntmSend(ATAgentType agent, const char *data, int len); int EntmRecv(ATAgentType agent, char *rev_buffer, int buffer_len, int timeout_s); char *GetReplyText(ATReplyType reply); -int AtSetReplyEndChar(ATAgentType agent, char ch); +int AtSetReplyEndChar(ATAgentType agent, char last_ch, char end_ch); int AtSetReplyCharNum(ATAgentType agent, unsigned int num); +int AtSetReplyLrEnd(ATAgentType agent, char enable); ATReplyType CreateATReply(uint32 reply_max_len); -uint IpTint(char *ipstr); +unsigned int IpTint(char *ipstr); void SwapStr(char *str, int begin, int end); -char* IpTstr(uint ipint); +char* IpTstr(unsigned int ipint); ATAgentType GetATAgent(const char *agent_name); int InitATAgent(const char *agent_name, int fd, uint32 maintain_max); int ParseATReply(char* str, const char *format, ...); void DeleteATReply(ATReplyType reply); int ATOrderSend(ATAgentType agent, uint32 timeout_s, ATReplyType reply, const char *cmd_expr, ...); - -#define REPLY_TIME_OUT 3000 +int AtCmdConfigAndCheck(ATAgentType agent, char *cmd, char *check); #endif \ No newline at end of file diff --git a/APP_Framework/Framework/connection/bluetooth/HC08/hc08.c b/APP_Framework/Framework/connection/bluetooth/HC08/hc08.c index d2d94ee0e..44cff9c80 100644 --- a/APP_Framework/Framework/connection/bluetooth/HC08/hc08.c +++ b/APP_Framework/Framework/connection/bluetooth/HC08/hc08.c @@ -98,19 +98,19 @@ static int Hc08AtConfigure(ATAgentType agent, enum Hc08AtCmd hc08_at_cmd, void * switch (hc08_at_cmd) { case HC08_AT_CMD_DETECT: - AtSetReplyEndChar(agent, 0x4B); + AtSetReplyEndChar(agent, 0x4F, 0x4B); ATOrderSend(agent, REPLY_TIME_OUT, reply, HC08_DETECT_CMD); break; case HC08_AT_CMD_DEFAULT: - AtSetReplyEndChar(agent, 0x4B); + AtSetReplyEndChar(agent, 0x4F, 0x4B); ATOrderSend(agent, REPLY_TIME_OUT, reply, HC08_DEFAULT_CMD); break; case HC08_AT_CMD_RESET: - AtSetReplyEndChar(agent, 0x4B); + AtSetReplyEndChar(agent, 0x4F, 0x4B); ATOrderSend(agent, REPLY_TIME_OUT, reply, HC08_RESET_CMD); break; case HC08_AT_CMD_CLEAR: - AtSetReplyEndChar(agent, 0x4B); + AtSetReplyEndChar(agent, 0x4F, 0x4B); ATOrderSend(agent, REPLY_TIME_OUT, reply, HC08_CLEAR_CMD); break; case HC08_AT_CMD_GET_DEVICE_INFO: @@ -121,23 +121,23 @@ static int Hc08AtConfigure(ATAgentType agent, enum Hc08AtCmd hc08_at_cmd, void * baudrate = *(unsigned int *)param; sprintf(cmd_str, HC08_SET_BAUDRATE_CMD, baudrate); strcat(cmd_str, ",N"); - AtSetReplyEndChar(agent, 0x45); + AtSetReplyEndChar(agent, 0x4E, 0x45); ATOrderSend(agent, REPLY_TIME_OUT, reply, cmd_str); reply_ok_flag = 0; break; case HC08_AT_CMD_GET_BAUDRATE: - AtSetReplyEndChar(agent, 0x4E); + AtSetReplyEndChar(agent, 0x2C, 0x4E); ATOrderSend(agent, REPLY_TIME_OUT, reply, HC08_GET_BAUDRATE_CMD); reply_ok_flag = 0; break; case HC08_AT_CMD_SET_CONNECTABLE: connectable = (char *)param; sprintf(cmd_str, HC08_SET_CONNECTABLE, connectable); - AtSetReplyEndChar(agent, 0x4B); + AtSetReplyEndChar(agent, 0x4F, 0x4B); ATOrderSend(agent, REPLY_TIME_OUT, reply, cmd_str); break; case HC08_AT_CMD_GET_CONNECTABLE: - AtSetReplyEndChar(agent, 0x65); + AtSetReplyEndChar(agent, 0x6C, 0x65); ATOrderSend(agent, REPLY_TIME_OUT, reply, HC08_GET_CONNECTABLE); reply_ok_flag = 0; break; @@ -346,7 +346,7 @@ static int Hc08Send(struct Adapter *adapter, const void *buf, size_t len) x_err_t result = EOK; if (adapter->agent) { EntmSend(adapter->agent, (const char *)buf, len); - }else { + } else { printf("Hc08Send can not find agent\n"); } return 0; diff --git a/APP_Framework/Framework/connection/zigbee/E18/e18.c b/APP_Framework/Framework/connection/zigbee/E18/e18.c index 7bd814a74..1342ad63d 100644 --- a/APP_Framework/Framework/connection/zigbee/E18/e18.c +++ b/APP_Framework/Framework/connection/zigbee/E18/e18.c @@ -79,39 +79,6 @@ static int E18UartOpen(struct Adapter *adapter) return 0; } - -static int AtCmdConfigAndCheck(ATAgentType agent, char *cmd, char *check) -{ - char *result = NULL; - if (NULL == agent || NULL == cmd || NULL == check ) { - return -1; - } - - ATReplyType reply = CreateATReply(64); - if (NULL == reply) { - printf("%s %d at_create_resp failed!\n",__func__,__LINE__); - return -1; - } - - ATOrderSend(agent, REPLY_TIME_OUT, reply, cmd); - PrivTaskDelay(3000); - - result = GetReplyText(reply); - if (!result) { - printf("%s %n get reply failed.\n",__func__,__LINE__); - goto __exit; - } - if(0 != strncmp(result, check, strlen(check))) { - printf("%s %d check[%s] reply[%s] failed.\n",__func__,__LINE__,check,result); - goto __exit; - } - return 0; - -__exit: - DeleteATReply(reply); - return -1; -} - static int E18NetworkModeConfig(struct Adapter *adapter) { int ret = 0; From ecfbdb207f17a474cd8bdb85a7f6848f72bd87c0 Mon Sep 17 00:00:00 2001 From: chunyexixiaoyu <834670833@qq.com> Date: Thu, 14 Oct 2021 10:44:19 +0800 Subject: [PATCH 02/11] Ubiquitous/RT_Thread/:update submodule version --- Ubiquitous/RT_Thread/bsp/k210/kendryte-sdk/kendryte-sdk-source | 2 +- Ubiquitous/RT_Thread/rt-thread | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Ubiquitous/RT_Thread/bsp/k210/kendryte-sdk/kendryte-sdk-source b/Ubiquitous/RT_Thread/bsp/k210/kendryte-sdk/kendryte-sdk-source index 9e287a604..77d9df93b 160000 --- a/Ubiquitous/RT_Thread/bsp/k210/kendryte-sdk/kendryte-sdk-source +++ b/Ubiquitous/RT_Thread/bsp/k210/kendryte-sdk/kendryte-sdk-source @@ -1 +1 @@ -Subproject commit 9e287a604e2e59abc46d936d35065d9aadd72ebc +Subproject commit 77d9df93ba7c2c886967995425638477cd139c4f diff --git a/Ubiquitous/RT_Thread/rt-thread b/Ubiquitous/RT_Thread/rt-thread index c3afd9cc2..06fdc108b 160000 --- a/Ubiquitous/RT_Thread/rt-thread +++ b/Ubiquitous/RT_Thread/rt-thread @@ -1 +1 @@ -Subproject commit c3afd9cc2363bb7ac26d28a0bf5f8f70cf0ee2dd +Subproject commit 06fdc108b420f34044a132a19c9adbebf86a7a90 From 0eee31179c6df920fa624d24b41bfd992aa48aea Mon Sep 17 00:00:00 2001 From: chunyexixiaoyu <834670833@qq.com> Date: Thu, 14 Oct 2021 10:58:21 +0800 Subject: [PATCH 03/11] Ubiquitous/RT_Thread/:update stm32 configure file and solve ov2640 driver compile bug. --- .../bsp/stm32f407-atk-coreboard/.config | 184 +++++++++++++++--- .../bsp/stm32f407-atk-coreboard/rtconfig.h | 129 +++++++++++- .../drivers/ov2640/ov2640_source/drv_ov2640.h | 2 + 3 files changed, 285 insertions(+), 30 deletions(-) diff --git a/Ubiquitous/RT_Thread/bsp/stm32f407-atk-coreboard/.config b/Ubiquitous/RT_Thread/bsp/stm32f407-atk-coreboard/.config index f4caa0c56..681cee720 100644 --- a/Ubiquitous/RT_Thread/bsp/stm32f407-atk-coreboard/.config +++ b/Ubiquitous/RT_Thread/bsp/stm32f407-atk-coreboard/.config @@ -33,8 +33,9 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 # # CONFIG_RT_KSERVICE_USING_STDLIB is not set # CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_ASM_MEMCPY is not set CONFIG_RT_DEBUG=y -# CONFIG_RT_DEBUG_COLOR is not set +CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set # CONFIG_RT_DEBUG_THREAD_CONFIG is not set # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set @@ -60,10 +61,12 @@ CONFIG_RT_USING_MESSAGEQUEUE=y # Memory Management # CONFIG_RT_USING_MEMPOOL=y -# CONFIG_RT_USING_MEMHEAP is not set +CONFIG_RT_USING_MEMHEAP=y +CONFIG_RT_USING_MEMHEAP_AUTO_BINDING=y # CONFIG_RT_USING_NOHEAP is not set -CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SMALL_MEM is not set # CONFIG_RT_USING_SLAB is not set +CONFIG_RT_USING_MEMHEAP_AS_HEAP=y # CONFIG_RT_USING_USERHEAP is not set # CONFIG_RT_USING_MEMTRACE is not set CONFIG_RT_USING_HEAP=y @@ -77,6 +80,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" +# CONFIG_RT_PRINTF_LONGLONG is not set CONFIG_RT_VER_NUM=0x40004 CONFIG_ARCH_ARM=y CONFIG_RT_USING_CPU_FFS=y @@ -101,19 +105,19 @@ CONFIG_RT_MAIN_THREAD_PRIORITY=10 # Command shell # CONFIG_RT_USING_FINSH=y +CONFIG_RT_USING_MSH=y +CONFIG_FINSH_USING_MSH=y CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 CONFIG_FINSH_USING_HISTORY=y CONFIG_FINSH_HISTORY_LINES=5 CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y CONFIG_FINSH_USING_DESCRIPTION=y # CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set -CONFIG_FINSH_THREAD_PRIORITY=20 -CONFIG_FINSH_THREAD_STACK_SIZE=4096 -CONFIG_FINSH_CMD_SIZE=80 # CONFIG_FINSH_USING_AUTH is not set -CONFIG_FINSH_USING_MSH=y -CONFIG_FINSH_USING_MSH_DEFAULT=y -# CONFIG_FINSH_USING_MSH_ONLY is not set CONFIG_FINSH_ARG_MAX=10 # @@ -147,17 +151,23 @@ CONFIG_RT_DFS_ELM_DRIVES=2 CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512 # CONFIG_RT_DFS_ELM_USE_ERASE is not set CONFIG_RT_DFS_ELM_REENTRANT=y +CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000 CONFIG_RT_USING_DFS_DEVFS=y # CONFIG_RT_USING_DFS_ROMFS is not set # CONFIG_RT_USING_DFS_RAMFS is not set +# CONFIG_RT_USING_DFS_NFS is not set # # Device Drivers # CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_PIPE_BUFSZ=512 -# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SYSTEM_WORKQUEUE=y +CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 +CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set CONFIG_RT_SERIAL_USING_DMA=y CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_CAN is not set @@ -190,7 +200,33 @@ CONFIG_RT_USING_SPI_MSD=y # CONFIG_RT_USING_HWCRYPTO is not set # CONFIG_RT_USING_PULSE_ENCODER is not set # CONFIG_RT_USING_INPUT_CAPTURE is not set -# CONFIG_RT_USING_WIFI is not set +CONFIG_RT_USING_WIFI=y +CONFIG_RT_WLAN_DEVICE_STA_NAME="wlan0" +CONFIG_RT_WLAN_DEVICE_AP_NAME="wlan1" +CONFIG_RT_WLAN_SSID_MAX_LENGTH=32 +CONFIG_RT_WLAN_PASSWORD_MAX_LENGTH=32 +CONFIG_RT_WLAN_DEV_EVENT_NUM=2 +CONFIG_RT_WLAN_MANAGE_ENABLE=y +CONFIG_RT_WLAN_SCAN_WAIT_MS=10000 +CONFIG_RT_WLAN_CONNECT_WAIT_MS=10000 +CONFIG_RT_WLAN_SCAN_SORT=y +CONFIG_RT_WLAN_MSH_CMD_ENABLE=y +CONFIG_RT_WLAN_AUTO_CONNECT_ENABLE=y +CONFIG_AUTO_CONNECTION_PERIOD_MS=2000 +CONFIG_RT_WLAN_CFG_ENABLE=y +CONFIG_RT_WLAN_CFG_INFO_MAX=3 +CONFIG_RT_WLAN_PROT_ENABLE=y +CONFIG_RT_WLAN_PROT_NAME_LEN=8 +CONFIG_RT_WLAN_PROT_MAX=2 +CONFIG_RT_WLAN_DEFAULT_PROT="lwip" +CONFIG_RT_WLAN_PROT_LWIP_ENABLE=y +CONFIG_RT_WLAN_PROT_LWIP_NAME="lwip" +# CONFIG_RT_WLAN_PROT_LWIP_PBUF_FORCE is not set +CONFIG_RT_WLAN_WORK_THREAD_ENABLE=y +CONFIG_RT_WLAN_WORKQUEUE_THREAD_NAME="wlan" +CONFIG_RT_WLAN_WORKQUEUE_THREAD_SIZE=2048 +CONFIG_RT_WLAN_WORKQUEUE_THREAD_PRIO=15 +# CONFIG_RT_WLAN_DEBUG is not set # # Using USB @@ -202,14 +238,16 @@ CONFIG_RT_USING_SPI_MSD=y # POSIX layer and C standard library # CONFIG_RT_USING_LIBC=y -# CONFIG_RT_USING_PTHREADS is not set +CONFIG_RT_USING_PTHREADS=y +CONFIG_PTHREAD_NUM_MAX=8 CONFIG_RT_USING_POSIX=y # CONFIG_RT_USING_POSIX_MMAP is not set # CONFIG_RT_USING_POSIX_TERMIOS is not set # CONFIG_RT_USING_POSIX_GETLINE is not set # CONFIG_RT_USING_POSIX_AIO is not set +CONFIG_RT_LIBC_USING_TIME=y # CONFIG_RT_USING_MODULE is not set -CONFIG_RT_LIBC_FIXED_TIMEZONE=8 +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # # Network @@ -218,22 +256,93 @@ CONFIG_RT_LIBC_FIXED_TIMEZONE=8 # # Socket abstraction layer # -# CONFIG_RT_USING_SAL is not set +CONFIG_RT_USING_SAL=y +CONFIG_SAL_INTERNET_CHECK=y + +# +# protocol stack implement +# +CONFIG_SAL_USING_LWIP=y +# CONFIG_SAL_USING_POSIX is not set +CONFIG_SAL_SOCKETS_NUM=16 # # Network interface device # -# CONFIG_RT_USING_NETDEV is not set +CONFIG_RT_USING_NETDEV=y +CONFIG_NETDEV_USING_IFCONFIG=y +CONFIG_NETDEV_USING_PING=y +CONFIG_NETDEV_USING_NETSTAT=y +CONFIG_NETDEV_USING_AUTO_DEFAULT=y +# CONFIG_NETDEV_USING_IPV6 is not set +CONFIG_NETDEV_IPV4=1 +CONFIG_NETDEV_IPV6=0 +# CONFIG_NETDEV_IPV6_SCOPES is not set # # light weight TCP/IP stack # -# CONFIG_RT_USING_LWIP is not set +CONFIG_RT_USING_LWIP=y +# CONFIG_RT_USING_LWIP141 is not set +# CONFIG_RT_USING_LWIP202 is not set +CONFIG_RT_USING_LWIP203=y +# CONFIG_RT_USING_LWIP212 is not set +# CONFIG_RT_USING_LWIP_IPV6 is not set +CONFIG_RT_LWIP_MEM_ALIGNMENT=4 +CONFIG_RT_LWIP_IGMP=y +CONFIG_RT_LWIP_ICMP=y +# CONFIG_RT_LWIP_SNMP is not set +CONFIG_RT_LWIP_DNS=y +CONFIG_RT_LWIP_DHCP=y +CONFIG_IP_SOF_BROADCAST=1 +CONFIG_IP_SOF_BROADCAST_RECV=1 + +# +# Static IPv4 Address +# +CONFIG_RT_LWIP_IPADDR="192.168.1.30" +CONFIG_RT_LWIP_GWADDR="192.168.1.1" +CONFIG_RT_LWIP_MSKADDR="255.255.255.0" +CONFIG_RT_LWIP_UDP=y +CONFIG_RT_LWIP_TCP=y +CONFIG_RT_LWIP_RAW=y +# CONFIG_RT_LWIP_PPP is not set +CONFIG_RT_MEMP_NUM_NETCONN=8 +CONFIG_RT_LWIP_PBUF_NUM=16 +CONFIG_RT_LWIP_RAW_PCB_NUM=4 +CONFIG_RT_LWIP_UDP_PCB_NUM=4 +CONFIG_RT_LWIP_TCP_PCB_NUM=4 +CONFIG_RT_LWIP_TCP_SEG_NUM=40 +CONFIG_RT_LWIP_TCP_SND_BUF=8196 +CONFIG_RT_LWIP_TCP_WND=8196 +CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=10 +CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=8 +CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=1024 +# CONFIG_LWIP_NO_RX_THREAD is not set +# CONFIG_LWIP_NO_TX_THREAD is not set +CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12 +CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=1024 +CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8 +# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set +CONFIG_LWIP_NETIF_STATUS_CALLBACK=1 +CONFIG_LWIP_NETIF_LINK_CALLBACK=1 +CONFIG_SO_REUSE=1 +CONFIG_LWIP_SO_RCVTIMEO=1 +CONFIG_LWIP_SO_SNDTIMEO=1 +CONFIG_LWIP_SO_RCVBUF=1 +CONFIG_LWIP_SO_LINGER=0 +# CONFIG_RT_LWIP_NETIF_LOOPBACK is not set +CONFIG_LWIP_NETIF_LOOPBACK=0 +# CONFIG_RT_LWIP_STATS is not set +# CONFIG_RT_LWIP_USING_HW_CHECKSUM is not set +CONFIG_RT_LWIP_USING_PING=y +# CONFIG_RT_LWIP_DEBUG is not set # # AT commands # # CONFIG_RT_USING_AT is not set +# CONFIG_LWIP_USING_DHCPD is not set # # VBUS(Virtual Software BUS) @@ -246,6 +355,7 @@ CONFIG_RT_LIBC_FIXED_TIMEZONE=8 # CONFIG_RT_USING_RYM is not set # CONFIG_RT_USING_ULOG is not set # CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set # CONFIG_RT_USING_RT_LINK is not set # CONFIG_RT_USING_LWP is not set @@ -285,7 +395,9 @@ CONFIG_BSP_USING_UART=y CONFIG_BSP_USING_UART1=y # CONFIG_BSP_UART1_RX_USING_DMA is not set # CONFIG_BSP_UART1_TX_USING_DMA is not set -# CONFIG_BSP_USING_UART2 is not set +CONFIG_BSP_USING_UART2=y +# CONFIG_BSP_UART2_RX_USING_DMA is not set +# CONFIG_BSP_UART2_TX_USING_DMA is not set # CONFIG_BSP_USING_UART3 is not set # CONFIG_BSP_USING_UART4 is not set # CONFIG_BSP_USING_UART5 is not set @@ -323,8 +435,17 @@ CONFIG_BSP_USING_FMC=y # # More Drivers # -# CONFIG_PKG_USING_RW007 is not set -# CONFIG_DRV_USING_OV2640 is not set +CONFIG_PKG_USING_RW007=y +# CONFIG_RW007_NOT_USE_EXAMPLE_DRIVERS is not set +CONFIG_RW007_USING_STM32_DRIVERS=y +CONFIG_RW007_SPI_MAX_HZ=30000000 +CONFIG_RW007_SPI_BUS_NAME="spi1" +CONFIG_RW007_CS_PIN=86 +CONFIG_RW007_BOOT0_PIN=19 +CONFIG_RW007_BOOT1_PIN=86 +CONFIG_RW007_INT_BUSY_PIN=87 +CONFIG_RW007_RST_PIN=88 +CONFIG_DRV_USING_OV2640=y # # APP_Framework @@ -356,12 +477,18 @@ CONFIG_MAIN_KTASK_STACK_SIZE=1024 # # knowing app # -CONFIG_IRIS_ML_DEMO=y +# CONFIG_APPLICATION_KNOWING is not set # # sensor app # -# CONFIG_APPLICATION_SENSOR is not set +CONFIG_APPLICATION_SENSOR=y +# CONFIG_APPLICATION_SENSOR_CO2 is not set +# CONFIG_APPLICATION_SENSOR_PM1_0 is not set +CONFIG_APPLICATION_SENSOR_VOICE=y +CONFIG_APPLICATION_SENSOR_VOICE_D124=y +# CONFIG_APPLICATION_SENSOR_HUMIDITY is not set +# CONFIG_APPLICATION_SENSOR_TEMPERATURE is not set # # Framework @@ -373,7 +500,12 @@ CONFIG_ADD_XIUOS_FETURES=y CONFIG_SUPPORT_SENSOR_FRAMEWORK=y # CONFIG_SENSOR_CO2 is not set # CONFIG_SENSOR_PM is not set -# CONFIG_SENSOR_VOICE is not set +CONFIG_SENSOR_VOICE=y +CONFIG_SENSOR_D124=y +CONFIG_SENSOR_DEVICE_D124="d124_1" +CONFIG_SENSOR_QUANTITY_D124_VOICE="voice_1" +# CONFIG_SENSOR_D124_DRIVER_EXTUART is not set +CONFIG_SENSOR_DEVICE_D124_DEV="/dev/uart2" # CONFIG_SENSOR_TEMPERATURE is not set # CONFIG_SENSOR_HUMIDITY is not set # CONFIG_SUPPORT_CONNECTION_FRAMEWORK is not set @@ -381,11 +513,19 @@ CONFIG_SUPPORT_KNOWING_FRAMEWORK=y # CONFIG_USING_TENSORFLOWLITEMICRO is not set CONFIG_USING_KPU_POSTPROCESSING=y # CONFIG_USING_YOLOV2 is not set +# CONFIG_USING_KNOWING_FILTER is not set +# CONFIG_USING_OTA_MODEL is not set # CONFIG_SUPPORT_CONTROL_FRAMEWORK is not set +# +# Security +# +# CONFIG_CRYPTO is not set + # # lib # CONFIG_APP_SELECT_NEWLIB=y # CONFIG_APP_SELECT_OTHER_LIB is not set # CONFIG_LIB_USING_CJSON is not set +# CONFIG_LIB_USING_QUEUE is not set diff --git a/Ubiquitous/RT_Thread/bsp/stm32f407-atk-coreboard/rtconfig.h b/Ubiquitous/RT_Thread/bsp/stm32f407-atk-coreboard/rtconfig.h index 4dfc486d7..a2c1cb8be 100644 --- a/Ubiquitous/RT_Thread/bsp/stm32f407-atk-coreboard/rtconfig.h +++ b/Ubiquitous/RT_Thread/bsp/stm32f407-atk-coreboard/rtconfig.h @@ -28,6 +28,7 @@ /* kservice optimization */ #define RT_DEBUG +#define RT_DEBUG_COLOR /* Inter-Thread communication */ @@ -40,7 +41,9 @@ /* Memory Management */ #define RT_USING_MEMPOOL -#define RT_USING_SMALL_MEM +#define RT_USING_MEMHEAP +#define RT_USING_MEMHEAP_AUTO_BINDING +#define RT_USING_MEMHEAP_AS_HEAP #define RT_USING_HEAP /* Kernel Device Object */ @@ -68,16 +71,17 @@ /* Command shell */ #define RT_USING_FINSH +#define RT_USING_MSH +#define FINSH_USING_MSH #define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 #define FINSH_USING_HISTORY #define FINSH_HISTORY_LINES 5 #define FINSH_USING_SYMTAB -#define FINSH_USING_DESCRIPTION -#define FINSH_THREAD_PRIORITY 20 -#define FINSH_THREAD_STACK_SIZE 4096 #define FINSH_CMD_SIZE 80 -#define FINSH_USING_MSH -#define FINSH_USING_MSH_DEFAULT +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION #define FINSH_ARG_MAX 10 /* Device virtual file system */ @@ -101,13 +105,18 @@ #define RT_DFS_ELM_DRIVES 2 #define RT_DFS_ELM_MAX_SECTOR_SIZE 512 #define RT_DFS_ELM_REENTRANT +#define RT_DFS_ELM_MUTEX_TIMEOUT 3000 #define RT_USING_DFS_DEVFS /* Device Drivers */ #define RT_USING_DEVICE_IPC #define RT_PIPE_BUFSZ 512 +#define RT_USING_SYSTEM_WORKQUEUE +#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 +#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 #define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 #define RT_SERIAL_USING_DMA #define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_I2C @@ -115,6 +124,31 @@ #define RT_USING_PIN #define RT_USING_SPI #define RT_USING_SPI_MSD +#define RT_USING_WIFI +#define RT_WLAN_DEVICE_STA_NAME "wlan0" +#define RT_WLAN_DEVICE_AP_NAME "wlan1" +#define RT_WLAN_SSID_MAX_LENGTH 32 +#define RT_WLAN_PASSWORD_MAX_LENGTH 32 +#define RT_WLAN_DEV_EVENT_NUM 2 +#define RT_WLAN_MANAGE_ENABLE +#define RT_WLAN_SCAN_WAIT_MS 10000 +#define RT_WLAN_CONNECT_WAIT_MS 10000 +#define RT_WLAN_SCAN_SORT +#define RT_WLAN_MSH_CMD_ENABLE +#define RT_WLAN_AUTO_CONNECT_ENABLE +#define AUTO_CONNECTION_PERIOD_MS 2000 +#define RT_WLAN_CFG_ENABLE +#define RT_WLAN_CFG_INFO_MAX 3 +#define RT_WLAN_PROT_ENABLE +#define RT_WLAN_PROT_NAME_LEN 8 +#define RT_WLAN_PROT_MAX 2 +#define RT_WLAN_DEFAULT_PROT "lwip" +#define RT_WLAN_PROT_LWIP_ENABLE +#define RT_WLAN_PROT_LWIP_NAME "lwip" +#define RT_WLAN_WORK_THREAD_ENABLE +#define RT_WLAN_WORKQUEUE_THREAD_NAME "wlan" +#define RT_WLAN_WORKQUEUE_THREAD_SIZE 2048 +#define RT_WLAN_WORKQUEUE_THREAD_PRIO 15 /* Using USB */ @@ -122,19 +156,77 @@ /* POSIX layer and C standard library */ #define RT_USING_LIBC +#define RT_USING_PTHREADS +#define PTHREAD_NUM_MAX 8 #define RT_USING_POSIX -#define RT_LIBC_FIXED_TIMEZONE 8 +#define RT_LIBC_USING_TIME +#define RT_LIBC_DEFAULT_TIMEZONE 8 /* Network */ /* Socket abstraction layer */ +#define RT_USING_SAL +#define SAL_INTERNET_CHECK + +/* protocol stack implement */ + +#define SAL_USING_LWIP +#define SAL_SOCKETS_NUM 16 /* Network interface device */ +#define RT_USING_NETDEV +#define NETDEV_USING_IFCONFIG +#define NETDEV_USING_PING +#define NETDEV_USING_NETSTAT +#define NETDEV_USING_AUTO_DEFAULT +#define NETDEV_IPV4 1 +#define NETDEV_IPV6 0 /* light weight TCP/IP stack */ +#define RT_USING_LWIP +#define RT_USING_LWIP203 +#define RT_LWIP_MEM_ALIGNMENT 4 +#define RT_LWIP_IGMP +#define RT_LWIP_ICMP +#define RT_LWIP_DNS +#define RT_LWIP_DHCP +#define IP_SOF_BROADCAST 1 +#define IP_SOF_BROADCAST_RECV 1 + +/* Static IPv4 Address */ + +#define RT_LWIP_IPADDR "192.168.1.30" +#define RT_LWIP_GWADDR "192.168.1.1" +#define RT_LWIP_MSKADDR "255.255.255.0" +#define RT_LWIP_UDP +#define RT_LWIP_TCP +#define RT_LWIP_RAW +#define RT_MEMP_NUM_NETCONN 8 +#define RT_LWIP_PBUF_NUM 16 +#define RT_LWIP_RAW_PCB_NUM 4 +#define RT_LWIP_UDP_PCB_NUM 4 +#define RT_LWIP_TCP_PCB_NUM 4 +#define RT_LWIP_TCP_SEG_NUM 40 +#define RT_LWIP_TCP_SND_BUF 8196 +#define RT_LWIP_TCP_WND 8196 +#define RT_LWIP_TCPTHREAD_PRIORITY 10 +#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8 +#define RT_LWIP_TCPTHREAD_STACKSIZE 1024 +#define RT_LWIP_ETHTHREAD_PRIORITY 12 +#define RT_LWIP_ETHTHREAD_STACKSIZE 1024 +#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8 +#define LWIP_NETIF_STATUS_CALLBACK 1 +#define LWIP_NETIF_LINK_CALLBACK 1 +#define SO_REUSE 1 +#define LWIP_SO_RCVTIMEO 1 +#define LWIP_SO_SNDTIMEO 1 +#define LWIP_SO_RCVBUF 1 +#define LWIP_SO_LINGER 0 +#define LWIP_NETIF_LOOPBACK 0 +#define RT_LWIP_USING_PING /* AT commands */ @@ -168,6 +260,7 @@ #define BSP_USING_GPIO #define BSP_USING_UART #define BSP_USING_UART1 +#define BSP_USING_UART2 #define BSP_USING_SPI #define BSP_USING_SPI1 #define BSP_USING_SPI2 @@ -182,6 +275,16 @@ /* More Drivers */ +#define PKG_USING_RW007 +#define RW007_USING_STM32_DRIVERS +#define RW007_SPI_MAX_HZ 30000000 +#define RW007_SPI_BUS_NAME "spi1" +#define RW007_CS_PIN 86 +#define RW007_BOOT0_PIN 19 +#define RW007_BOOT1_PIN 86 +#define RW007_INT_BUSY_PIN 87 +#define RW007_RST_PIN 88 +#define DRV_USING_OV2640 /* APP_Framework */ @@ -201,19 +304,29 @@ /* knowing app */ -#define IRIS_ML_DEMO /* sensor app */ +#define APPLICATION_SENSOR +#define APPLICATION_SENSOR_VOICE +#define APPLICATION_SENSOR_VOICE_D124 /* Framework */ #define TRANSFORM_LAYER_ATTRIUBUTE #define ADD_XIUOS_FETURES #define SUPPORT_SENSOR_FRAMEWORK +#define SENSOR_VOICE +#define SENSOR_D124 +#define SENSOR_DEVICE_D124 "d124_1" +#define SENSOR_QUANTITY_D124_VOICE "voice_1" +#define SENSOR_DEVICE_D124_DEV "/dev/uart2" #define SUPPORT_KNOWING_FRAMEWORK #define USING_KPU_POSTPROCESSING +/* Security */ + + /* lib */ #define APP_SELECT_NEWLIB diff --git a/Ubiquitous/RT_Thread/drivers/ov2640/ov2640_source/drv_ov2640.h b/Ubiquitous/RT_Thread/drivers/ov2640/ov2640_source/drv_ov2640.h index 573b1f4ab..6d0d01cb6 100644 --- a/Ubiquitous/RT_Thread/drivers/ov2640/ov2640_source/drv_ov2640.h +++ b/Ubiquitous/RT_Thread/drivers/ov2640/ov2640_source/drv_ov2640.h @@ -125,6 +125,8 @@ extern "C" { #ifdef BOARD_K210_EVB #define IOCTRL_CAMERA_SET_DVP_RESO (21) // set dev resolution +#else +#define IOCTRL_CAMERA_SET_DVP_RESO (22) // same as IOCTRL_CAMERA_START_SHOT #endif #define IOCTRL_CAMERA_START_SHOT (22) // start shoot From a184611226237ee9cbfaf9c15ddf5a513151bf42 Mon Sep 17 00:00:00 2001 From: chunyexixiaoyu <834670833@qq.com> Date: Thu, 14 Oct 2021 11:16:11 +0800 Subject: [PATCH 04/11] Ubiquitous/RT_Thread/:update K210 bsp base on https://github.com/kendryte/K210-Micropython-OpenMV Fixed an issue where LCD and RW007 could not be used at the same time --- Ubiquitous/RT_Thread/bsp/k210/.config | 76 +- .../RT_Thread/bsp/k210/base-drivers/Kconfig | 55 +- .../bsp/k210/base-drivers/SConscript | 17 +- .../RT_Thread/bsp/k210/base-drivers/board.c | 144 ++ .../RT_Thread/bsp/k210/base-drivers/board.h | 26 + .../RT_Thread/bsp/k210/base-drivers/dmalock.c | 90 ++ .../RT_Thread/bsp/k210/base-drivers/dmalock.h | 14 + .../bsp/k210/base-drivers/drv_gpio.c | 267 ++++ .../bsp/k210/base-drivers/drv_gpio.h | 16 + .../bsp/k210/base-drivers/drv_interrupt.c | 27 + .../bsp/k210/base-drivers/drv_io_config.c | 126 +- .../bsp/k210/base-drivers/drv_io_config.h | 13 + .../RT_Thread/bsp/k210/base-drivers/drv_lcd.c | 741 ++++++---- .../RT_Thread/bsp/k210/base-drivers/drv_lcd.h | 556 +------ .../bsp/k210/base-drivers/drv_mpylcd.c | 1297 +++++++++++++++++ .../bsp/k210/base-drivers/drv_mpymachine.c | 27 + .../RT_Thread/bsp/k210/base-drivers/drv_spi.c | 301 ++++ .../RT_Thread/bsp/k210/base-drivers/drv_spi.h | 16 + .../RT_Thread/bsp/k210/base-drivers/heap.c | 11 + Ubiquitous/RT_Thread/bsp/k210/rtconfig.h | 50 +- 20 files changed, 3065 insertions(+), 805 deletions(-) create mode 100644 Ubiquitous/RT_Thread/bsp/k210/base-drivers/board.c create mode 100644 Ubiquitous/RT_Thread/bsp/k210/base-drivers/board.h create mode 100644 Ubiquitous/RT_Thread/bsp/k210/base-drivers/dmalock.c create mode 100644 Ubiquitous/RT_Thread/bsp/k210/base-drivers/dmalock.h create mode 100644 Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_gpio.c create mode 100644 Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_gpio.h create mode 100644 Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_interrupt.c create mode 100644 Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_mpylcd.c create mode 100644 Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_mpymachine.c create mode 100644 Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_spi.c create mode 100644 Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_spi.h create mode 100644 Ubiquitous/RT_Thread/bsp/k210/base-drivers/heap.c diff --git a/Ubiquitous/RT_Thread/bsp/k210/.config b/Ubiquitous/RT_Thread/bsp/k210/.config index 71a427343..c471c072d 100644 --- a/Ubiquitous/RT_Thread/bsp/k210/.config +++ b/Ubiquitous/RT_Thread/bsp/k210/.config @@ -20,12 +20,13 @@ CONFIG_RT_ALIGN_SIZE=8 CONFIG_RT_THREAD_PRIORITY_32=y # CONFIG_RT_THREAD_PRIORITY_256 is not set CONFIG_RT_THREAD_PRIORITY_MAX=32 -CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_TICK_PER_SECOND=100 CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_USING_HOOK=y CONFIG_RT_USING_IDLE_HOOK=y CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=4096 +CONFIG_SYSTEM_THREAD_STACK_SIZE=4096 # CONFIG_RT_USING_TIMER_SOFT is not set # @@ -33,6 +34,7 @@ CONFIG_IDLE_THREAD_STACK_SIZE=4096 # # CONFIG_RT_KSERVICE_USING_STDLIB is not set # CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_ASM_MEMCPY is not set CONFIG_RT_DEBUG=y CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_DEBUG_INIT_CONFIG=y @@ -79,6 +81,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uarths" +# CONFIG_RT_PRINTF_LONGLONG is not set CONFIG_RT_VER_NUM=0x40004 CONFIG_ARCH_CPU_64BIT=y # CONFIG_RT_USING_CPU_FFS is not set @@ -105,19 +108,19 @@ CONFIG_RT_MAIN_THREAD_PRIORITY=10 # Command shell # CONFIG_RT_USING_FINSH=y +CONFIG_RT_USING_MSH=y +CONFIG_FINSH_USING_MSH=y CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=16384 CONFIG_FINSH_USING_HISTORY=y CONFIG_FINSH_HISTORY_LINES=5 CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y CONFIG_FINSH_USING_DESCRIPTION=y # CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set -CONFIG_FINSH_THREAD_PRIORITY=20 -CONFIG_FINSH_THREAD_STACK_SIZE=16384 -CONFIG_FINSH_CMD_SIZE=80 # CONFIG_FINSH_USING_AUTH is not set -CONFIG_FINSH_USING_MSH=y -CONFIG_FINSH_USING_MSH_DEFAULT=y -CONFIG_FINSH_USING_MSH_ONLY=y CONFIG_FINSH_ARG_MAX=10 # @@ -151,6 +154,7 @@ CONFIG_RT_DFS_ELM_DRIVES=2 CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096 # CONFIG_RT_DFS_ELM_USE_ERASE is not set CONFIG_RT_DFS_ELM_REENTRANT=y +CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000 CONFIG_RT_USING_DFS_DEVFS=y # CONFIG_RT_USING_DFS_ROMFS is not set # CONFIG_RT_USING_DFS_RAMFS is not set @@ -165,6 +169,8 @@ CONFIG_RT_USING_SYSTEM_WORKQUEUE=y CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set CONFIG_RT_SERIAL_USING_DMA=y CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_CAN is not set @@ -244,8 +250,9 @@ CONFIG_RT_USING_POSIX=y # CONFIG_RT_USING_POSIX_TERMIOS is not set # CONFIG_RT_USING_POSIX_GETLINE is not set # CONFIG_RT_USING_POSIX_AIO is not set +CONFIG_RT_LIBC_USING_TIME=y # CONFIG_RT_USING_MODULE is not set -CONFIG_RT_LIBC_FIXED_TIMEZONE=8 +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # # Network @@ -283,6 +290,7 @@ CONFIG_NETDEV_IPV6=0 CONFIG_RT_USING_LWIP=y # CONFIG_RT_USING_LWIP141 is not set CONFIG_RT_USING_LWIP202=y +# CONFIG_RT_USING_LWIP203 is not set # CONFIG_RT_USING_LWIP212 is not set # CONFIG_RT_USING_LWIP_IPV6 is not set CONFIG_RT_LWIP_MEM_ALIGNMENT=8 @@ -352,6 +360,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_RT_USING_RYM is not set # CONFIG_RT_USING_ULOG is not set # CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set # CONFIG_RT_USING_RT_LINK is not set # @@ -363,9 +372,15 @@ CONFIG_RT_LWIP_USING_PING=y # Board Drivers Config # CONFIG_BSP_USING_UART_HS=y + +# +# General Purpose UARTs +# CONFIG_BSP_USING_UART1=y CONFIG_BSP_UART1_TXD_PIN=20 CONFIG_BSP_UART1_RXD_PIN=21 +CONFIG_BSP_UART1_RTS_PIN=-1 +CONFIG_BSP_UART1_CTS_PIN=-1 # CONFIG_BSP_USING_UART2 is not set # CONFIG_BSP_USING_UART3 is not set # CONFIG_BSP_USING_I2C1 is not set @@ -385,6 +400,13 @@ CONFIG_BSP_LCD_CS_PIN=36 CONFIG_BSP_LCD_WR_PIN=39 CONFIG_BSP_LCD_DC_PIN=38 CONFIG_BSP_LCD_RST_PIN=37 +CONFIG_BSP_LCD_BACKLIGHT_PIN=-1 +CONFIG_BSP_LCD_BACKLIGHT_ACTIVE_LOW=y +# CONFIG_BSP_LCD_BACKLIGHT_ACTIVE_HIGH is not set +CONFIG_BSP_LCD_CLK_FREQ=20000000 +# CONFIG_BSP_BOARD_KD233 is not set +# CONFIG_BSP_BOARD_K210_OPENMV_TEST is not set +CONFIG_BSP_BOARD_USER=y CONFIG_BSP_LCD_X_MAX=240 CONFIG_BSP_LCD_Y_MAX=320 CONFIG_BSP_USING_SDCARD=y @@ -401,6 +423,9 @@ CONFIG_BSP_DVP_CMOS_PWDN_PIN=44 CONFIG_BSP_DVP_CMOS_XCLK_PIN=46 CONFIG_BSP_DVP_CMOS_PCLK_PIN=47 CONFIG_BSP_DVP_CMOS_HREF_PIN=45 +CONFIG_RW007_SPIDEV_NAME="spi11" +CONFIG_RW007_INT_BUSY_PIN=7 +CONFIG_RW007_RST_PIN=6 # # Kendryte SDK Config @@ -410,7 +435,10 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055 # # More Drivers # -# CONFIG_PKG_USING_RW007 is not set +CONFIG_PKG_USING_RW007=y +CONFIG_RW007_NOT_USE_EXAMPLE_DRIVERS=y +# CONFIG_RW007_USING_STM32_DRIVERS is not set +CONFIG_RW007_SPI_MAX_HZ=20000000 CONFIG_DRV_USING_OV2640=y # @@ -443,12 +471,22 @@ CONFIG_MAIN_KTASK_STACK_SIZE=1024 # # knowing app # +CONFIG_APPLICATION_KNOWING=y CONFIG_FACE_DETECT=y +# CONFIG_INSTRUSION_DETECT is not set +# CONFIG_HELMET_DETECT is not set +# CONFIG_IRIS_ML_DEMO is not set # # sensor app # -# CONFIG_APPLICATION_SENSOR is not set +CONFIG_APPLICATION_SENSOR=y +# CONFIG_APPLICATION_SENSOR_CO2 is not set +# CONFIG_APPLICATION_SENSOR_PM1_0 is not set +CONFIG_APPLICATION_SENSOR_VOICE=y +CONFIG_APPLICATION_SENSOR_VOICE_D124=y +# CONFIG_APPLICATION_SENSOR_HUMIDITY is not set +# CONFIG_APPLICATION_SENSOR_TEMPERATURE is not set # # Framework @@ -460,7 +498,12 @@ CONFIG_ADD_XIUOS_FETURES=y CONFIG_SUPPORT_SENSOR_FRAMEWORK=y # CONFIG_SENSOR_CO2 is not set # CONFIG_SENSOR_PM is not set -# CONFIG_SENSOR_VOICE is not set +CONFIG_SENSOR_VOICE=y +CONFIG_SENSOR_D124=y +CONFIG_SENSOR_DEVICE_D124="d124_1" +CONFIG_SENSOR_QUANTITY_D124_VOICE="voice_1" +# CONFIG_SENSOR_D124_DRIVER_EXTUART is not set +CONFIG_SENSOR_DEVICE_D124_DEV="/dev/uar2" # CONFIG_SENSOR_TEMPERATURE is not set # CONFIG_SENSOR_HUMIDITY is not set # CONFIG_SUPPORT_CONNECTION_FRAMEWORK is not set @@ -468,11 +511,20 @@ CONFIG_SUPPORT_KNOWING_FRAMEWORK=y # CONFIG_USING_TENSORFLOWLITEMICRO is not set CONFIG_USING_KPU_POSTPROCESSING=y CONFIG_USING_YOLOV2=y +# CONFIG_USING_KNOWING_FILTER is not set +# CONFIG_USING_OTA_MODEL is not set # CONFIG_SUPPORT_CONTROL_FRAMEWORK is not set # -# app lib +# Security +# +# CONFIG_CRYPTO is not set + +# +# lib # CONFIG_APP_SELECT_NEWLIB=y # CONFIG_APP_SELECT_OTHER_LIB is not set +CONFIG_LIB_USING_CJSON=y +# CONFIG_LIB_USING_QUEUE is not set CONFIG___STACKSIZE__=4096 diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/Kconfig b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/Kconfig index 060bd2064..57e84d54f 100644 --- a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/Kconfig +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/Kconfig @@ -5,6 +5,7 @@ config BSP_USING_UART_HS default y +menu "General Purpose UARTs" menuconfig BSP_USING_UART1 bool "Enable UART1" default n @@ -15,6 +16,12 @@ menuconfig BSP_USING_UART1 config BSP_UART1_RXD_PIN int "uart1 RXD pin number" default 21 + config BSP_UART1_RTS_PIN + int "uart1 RTS pin number (-1 for not used)" + default -1 + config BSP_UART1_CTS_PIN + int "uart1 CTS pin number (-1 for not used)" + default -1 endif menuconfig BSP_USING_UART2 @@ -27,6 +34,12 @@ menuconfig BSP_USING_UART2 config BSP_UART2_RXD_PIN int "uart2 RXD pin number" default 27 + config BSP_UART2_RTS_PIN + int "uart2 RTS pin number (-1 for not used)" + default -1 + config BSP_UART2_CTS_PIN + int "uart2 CTS pin number (-1 for not used)" + default -1 endif menuconfig BSP_USING_UART3 @@ -39,7 +52,14 @@ menuconfig BSP_USING_UART3 config BSP_UART3_RXD_PIN int "uart3 RXD pin number" default 23 + config BSP_UART3_RTS_PIN + int "uart3 RTS pin number (-1 for not used)" + default -1 + config BSP_UART3_CTS_PIN + int "uart3 CTS pin number (-1 for not used)" + default -1 endif +endmenu config BSP_USING_I2C1 bool "Enable I2C1 (GPIO0/1)" @@ -119,9 +139,40 @@ if BSP_USING_LCD config BSP_LCD_DC_PIN int "DC pin number of 8080 interface" default 38 - config BSP_LCD_RST_PIN - int "RST pin number of 8080 interface" + config BSP_LCD_RST_PIN + int "RESET pin number of 8080 interface (-1 for not used)" default 37 + config BSP_LCD_BACKLIGHT_PIN + int "Backlight control pin number (-1 for not used)" + default -1 + choice + prompt "backlight active polarity" + default BSP_LCD_BACKLIGHT_ACTIVE_LOW + + config BSP_LCD_BACKLIGHT_ACTIVE_LOW + bool "lcd backlight on low level" + config BSP_LCD_BACKLIGHT_ACTIVE_HIGH + bool "lcd_backlight on high level" + endchoice + + config BSP_LCD_CLK_FREQ + int "Lcd max clk frequency" + default 15000000 + + choice + prompt "lcd scan direction" + default BSP_BOARD_KD233 + + config BSP_BOARD_KD233 + bool "board_kd233 lcd scan: DIR_YX_RLUD" + + config BSP_BOARD_K210_OPENMV_TEST + bool "board_k210_openmv lcd scan: DIR_YX_LRUD" + + config BSP_BOARD_USER + bool "board_user: user defined." + endchoice + config BSP_LCD_X_MAX int "LCD Height" default 240 diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/SConscript b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/SConscript index 233d649de..5523339bf 100644 --- a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/SConscript +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/SConscript @@ -5,28 +5,26 @@ from building import * cwd = GetCurrentDir() drv_path = cwd+"/../../../rt-thread/bsp/k210/driver/" src = [ - drv_path + 'board.c', - drv_path + 'heap.c', + 'board.c', + 'heap.c', drv_path + 'drv_uart.c', - drv_path + 'drv_interrupt.c', - 'drv_io_config.c' + 'drv_interrupt.c', + 'drv_io_config.c', + 'dmalock.c' ] CPPPATH = [cwd,drv_path] if GetDepend('RT_USING_PIN'): - src += [drv_path + 'drv_gpio.c'] + src += ['drv_gpio.c'] if GetDepend('RT_USING_HWTIMER'): src += [drv_path + 'drv_hw_timer.c'] -if GetDepend('RT_USING_CPUTIME'): - src += [drv_path + 'drv_cputime.c'] - if GetDepend('RT_USING_I2C'): src += [drv_path + 'drv_i2c.c'] if GetDepend('RT_USING_SPI'): - src += [drv_path + 'drv_spi.c'] + src += ['drv_spi.c'] if GetDepend('RT_USING_PWM'): src += [drv_path + 'drv_pwm.c'] @@ -42,6 +40,7 @@ if GetDepend('BSP_USING_DVP'): if GetDepend('BSP_USING_LCD'): src += ['drv_lcd.c'] + src += ['drv_mpylcd.c'] if GetDepend('PKG_USING_RW007'): src += ['rw007_port.c'] diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/board.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/board.c new file mode 100644 index 000000000..1f258d2db --- /dev/null +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/board.c @@ -0,0 +1,144 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + */ + +#include +#include + +#include "board.h" +#include "tick.h" + +#include "drv_uart.h" + +#include "encoding.h" +#include "fpioa.h" +#include "dmac.h" +#include "dmalock.h" + +void init_bss(void) +{ + unsigned int *dst; + + dst = &__bss_start; + while (dst < &__bss_end) + { + *dst++ = 0; + } +} + +void primary_cpu_entry(void) +{ + extern void entry(void); + + /* disable global interrupt */ + init_bss(); + rt_hw_interrupt_disable(); + entry(); +} + +#include +#include + +int freq(void) +{ + rt_uint64_t value = 0; + + value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL0); + rt_kprintf("PLL0: %d\n", value); + value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL1); + rt_kprintf("PLL1: %d\n", value); + value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL2); + rt_kprintf("PLL2: %d\n", value); + value = sysctl_clock_get_freq(SYSCTL_CLOCK_CPU); + rt_kprintf("CPU : %d\n", value); + value = sysctl_clock_get_freq(SYSCTL_CLOCK_APB0); + rt_kprintf("APB0: %d\n", value); + value = sysctl_clock_get_freq(SYSCTL_CLOCK_APB1); + rt_kprintf("APB1: %d\n", value); + value = sysctl_clock_get_freq(SYSCTL_CLOCK_APB2); + rt_kprintf("APB2: %d\n", value); + value = sysctl_clock_get_freq(SYSCTL_CLOCK_HCLK); + rt_kprintf("HCLK: %d\n", value); + + value = clint_get_time(); + rt_kprintf("mtime: %d\n", value); + + return 0; +} +MSH_CMD_EXPORT(freq, show freq info); + +#ifdef RT_USING_SMP +extern int rt_hw_clint_ipi_enable(void); +#endif + +extern int io_config_init(void); + +void rt_hw_board_init(void) +{ + sysctl_pll_set_freq(SYSCTL_PLL0, 800000000UL); + sysctl_pll_set_freq(SYSCTL_PLL1, 400000000UL); + sysctl_pll_set_freq(SYSCTL_PLL2, 45158400UL); + sysctl_clock_set_threshold(SYSCTL_THRESHOLD_APB1, 2); + /* Init FPIOA */ + fpioa_init(); + + io_config_init(); + + /* Dmac init */ + dmac_init(); + dmalock_init(); + + /* initalize interrupt */ + rt_hw_interrupt_init(); + /* initialize hardware interrupt */ + rt_hw_uart_init(); + + rt_hw_tick_init(); + +#ifdef RT_USING_SMP + rt_hw_clint_ipi_enable(); +#endif + +#ifdef RT_USING_CONSOLE + /* set console device */ + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif /* RT_USING_CONSOLE */ + +#ifdef RT_USING_HEAP + rt_kprintf("heap: [0x%08x - 0x%08x]\n", (rt_ubase_t) RT_HW_HEAP_BEGIN, (rt_ubase_t) RT_HW_HEAP_END); + /* initialize memory system */ + rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END); +#endif + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif +} +void rt_hw_cpu_reset(void) +{ + sysctl->soft_reset.soft_reset = 1; + while(1); +} + +MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset machine); + +/** + * This function will delay for some us. + * + * @param us the delay time of us + */ +void rt_hw_us_delay(rt_uint32_t usec) +{ + rt_uint32_t cycle = read_cycle(); + rt_uint32_t nop_all = usec * sysctl_clock_get_freq(SYSCTL_CLOCK_CPU) / 1000000UL; + while (1) + { + if(read_cycle() - cycle >= nop_all) + break; + } +} diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/board.h b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/board.h new file mode 100644 index 000000000..9349e3586 --- /dev/null +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/board.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2017-5-30 Bernard the first version + */ + +#ifndef BOARD_H__ +#define BOARD_H__ + +#include "fpioa.h" +#include "platform.h" +#include + +extern unsigned int __bss_start; +extern unsigned int __bss_end; + +#define RT_HW_HEAP_BEGIN (void*)&__bss_end +#define RT_HW_HEAP_END (void*)(0x80000000 + 6 * 1024 * 1024) + +void rt_hw_board_init(void); + +#endif diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/dmalock.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/dmalock.c new file mode 100644 index 000000000..880ab7d8f --- /dev/null +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/dmalock.c @@ -0,0 +1,90 @@ + +/* Copyright Canaan Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include "dmalock.h" + +struct dmac_host +{ + struct rt_semaphore sem; + struct rt_mutex mutex; + uint8_t channel_used[DMAC_CHANNEL_COUNT]; + char *channel_name[DMAC_CHANNEL_COUNT]; +}; + +static struct dmac_host _dmac_host; + +void dmalock_init(void) +{ + rt_sem_init(&_dmac_host.sem, "dma_sem", DMAC_CHANNEL_COUNT, RT_IPC_FLAG_FIFO); + rt_mutex_init(&_dmac_host.mutex, "dma_mutex", RT_IPC_FLAG_FIFO); + for (int i = 0; i < DMAC_CHANNEL_COUNT; i++) + { + _dmac_host.channel_used[i] = 0; + _dmac_host.channel_name[i] = NULL; + } +} + +int _dmalock_sync_take(dmac_channel_number_t *chn, int timeout_ms, const char *name) +{ + rt_err_t result; + + *chn = DMAC_CHANNEL_MAX; + result = rt_sem_take(&_dmac_host.sem, timeout_ms); + if (result == RT_EOK) + { + rt_mutex_take(&_dmac_host.mutex, RT_WAITING_FOREVER); + for (int i = 0; i < DMAC_CHANNEL_COUNT; i++) + { + if (_dmac_host.channel_used[i] == 0) + { + _dmac_host.channel_used[i] = 1; + _dmac_host.channel_name[i] = name; + *chn = i; + break; + } + } + rt_mutex_release(&_dmac_host.mutex); + } + return result; +} + +void dmalock_release(dmac_channel_number_t chn) +{ + if (chn >= DMAC_CHANNEL_MAX) + return; + _dmac_host.channel_name[chn] = NULL; + _dmac_host.channel_used[chn] = 0; + rt_sem_release(&_dmac_host.sem); +} + +static void dma_ch_info(int argc, char **argv) +{ + uint32_t cnt = 0; + + for (int i = 0; i < DMAC_CHANNEL_COUNT; i++) + { + if (_dmac_host.channel_used[i] != 0) + { + rt_kprintf("dma_ch%d is using by func [%s]\n", i, _dmac_host.channel_name[i]); + cnt++; + } + } + + if(cnt == 0) + rt_kprintf(" no dma_ch is using.\n"); +} +MSH_CMD_EXPORT(dma_ch_info, list dma channel informationn.); \ No newline at end of file diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/dmalock.h b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/dmalock.h new file mode 100644 index 000000000..bca6a0d24 --- /dev/null +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/dmalock.h @@ -0,0 +1,14 @@ +#ifndef __DMALOCK_H +#define __DMALOCK_H + +#include +#include +#include + +#define dmalock_sync_take(x,y) _dmalock_sync_take(x, y, __func__) + +void dmalock_init(void); +int _dmalock_sync_take(dmac_channel_number_t *chn, int timeout_ms, const char *name); +void dmalock_release(dmac_channel_number_t chn); + +#endif diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_gpio.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_gpio.c new file mode 100644 index 000000000..3054a5d3b --- /dev/null +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_gpio.c @@ -0,0 +1,267 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-03-19 ZYH first version + */ + +#include +#include +#include +#include +#include "drv_gpio.h" +#include "drv_io_config.h" +#include +#include +#include +#include + +#define DBG_ENABLE +#define DBG_TAG "PIN" +#define DBG_LVL DBG_WARNING +#define DBG_COLOR +#include + +#define FUNC_GPIOHS(n) (FUNC_GPIOHS0 + n) + +static short pin_alloc_table[FPIOA_NUM_IO]; +static uint32_t free_pin = 0; + +static int alloc_pin_channel(rt_base_t pin_index) +{ + if(free_pin == 32) + { + LOG_E("no free gpiohs channel to alloc"); + return -1; + } + + if(pin_alloc_table[pin_index] != -1) + { + LOG_W("already alloc gpiohs channel for pin %d", pin_index); + return pin_alloc_table[pin_index]; + } + + pin_alloc_table[pin_index] = free_pin; + free_pin++; + + fpioa_set_function(pin_index, FUNC_GPIOHS(pin_alloc_table[pin_index])); + return pin_alloc_table[pin_index]; +} + +int get_pin_channel(rt_base_t pin_index) +{ + return pin_alloc_table[pin_index]; +} + +static void free_pin_channel(rt_base_t pin_index) +{ + if(pin_alloc_table[pin_index] == -1) + { + LOG_W("free error:not alloc gpiohs channel for pin %d", pin_index); + return; + } + pin_alloc_table[pin_index] = -1; + free_pin--; +} + + +static void drv_pin_mode(struct rt_device *device, rt_base_t pin, rt_base_t mode) +{ + int pin_channel = get_pin_channel(pin); + if(pin_channel == -1) + { + pin_channel = alloc_pin_channel(pin); + if(pin_channel == -1) + { + return; + } + } + + switch (mode) + { + case PIN_MODE_OUTPUT: + gpiohs_set_drive_mode(pin_channel, GPIO_DM_OUTPUT); + break; + case PIN_MODE_INPUT: + gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT); + break; + case PIN_MODE_INPUT_PULLUP: + gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT_PULL_UP); + break; + case PIN_MODE_INPUT_PULLDOWN: + gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT_PULL_DOWN); + break; + default: + LOG_E("Not support mode %d", mode); + break; + } +} + +static void drv_pin_write(struct rt_device *device, rt_base_t pin, rt_base_t value) +{ + int pin_channel = get_pin_channel(pin); + if(pin_channel == -1) + { + LOG_E("pin %d not set mode", pin); + return; + } + gpiohs_set_pin(pin_channel, value == PIN_HIGH ? GPIO_PV_HIGH : GPIO_PV_LOW); +} + +static int drv_pin_read(struct rt_device *device, rt_base_t pin) +{ + int pin_channel = get_pin_channel(pin); + if(pin_channel == -1) + { + LOG_E("pin %d not set mode", pin); + return -1; + } + return gpiohs_get_pin(pin_channel) == GPIO_PV_HIGH ? PIN_HIGH : PIN_LOW; +} + +static struct +{ + void (*hdr)(void *args); + void* args; + gpio_pin_edge_t edge; +} irq_table[32]; + +static void pin_irq(int vector, void *param) +{ + int pin_channel = vector - IRQN_GPIOHS0_INTERRUPT; + if(irq_table[pin_channel].edge & GPIO_PE_FALLING) + { + set_gpio_bit(gpiohs->fall_ie.u32, pin_channel, 0); + set_gpio_bit(gpiohs->fall_ip.u32, pin_channel, 1); + set_gpio_bit(gpiohs->fall_ie.u32, pin_channel, 1); + } + + if(irq_table[pin_channel].edge & GPIO_PE_RISING) + { + set_gpio_bit(gpiohs->rise_ie.u32, pin_channel, 0); + set_gpio_bit(gpiohs->rise_ip.u32, pin_channel, 1); + set_gpio_bit(gpiohs->rise_ie.u32, pin_channel, 1); + } + + if(irq_table[pin_channel].edge & GPIO_PE_LOW) + { + set_gpio_bit(gpiohs->low_ie.u32, pin_channel, 0); + set_gpio_bit(gpiohs->low_ip.u32, pin_channel, 1); + set_gpio_bit(gpiohs->low_ie.u32, pin_channel, 1); + } + + if(irq_table[pin_channel].edge & GPIO_PE_HIGH) + { + set_gpio_bit(gpiohs->high_ie.u32, pin_channel, 0); + set_gpio_bit(gpiohs->high_ip.u32, pin_channel, 1); + set_gpio_bit(gpiohs->high_ie.u32, pin_channel, 1); + } + if(irq_table[pin_channel].hdr) + { + irq_table[pin_channel].hdr(irq_table[pin_channel].args); + } +} + +static rt_err_t drv_pin_attach_irq(struct rt_device *device, rt_int32_t pin, + rt_uint32_t mode, void (*hdr)(void *args), void *args) +{ + int pin_channel = get_pin_channel(pin); + char irq_name[10]; + if(pin_channel == -1) + { + LOG_E("pin %d not set mode", pin); + return -RT_ERROR; + } + irq_table[pin_channel].hdr = hdr; + irq_table[pin_channel].args = args; + switch (mode) + { + case PIN_IRQ_MODE_RISING: + irq_table[pin_channel].edge = GPIO_PE_RISING; + break; + case PIN_IRQ_MODE_FALLING: + irq_table[pin_channel].edge = GPIO_PE_FALLING; + break; + case PIN_IRQ_MODE_RISING_FALLING: + irq_table[pin_channel].edge = GPIO_PE_BOTH; + break; + case PIN_IRQ_MODE_HIGH_LEVEL: + irq_table[pin_channel].edge = GPIO_PE_LOW; + break; + case PIN_IRQ_MODE_LOW_LEVEL: + irq_table[pin_channel].edge = GPIO_PE_HIGH; + break; + default: + break; + } + gpiohs_set_pin_edge(pin_channel, irq_table[pin_channel].edge); + rt_snprintf(irq_name, sizeof irq_name, "pin%d", pin); + rt_hw_interrupt_install(IRQN_GPIOHS0_INTERRUPT + pin_channel, pin_irq, RT_NULL, irq_name); + + return RT_EOK; +} + +static rt_err_t drv_pin_detach_irq(struct rt_device *device, rt_int32_t pin) +{ + rt_err_t ret = RT_EOK; + + int pin_channel = get_pin_channel(pin); + if(pin_channel == -1) + { + LOG_E("pin %d not set mode", pin); + return -RT_ERROR; + } + + irq_table[pin_channel].hdr = RT_NULL; + irq_table[pin_channel].args = RT_NULL; + + return ret; +} + +static rt_err_t drv_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled) +{ + int pin_channel = get_pin_channel(pin); + + if(pin_channel == -1) + { + LOG_E("pin %d not set mode", pin); + return -RT_ERROR; + } + + if(enabled) + { + rt_hw_interrupt_umask(IRQN_GPIOHS0_INTERRUPT + pin_channel); + } + else + { + rt_hw_interrupt_mask(IRQN_GPIOHS0_INTERRUPT + pin_channel); + } + + return RT_EOK; +} + +const static struct rt_pin_ops drv_pin_ops = +{ + drv_pin_mode, + drv_pin_write, + drv_pin_read, + + drv_pin_attach_irq, + drv_pin_detach_irq, + drv_pin_irq_enable +}; + +int rt_hw_pin_init(void) +{ + rt_err_t ret = RT_EOK; + memset(pin_alloc_table, 0xff, sizeof pin_alloc_table); + free_pin = GPIO_ALLOC_START; + ret = rt_device_pin_register("pin", &drv_pin_ops, RT_NULL); + + return ret; +} +INIT_BOARD_EXPORT(rt_hw_pin_init); + diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_gpio.h b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_gpio.h new file mode 100644 index 000000000..1b4cf4e21 --- /dev/null +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_gpio.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-03-19 ZYH first version + */ + +#ifndef DRV_GPIO_H__ +#define DRV_GPIO_H__ + +int rt_hw_pin_init(void); + +#endif \ No newline at end of file diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_interrupt.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_interrupt.c new file mode 100644 index 000000000..62e899dba --- /dev/null +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_interrupt.c @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-03-19 ZYH first version + */ + +#include + +void plic_irq_handle(plic_irq_t irq) +{ + plic_instance_t (*plic_instance)[IRQN_MAX] = plic_get_instance(); + if (plic_instance[0][irq].callback) + { + plic_instance[0][irq].callback( + plic_instance[0][irq].ctx); + } + else if (plic_instance[1][irq].callback) + { + plic_instance[1][irq].callback( + plic_instance[1][irq].ctx); + } +} + diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.c index 56c1e07d9..b2a0a5a3d 100644 --- a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.c +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.c @@ -6,7 +6,6 @@ * Change Logs: * Date Author Notes * 2019-03-19 ZYH first version - * 2021-01-28 tianchunyu Modify macro definitions */ #include @@ -24,7 +23,18 @@ static struct io_config fpioa_function_t func; const char * func_name; } io_config[] = -{ +{ +#ifdef BSP_USING_LCD + IOCONFIG(BSP_LCD_CS_PIN, FUNC_SPI0_SS0), /* LCD CS PIN */ + IOCONFIG(BSP_LCD_WR_PIN, FUNC_SPI0_SCLK), /* LCD WR PIN */ + IOCONFIG(BSP_LCD_DC_PIN, HS_GPIO(LCD_DC_PIN)), /* LCD DC PIN */ +#if BSP_LCD_RST_PIN >= 0 + IOCONFIG(BSP_LCD_RST_PIN, HS_GPIO(LCD_RST_PIN)), /* LCD RESET PIN */ +#endif +#if BSP_LCD_BACKLIGHT_PIN >= 0 + IOCONFIG(BSP_LCD_BACKLIGHT_PIN, HS_GPIO(LCD_BACKLIGHT_PIN)), /* LCD BACKLIGHT PIN */ +#endif +#endif #ifdef BSP_USING_DVP IOCONFIG(BSP_DVP_SCCB_SDA_PIN, FUNC_SCCB_SDA), @@ -37,13 +47,6 @@ static struct io_config IOCONFIG(BSP_DVP_CMOS_HREF_PIN, FUNC_CMOS_HREF), #endif -#if 0 //here is a drv lcd bug now don't know why - IOCONFIG(BSP_LCD_CS_PIN, FUNC_SPI0_SS3), /* LCD CS PIN */ - IOCONFIG(BSP_LCD_WR_PIN, FUNC_SPI0_SCLK), /* LCD WR PIN */ - IOCONFIG(BSP_LCD_DC_PIN, FUNC_GPIOHS2), /* LCD DC PIN */ - IOCONFIG(BSP_LCD_RST_PIN,FUNC_GPIOHS3), /* LCD DC PIN */ -#endif - #ifdef BSP_USING_SPI1 IOCONFIG(BSP_SPI1_CLK_PIN, FUNC_SPI1_SCLK), IOCONFIG(BSP_SPI1_D0_PIN, FUNC_SPI1_D0), @@ -69,14 +72,72 @@ static struct io_config #ifdef BSP_USING_UART1 IOCONFIG(BSP_UART1_TXD_PIN, FUNC_UART1_TX), IOCONFIG(BSP_UART1_RXD_PIN, FUNC_UART1_RX), + #if BSP_UART1_RTS_PIN >= 0 + IOCONFIG(BSP_UART1_RTS_PIN, FUNC_UART1_RTS), + #endif + #if BSP_UART1_CTS_PIN >= 0 + IOCONFIG(BSP_UART1_CTS_PIN, FUNC_UART1_CTS), + #endif #endif #ifdef BSP_USING_UART2 IOCONFIG(BSP_UART2_TXD_PIN, FUNC_UART2_TX), IOCONFIG(BSP_UART2_RXD_PIN, FUNC_UART2_RX), + #if BSP_UART2_RTS_PIN >= 0 + IOCONFIG(BSP_UART2_RTS_PIN, FUNC_UART2_RTS), + #endif + #if BSP_UART2_CTS_PIN >= 0 + IOCONFIG(BSP_UART2_CTS_PIN, FUNC_UART2_CTS), + #endif #endif #ifdef BSP_USING_UART3 IOCONFIG(BSP_UART3_TXD_PIN, FUNC_UART3_TX), IOCONFIG(BSP_UART3_RXD_PIN, FUNC_UART3_RX), + #if BSP_UART3_RTS_PIN >= 0 + IOCONFIG(BSP_UART3_RTS_PIN, FUNC_UART3_RTS), + #endif + #if BSP_UART3_CTS_PIN >= 0 + IOCONFIG(BSP_UART3_CTS_PIN, FUNC_UART3_CTS), + #endif +#endif +#ifdef BSP_USING_I2C0 + IOCONFIG(BSP_I2C0_SCL_PIN, FUNC_I2C0_SCLK), + IOCONFIG(BSP_I2C0_SDA_PIN, FUNC_I2C0_SDA), +#endif +#ifdef BSP_USING_I2C1 + IOCONFIG(BSP_I2C1_SCL_PIN, FUNC_I2C1_SCLK), + IOCONFIG(BSP_I2C1_SDA_PIN, FUNC_I2C1_SDA), +#endif +#ifdef BSP_USING_I2C2 + IOCONFIG(BSP_I2C2_SCL_PIN, FUNC_I2C2_SCLK), + IOCONFIG(BSP_I2C2_SDA_PIN, FUNC_I2C2_SDA), +#endif +#ifdef BSP_USING_I2S0 + IOCONFIG(BSP_I2S0_OUT_D1_PIN, FUNC_I2S0_OUT_D1), + IOCONFIG(BSP_I2S0_WS_PIN, FUNC_I2S0_WS), + IOCONFIG(BSP_I2S0_SCLK_PIN, FUNC_I2S0_SCLK), +#endif +#ifdef BSP_USING_I2S1 + IOCONFIG(BSP_I2S1_IN_D0_PIN, FUNC_I2S1_IN_D0), + IOCONFIG(BSP_I2S1_WS_PIN, FUNC_I2S1_WS), + IOCONFIG(BSP_I2S1_SCLK_PIN, FUNC_I2S1_SCLK), +#endif +#ifdef BSP_USING_I2S2 + IOCONFIG(BSP_I2S2_OUT_D1_PIN, FUNC_I2S2_OUT_D1), + IOCONFIG(BSP_I2S2_WS_PIN, FUNC_I2S2_WS), + IOCONFIG(BSP_I2S2_SCLK_PIN, FUNC_I2S2_SCLK), +#endif + +#ifdef BSP_PWM_CHN0_ENABLE + IOCONFIG(BSP_PWM_CHN0_PIN, FUNC_TIMER2_TOGGLE1), +#endif +#ifdef BSP_PWM_CHN1_ENABLE + IOCONFIG(BSP_PWM_CHN1_PIN, FUNC_TIMER2_TOGGLE2), +#endif +#ifdef BSP_PWM_CHN2_ENABLE + IOCONFIG(BSP_PWM_CHN2_PIN, FUNC_TIMER2_TOGGLE3), +#endif +#ifdef BSP_PWM_CHN3_ENABLE + IOCONFIG(BSP_PWM_CHN3_PIN, FUNC_TIMER2_TOGGLE4), #endif }; @@ -101,16 +162,35 @@ int io_config_init(void) int count = sizeof(io_config) / sizeof(io_config[0]); int i; +/* IO GroupA Power Supply Setting */ +#if defined(BSP_GROUPA_POWER_SUPPLY_3V3) + sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V33); + sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V33); + sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V33); +#else sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V18); sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V18); sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V18); -#ifdef BSP_USING_UART2 - // for IO-27/28 - sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V33); #endif -#if defined(BSP_USING_UART1) || defined(BSP_USING_UART3) - // for IO-20~23 + +/* IO GroupB Power Supply Setting */ +#if defined(BSP_GROUPB_POWER_SUPPLY_3V3) sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V33); + sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V33); + sysctl_set_power_mode(SYSCTL_POWER_BANK5, SYSCTL_POWER_V33); +#else + sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V18); + sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V18); + sysctl_set_power_mode(SYSCTL_POWER_BANK5, SYSCTL_POWER_V18); +#endif + +/* IO GroupC Power Supply Setting */ +#if defined(BSP_GROUPC_POWER_SUPPLY_3V3) + sysctl_set_power_mode(SYSCTL_POWER_BANK6, SYSCTL_POWER_V33); + sysctl_set_power_mode(SYSCTL_POWER_BANK7, SYSCTL_POWER_V33); +#else + sysctl_set_power_mode(SYSCTL_POWER_BANK6, SYSCTL_POWER_V18); + sysctl_set_power_mode(SYSCTL_POWER_BANK7, SYSCTL_POWER_V18); #endif for(i = 0; i < count; i++) @@ -120,12 +200,20 @@ int io_config_init(void) #if defined(BSP_USING_DVP) || defined(BSP_USING_LCD) sysctl_set_spi0_dvp_data(1); - sysctl_set_power_mode(SYSCTL_POWER_BANK6, SYSCTL_POWER_V18); - sysctl_set_power_mode(SYSCTL_POWER_BANK7, SYSCTL_POWER_V18); -#endif -#ifdef FACE_DETECT sysctl_clock_enable(SYSCTL_CLOCK_AI); #endif } -INIT_BOARD_EXPORT(io_config_init); +int io_config_used(int io_num) +{ + int count = sizeof(io_config) / sizeof(io_config[0]); + int i; + + for(i = 0; i < count; i++) + { + if (io_config[i].io_num == io_num) + break; + } + + return (i < count); +} diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.h b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.h index 78db1d8c6..1b725e9e8 100644 --- a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.h +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.h @@ -11,10 +11,18 @@ #ifndef __DRV_IO_CONFIG_H__ #define __DRV_IO_CONFIG_H__ +#include + enum HS_GPIO_CONFIG { #ifdef BSP_USING_LCD LCD_DC_PIN = 0, /* LCD DC PIN */ +#if BSP_LCD_RST_PIN >= 0 + LCD_RST_PIN, +#endif +#if BSP_LCD_BACKLIGHT_PIN >= 0 + LCD_BACKLIGHT_PIN, +#endif #endif #ifdef BSP_SPI1_USING_SS0 SPI1_CS0_PIN, @@ -28,6 +36,11 @@ enum HS_GPIO_CONFIG #ifdef BSP_SPI1_USING_SS3 SPI1_CS3_PIN, #endif + +#ifdef BSP_USING_BRIDGE + SPI2_INT_PIN, + SPI2_READY_PIN, +#endif GPIO_ALLOC_START /* index of gpio driver start */ }; diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.c index 4b6146223..933bd7290 100644 --- a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.c +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.c @@ -1,16 +1,11 @@ -/* Copyright 2018 Canaan Inc. +/* + * Copyright (c) 2006-2018, RT-Thread Development Team * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at + * SPDX-License-Identifier: Apache-2.0 * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. + * Change Logs: + * Date Author Notes + * 2019-03-12 ZYH first version */ @@ -18,314 +13,538 @@ #ifdef BSP_USING_LCD #include -#include -#include -#include -#include -#include #define DBG_TAG "LCD" -#define DBG_LVL DBG_LOG +#define DBG_LVL DBG_WARNING #include +#define NO_OPERATION 0x00 +#define SOFTWARE_RESET 0x01 +#define READ_ID 0x04 +#define READ_STATUS 0x09 +#define READ_POWER_MODE 0x0A +#define READ_MADCTL 0x0B +#define READ_PIXEL_FORMAT 0x0C +#define READ_IMAGE_FORMAT 0x0D +#define READ_SIGNAL_MODE 0x0E +#define READ_SELT_DIAG_RESULT 0x0F +#define SLEEP_ON 0x10 +#define SLEEP_OFF 0x11 +#define PARTIAL_DISPALY_ON 0x12 +#define NORMAL_DISPALY_ON 0x13 +#define INVERSION_DISPALY_OFF 0x20 +#define INVERSION_DISPALY_ON 0x21 +#define GAMMA_SET 0x26 +#define DISPALY_OFF 0x28 +#define DISPALY_ON 0x29 +#define HORIZONTAL_ADDRESS_SET 0x2A +#define VERTICAL_ADDRESS_SET 0x2B +#define MEMORY_WRITE 0x2C +#define COLOR_SET 0x2D +#define MEMORY_READ 0x2E +#define PARTIAL_AREA 0x30 +#define VERTICAL_SCROL_DEFINE 0x33 +#define TEAR_EFFECT_LINE_OFF 0x34 +#define TEAR_EFFECT_LINE_ON 0x35 +#define MEMORY_ACCESS_CTL 0x36 +#define VERTICAL_SCROL_S_ADD 0x37 +#define IDLE_MODE_OFF 0x38 +#define IDLE_MODE_ON 0x39 +#define PIXEL_FORMAT_SET 0x3A +#define WRITE_MEMORY_CONTINUE 0x3C +#define READ_MEMORY_CONTINUE 0x3E +#define SET_TEAR_SCANLINE 0x44 +#define GET_SCANLINE 0x45 +#define WRITE_BRIGHTNESS 0x51 +#define READ_BRIGHTNESS 0x52 +#define WRITE_CTRL_DISPALY 0x53 +#define READ_CTRL_DISPALY 0x54 +#define WRITE_BRIGHTNESS_CTL 0x55 +#define READ_BRIGHTNESS_CTL 0x56 +#define WRITE_MIN_BRIGHTNESS 0x5E +#define READ_MIN_BRIGHTNESS 0x5F +#define READ_ID1 0xDA +#define READ_ID2 0xDB +#define READ_ID3 0xDC +#define RGB_IF_SIGNAL_CTL 0xB0 +#define NORMAL_FRAME_CTL 0xB1 +#define IDLE_FRAME_CTL 0xB2 +#define PARTIAL_FRAME_CTL 0xB3 +#define INVERSION_CTL 0xB4 +#define BLANK_PORCH_CTL 0xB5 +#define DISPALY_FUNCTION_CTL 0xB6 +#define ENTRY_MODE_SET 0xB7 +#define BACKLIGHT_CTL1 0xB8 +#define BACKLIGHT_CTL2 0xB9 +#define BACKLIGHT_CTL3 0xBA +#define BACKLIGHT_CTL4 0xBB +#define BACKLIGHT_CTL5 0xBC +#define BACKLIGHT_CTL7 0xBE +#define BACKLIGHT_CTL8 0xBF +#define POWER_CTL1 0xC0 +#define POWER_CTL2 0xC1 +#define VCOM_CTL1 0xC5 +#define VCOM_CTL2 0xC7 +#define NV_MEMORY_WRITE 0xD0 +#define NV_MEMORY_PROTECT_KEY 0xD1 +#define NV_MEMORY_STATUS_READ 0xD2 +#define READ_ID4 0xD3 +#define POSITIVE_GAMMA_CORRECT 0xE0 +#define NEGATIVE_GAMMA_CORRECT 0xE1 +#define DIGITAL_GAMMA_CTL1 0xE2 +#define DIGITAL_GAMMA_CTL2 0xE3 +#define INTERFACE_CTL 0xF6 + +#define LCD_SPI_CHANNEL SPI_DEVICE_0 +#define LCD_SPI_CHIP_SELECT SPI_CHIP_SELECT_0 + +#if defined(BSP_BOARD_K210_OPENMV_TEST) +#define LCD_SCAN_DIR DIR_YX_LRUD +#elif defined(BSP_BOARD_KD233) +#define LCD_SCAN_DIR (DIR_YX_RLUD | 0x08) +#elif defined(BSP_BOARD_USER) +/*user define.*/ +#define LCD_SCAN_DIR DIR_YX_RLDU +#endif -static lcd_ctl_t lcd_ctl; -static void init_dcx(void) +static struct lcd_8080_device _lcddev; + +static void drv_lcd_cmd(lcd_8080_device_t lcd, rt_uint8_t cmd) { - gpiohs_set_drive_mode(DCX_GPIONUM, GPIO_DM_OUTPUT); - gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_HIGH); + gpiohs_set_pin(lcd->dc_pin, GPIO_PV_LOW); + spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0); + spi_init_non_standard(lcd->spi_channel, 8 /*instrction length*/, 0 /*address length*/, 0 /*wait cycles*/, + SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/); + spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, &cmd, 1, SPI_TRANS_CHAR); } -static void set_dcx_control(void) +static void drv_lcd_data_byte(lcd_8080_device_t lcd, rt_uint8_t *data_buf, rt_uint32_t length) { - gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_LOW); + gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH); + spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0); + spi_init_non_standard(lcd->spi_channel, 8 /*instrction length*/, 0 /*address length*/, 0 /*wait cycles*/, + SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/); + spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, data_buf, length, SPI_TRANS_CHAR); } -static void set_dcx_data(void) +void drv_lcd_data_half_word(lcd_8080_device_t lcd, rt_uint16_t *data_buf, rt_uint32_t length) { - gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_HIGH); + gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH); + spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 16, 0); + spi_init_non_standard(lcd->spi_channel, 16 /*instrction length*/, 0 /*address length*/, 0 /*wait cycles*/, + SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/); + spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, data_buf, length, SPI_TRANS_SHORT); } - -static void init_rst(void) +void drv_lcd_data_word(lcd_8080_device_t lcd, rt_uint32_t *data_buf, rt_uint32_t length) { - gpiohs_set_drive_mode(RST_GPIONUM, GPIO_DM_OUTPUT); - gpiohs_set_pin(RST_GPIONUM, GPIO_PV_LOW); - rt_thread_mdelay(10); - gpiohs_set_pin(RST_GPIONUM, GPIO_PV_HIGH); - rt_thread_mdelay(10); + gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH); + spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0); + spi_init_non_standard(lcd->spi_channel, 0 /*instrction length*/, 32 /*address length*/, 0 /*wait cycles*/, + SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/); + spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, data_buf, length, SPI_TRANS_INT); } - -void tft_hard_init(void) +static void drv_lcd_hw_init(lcd_8080_device_t lcd) { - init_dcx(); - spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0); - init_rst(); - spi_set_clk_rate(SPI_CHANNEL, 20000000); +#if BSP_LCD_RST_PIN >= 0 + { + gpiohs_set_drive_mode(lcd->rst_pin, GPIO_DM_OUTPUT); + gpiohs_set_pin(lcd->rst_pin, GPIO_PV_LOW); + rt_thread_mdelay(20); + gpiohs_set_pin(lcd->rst_pin, GPIO_PV_HIGH); + rt_thread_mdelay(20); + } +#endif +#if BSP_LCD_BACKLIGHT_PIN >= 0 + { + gpiohs_set_drive_mode(lcd->backlight_pin, GPIO_DM_OUTPUT); +#if defined(BSP_LCD_BACKLIGHT_ACTIVE_LOW) + gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW); +#elif defined(BSP_LCD_BACKLIGHT_ACTIVE_HIGH) + gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH); +#else + gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW); +#endif + } +#endif + + gpiohs_set_drive_mode(lcd->dc_pin, GPIO_DM_OUTPUT); + gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH); + spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0); + spi_set_clk_rate(lcd->spi_channel, BSP_LCD_CLK_FREQ); } -void tft_write_command(uint8_t cmd) +static void drv_lcd_set_direction(lcd_8080_device_t lcd, lcd_dir_t dir) { - set_dcx_control(); - spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0); - spi_init_non_standard(SPI_CHANNEL, 8/*instrction length*/, 0/*address length*/, 0/*wait cycles*/, - SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/); - spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT, (uint8_t *)(&cmd), 1,SPI_TRANS_CHAR); -} - -void tft_write_byte(uint8_t *data_buf, uint32_t length) -{ - set_dcx_data(); - spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0); - spi_init_non_standard(SPI_CHANNEL, 8/*instrction length*/, 0/*address length*/, 0/*wait cycles*/, - SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/); - spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT, data_buf, length, SPI_TRANS_CHAR); -} - -void tft_write_half(uint16_t *data_buf, uint32_t length) -{ - set_dcx_data(); - spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 16, 0); - spi_init_non_standard(SPI_CHANNEL, 16/*instrction length*/, 0/*address length*/, 0/*wait cycles*/, - SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/); - spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT,data_buf, length, SPI_TRANS_SHORT); -} - -void tft_write_word(uint32_t *data_buf, uint32_t length, uint32_t flag) -{ - set_dcx_data(); - spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0); - - spi_init_non_standard(SPI_CHANNEL, 0/*instrction length*/, 32/*address length*/, 0/*wait cycles*/, - SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/); - spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT,data_buf, length, SPI_TRANS_INT); -} - -void tft_fill_data(uint32_t *data_buf, uint32_t length) -{ - set_dcx_data(); - spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0); - spi_init_non_standard(SPI_CHANNEL, 0/*instrction length*/, 32/*address length*/, 0/*wait cycles*/, - SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/); - spi_fill_data_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT,data_buf, length); -} - -void lcd_polling_enable(void) -{ - lcd_ctl.mode = 0; -} - -void lcd_interrupt_enable(void) -{ - lcd_ctl.mode = 1; -} - -void lcd_pre() -{ - fpioa_set_function(37, FUNC_GPIOHS0 + RST_GPIONUM); - fpioa_set_function(38, FUNC_GPIOHS0 + DCX_GPIONUM); - fpioa_set_function(36, FUNC_SPI0_SS0 + LCD_SPI_SLAVE_SELECT); - fpioa_set_function(39, FUNC_SPI0_SCLK); -} - -int lcd_init(void) -{ - - uint8_t data = 0; - lcd_pre(); - tft_hard_init(); - /*soft reset*/ - tft_write_command(SOFTWARE_RESET); - rt_thread_mdelay(10); - /*exit sleep*/ - tft_write_command(SLEEP_OFF); - rt_thread_mdelay(10); - /*pixel format*/ - tft_write_command(PIXEL_FORMAT_SET); - data = 0x55; - tft_write_byte(&data, 1); - /*display on*/ - tft_write_command(DISPALY_ON); - lcd_polling_enable(); - lcd_clear(PINK); - lcd_set_direction(DIR_YX_RLDU); - LOG_I("LCD initialization successfully"); -} -INIT_APP_EXPORT(lcd_init); - - - -void lcd_set_direction(lcd_dir_t dir) -{ - lcd_ctl.dir = dir; if (dir & DIR_XY_MASK) { - lcd_ctl.width = LCD_Y_MAX - 1; - lcd_ctl.height = LCD_X_MAX - 1; + lcd->lcd_info.width = BSP_LCD_Y_MAX; + lcd->lcd_info.height = BSP_LCD_X_MAX; } else { - lcd_ctl.width = LCD_X_MAX - 1; - lcd_ctl.height = LCD_Y_MAX - 1; + lcd->lcd_info.width = BSP_LCD_X_MAX; + lcd->lcd_info.height = BSP_LCD_Y_MAX; } - - tft_write_command(MEMORY_ACCESS_CTL); - tft_write_byte((uint8_t *)&dir, 1); + rt_kprintf("lcd witdth %d,height %d \n",lcd->lcd_info.width,lcd->lcd_info.height); + drv_lcd_cmd(lcd, MEMORY_ACCESS_CTL); + drv_lcd_data_byte(lcd, (rt_uint8_t *)&dir, 1); } -void lcd_set_area(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) + void drv_lcd_set_area(lcd_8080_device_t lcd, rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2) { - uint8_t data[4] = {0}; + rt_uint8_t data[4] = {0}; - data[0] = (uint8_t)(x1 >> 8); - data[1] = (uint8_t)(x1); - data[2] = (uint8_t)(x2 >> 8); - data[3] = (uint8_t)(x2); - tft_write_command(HORIZONTAL_ADDRESS_SET); - tft_write_byte(data, 4); + data[0] = (rt_uint8_t)(x1 >> 8); + data[1] = (rt_uint8_t)(x1); + data[2] = (rt_uint8_t)(x2 >> 8); + data[3] = (rt_uint8_t)(x2); + drv_lcd_cmd(lcd, HORIZONTAL_ADDRESS_SET); + drv_lcd_data_byte(lcd, data, 4); - data[0] = (uint8_t)(y1 >> 8); - data[1] = (uint8_t)(y1); - data[2] = (uint8_t)(y2 >> 8); - data[3] = (uint8_t)(y2); - tft_write_command(VERTICAL_ADDRESS_SET); - tft_write_byte(data, 4); + data[0] = (rt_uint8_t)(y1 >> 8); + data[1] = (rt_uint8_t)(y1); + data[2] = (rt_uint8_t)(y2 >> 8); + data[3] = (rt_uint8_t)(y2); + drv_lcd_cmd(lcd, VERTICAL_ADDRESS_SET); + drv_lcd_data_byte(lcd, data, 4); - tft_write_command(MEMORY_WRITE); + drv_lcd_cmd(lcd, MEMORY_WRITE); } -void lcd_draw_point(uint16_t x, uint16_t y, uint16_t color) +static void drv_lcd_set_pixel(lcd_8080_device_t lcd, uint16_t x, uint16_t y, uint16_t color) { - lcd_set_area(x, y, x, y); - tft_write_half(&color, 1); + drv_lcd_set_area(lcd, x, y, x, y); + drv_lcd_data_half_word(lcd, &color, 1); } -void lcd_draw_char(uint16_t x, uint16_t y, char c, uint16_t color) -{ - uint8_t i = 0; - uint8_t j = 0; - uint8_t data = 0; - - for (i = 0; i < 16; i++) - { - data = ascii0816[c * 16 + i]; - for (j = 0; j < 8; j++) - { - if (data & 0x80) - lcd_draw_point(x + j, y, color); - data <<= 1; - } - y++; - } -} - -void lcd_draw_string(uint16_t x, uint16_t y, char *str, uint16_t color) -{ - while (*str) - { - lcd_draw_char(x, y, *str, color); - str++; - x += 8; - } -} - -void lcd_ram_draw_string(char *str, uint32_t *ptr, uint16_t font_color, uint16_t bg_color) -{ - uint8_t i = 0; - uint8_t j = 0; - uint8_t data = 0; - uint8_t *pdata = NULL; - uint16_t width = 0; - uint32_t *pixel = NULL; - - width = 4 * strlen(str); - while (*str) - { - pdata = (uint8_t *)&ascii0816[(*str) * 16]; - for (i = 0; i < 16; i++) - { - data = *pdata++; - pixel = ptr + i * width; - for (j = 0; j < 4; j++) - { - switch (data >> 6) - { - case 0: - *pixel = ((uint32_t)bg_color << 16) | bg_color; - break; - case 1: - *pixel = ((uint32_t)bg_color << 16) | font_color; - break; - case 2: - *pixel = ((uint32_t)font_color << 16) | bg_color; - break; - case 3: - *pixel = ((uint32_t)font_color << 16) | font_color; - break; - default: - *pixel = 0; - break; - } - data <<= 2; - pixel++; - } - } - str++; - ptr += 4; - } -} - -void lcd_clear(uint16_t color) +static void drv_lcd_clear(lcd_8080_device_t lcd, uint16_t color) { uint32_t data = ((uint32_t)color << 16) | (uint32_t)color; - lcd_set_area(0, 0, lcd_ctl.width, lcd_ctl.height); - tft_fill_data(&data, LCD_X_MAX * LCD_Y_MAX / 2); + drv_lcd_set_area(lcd, 0, 0, lcd->lcd_info.width - 1, lcd->lcd_info.height - 1); + gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH); + spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0); + spi_init_non_standard(lcd->spi_channel, 0 /*instrction length*/, 32 /*address length*/, 0 /*wait cycles*/, + SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/); + spi_fill_data_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, (const uint32_t *)&data, lcd->lcd_info.width * lcd->lcd_info.height / 2); } -void lcd_draw_rectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t width, uint16_t color) +static void rt_bitblt(rt_uint16_t * dest, int dest_segment, int dest_common, int dest_x, int dest_y, int width, int height, + rt_uint16_t *src, int src_segment, int src_common, int src_x, int src_y) { - uint32_t data_buf[640] = {0}; - uint32_t *p = data_buf; - uint32_t data = color; - uint32_t index = 0; + int sx0, sx1, sy0, sy1; + int dx0, dx1, dy0, dy1; + rt_uint16_t *buff_src; + rt_uint16_t *buff_dest; + int x, y; - data = (data << 16) | data; - for (index = 0; index < 160 * width; index++) - *p++ = data; + if (width <= 0) { + return; + } + if (height <= 0) { + return; + } - lcd_set_area(x1, y1, x2, y1 + width - 1); - tft_write_word(data_buf, ((x2 - x1 + 1) * width + 1) / 2, 0); - lcd_set_area(x1, y2 - width + 1, x2, y2); - tft_write_word(data_buf, ((x2 - x1 + 1) * width + 1) / 2, 0); - lcd_set_area(x1, y1, x1 + width - 1, y2); - tft_write_word(data_buf, ((y2 - y1 + 1) * width + 1) / 2, 0); - lcd_set_area(x2 - width + 1, y1, x2, y2); - tft_write_word(data_buf, ((y2 - y1 + 1) * width + 1) / 2, 0); + sx0 = src_x; + sy0 = src_y; + sx1 = sx0 + width - 1; + sy1 = sy0 + height - 1; + dx0 = dest_x; + dy0 = dest_y; + dx1 = dx0 + width - 1; + dy1 = dy0 + height - 1; + + if (sx0 < 0) { + dx0 -= sx0; + sx0 = 0; + } + if (sy0 < 0) { + dy0 -= sy0; + sy0 = 0; + } + if (sx1 >= src_segment) { + dx1 -= (sx1 - src_segment + 1); + sx1 = src_segment - 1; + } + if (sy1 >= src_common) { + dy1 -= (sy1 - src_common + 1); + sy1 = src_common - 1; + } + + if (dx0 < 0) { + sx0 -= dx0; + dx0 = 0; + } + if (dy0 < 0) { + sy0 -= dy0; + dy0 = 0; + } + if (dx1 >= dest_segment) { + sx1 -= (dx1 - dest_segment + 1); + dx1 = dest_segment - 1; + } + if (dy1 >= dest_common) { + sy1 -= (dy1 - dest_common + 1); + dy1 = dest_common - 1; + } + + if (sx1 < 0 || sx0 >= src_segment) { + return; + } + if (sy1 < 0 || sy0 >= src_common) { + return; + } + if (dx1 < 0 || dx0 >= dest_segment) { + return; + } + if (dy1 < 0 || dy0 >= dest_common) { + return; + } + + if ((rt_ubase_t)dest < (rt_ubase_t)src) { + buff_src = src + (sy0 * src_segment) + sx0; + buff_dest = dest + (dy0 * dest_segment) + dx0; + for (y = sy0; y <= sy1; y++) { + src = buff_src; + dest = buff_dest; + for (x = sx0; x <= sx1; x++) { + *dest++ = *src++; + } + buff_src += src_segment; + buff_dest += dest_segment; + } + } else { + buff_src = src + (sy1 * src_segment) + sx1; + buff_dest = dest + (dy1 * dest_segment) + dx1; + for (y = sy1; y >= sy0; y--) { + src = buff_src; + dest = buff_dest; + for (x = sx1; x >= sx0; x--) { + *dest-- = *src--; + } + buff_src -= src_segment; + buff_dest -= dest_segment; + } + } } -void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr) +static void drv_lcd_rect_update(lcd_8080_device_t lcd, uint16_t x1, uint16_t y1, uint16_t width, uint16_t height) { - lcd_set_area(x1, y1, x1 + width - 1, y1 + height - 1); - tft_write_word(ptr, width * height / 2, lcd_ctl.mode ? 2 : 0); + static rt_uint16_t * rect_buffer = RT_NULL; + if(!rect_buffer) + { + rect_buffer = rt_malloc_align(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8), 64); + if(!rect_buffer) + { + return; + } + } + if(x1 == 0 && y1 == 0 && width == lcd->lcd_info.width && height == lcd->lcd_info.height) + { + drv_lcd_set_area(lcd, x1, y1, x1 + width - 1, y1 + height - 1); + drv_lcd_data_half_word(lcd, (rt_uint32_t *)lcd->lcd_info.framebuffer, width * height); + } + else + { + rt_bitblt(rect_buffer, width, height, 0, 0, width, height,(rt_uint16_t *)lcd->lcd_info.framebuffer, lcd->lcd_info.width, lcd->lcd_info.height, x1, y1); + drv_lcd_set_area(lcd, x1, y1, x1 + width - 1, y1 + height - 1); + drv_lcd_data_half_word(lcd, (rt_uint16_t *)rect_buffer, width * height); + } } - -void lcd_test0() +static rt_err_t drv_lcd_init(rt_device_t dev) { - char test[]={"xuos-intelligence framwork"}; - lcd_draw_string(0,0,test,BLUE); + rt_err_t ret = RT_EOK; + lcd_8080_device_t lcd = (lcd_8080_device_t)dev; + rt_uint8_t data = 0; + if(!lcd) + { + return RT_ERROR; + } + drv_lcd_hw_init(lcd); + /* reset LCD */ + drv_lcd_cmd(lcd, SOFTWARE_RESET); + rt_thread_mdelay(100); + + /* Enter normal status */ + drv_lcd_cmd(lcd, SLEEP_OFF); + rt_thread_mdelay(100); + + /* pixel format rgb565 */ + drv_lcd_cmd(lcd, PIXEL_FORMAT_SET); + data = 0x55; + drv_lcd_data_byte(lcd, &data, 1); + + /* set direction */ + drv_lcd_set_direction(lcd, LCD_SCAN_DIR); + + lcd->lcd_info.framebuffer = rt_malloc_align(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8), 64); + RT_ASSERT(lcd->lcd_info.framebuffer); + + uint16_t *framebuffer = (uint16_t *)(lcd->lcd_info.framebuffer); + for(uint32_t i=0; i<(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8))/2; i++) { + framebuffer[i] = BLACK; + } + /*display on*/ + drv_lcd_cmd(lcd, DISPALY_ON); + + /* set to black */ + drv_lcd_clear(lcd, BLACK); + return ret; } -MSH_CMD_EXPORT(lcd_test0,lcd show string); -void lcd_test1() +static rt_err_t drv_lcd_open(rt_device_t dev, rt_uint16_t oflag) { - lcd_clear(YELLOW); + /* Not need */ + + return RT_EOK; } -MSH_CMD_EXPORT(lcd_test1,lcd show string); +static rt_err_t drv_lcd_close(rt_device_t dev) +{ + + /* Not need */ + + return RT_EOK; +} + +static rt_size_t drv_lcd_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size) +{ + + /* Not need */ + + return 0; +} + +static rt_size_t drv_lcd_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size) +{ + + /* Not need */ + + return 0; +} + +static rt_err_t drv_lcd_control(rt_device_t dev, int cmd, void *args) +{ + rt_err_t ret = RT_EOK; + lcd_8080_device_t lcd = (lcd_8080_device_t)dev; + rt_base_t level; + struct rt_device_rect_info* rect_info = (struct rt_device_rect_info*)args; + + RT_ASSERT(dev != RT_NULL); + + switch (cmd) + { + case RTGRAPHIC_CTRL_RECT_UPDATE: + if(!rect_info) + { + LOG_E("RTGRAPHIC_CTRL_RECT_UPDATE error args"); + return -RT_ERROR; + } + drv_lcd_rect_update(lcd, rect_info->x, rect_info->y, rect_info->width, rect_info->height); + break; + +#if BSP_LCD_BACKLIGHT_PIN >= 0 + case RTGRAPHIC_CTRL_POWERON: +#if defined(BSP_LCD_BACKLIGHT_ACTIVE_LOW) + gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW); +#elif defined(BSP_LCD_BACKLIGHT_ACTIVE_HIGH) + gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH); +#else + gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW); +#endif + break; + + case RTGRAPHIC_CTRL_POWEROFF: +#if defined(BSP_LCD_BACKLIGHT_ACTIVE_LOW) + gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH); +#elif defined(BSP_LCD_BACKLIGHT_ACTIVE_HIGH) + gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW); +#else + gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH); +#endif + break; +#endif /* BSP_LCD_BACKLIGHT_PIN >= 0 */ + + case RTGRAPHIC_CTRL_GET_INFO: + *(struct rt_device_graphic_info *)args = lcd->lcd_info; + break; + + case RTGRAPHIC_CTRL_SET_MODE: + ret = -RT_ENOSYS; + break; + case RTGRAPHIC_CTRL_GET_EXT: + ret = -RT_ENOSYS; + break; + default: + LOG_E("drv_lcd_control cmd: %d", cmd); + break; + } + + return ret; +} + +#ifdef RT_USING_DEVICE_OPS +const static struct rt_device_ops drv_lcd_ops = +{ + drv_lcd_init, + drv_lcd_open, + drv_lcd_close, + drv_lcd_read, + drv_lcd_write, + drv_lcd_control +}; +#endif + + +int rt_hw_lcd_init(void) +{ + rt_err_t ret = RT_EOK; + lcd_8080_device_t lcd_dev = &_lcddev; + + lcd_dev->cs = SPI_CHIP_SELECT_0; + lcd_dev->dc_pin = LCD_DC_PIN; +#if BSP_LCD_RST_PIN >= 0 + lcd_dev->rst_pin = LCD_RST_PIN; +#endif +#if BSP_LCD_BACKLIGHT_PIN >= 0 + lcd_dev->backlight_pin = LCD_BACKLIGHT_PIN; +#endif + dmalock_sync_take(&lcd_dev->dma_channel, RT_WAITING_FOREVER); + lcd_dev->spi_channel = SPI_DEVICE_0; + lcd_dev->lcd_info.bits_per_pixel = 16; + lcd_dev->lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565; + + lcd_dev->parent.type = RT_Device_Class_Graphic; + lcd_dev->parent.rx_indicate = RT_NULL; + lcd_dev->parent.tx_complete = RT_NULL; + +#ifdef RT_USING_DEVICE_OPS + lcd_dev->parent.ops = &drv_lcd_ops; +#else + lcd_dev->parent.init = drv_lcd_init; + lcd_dev->parent.open = drv_lcd_open; + lcd_dev->parent.close = drv_lcd_close; + lcd_dev->parent.read = drv_lcd_read; + lcd_dev->parent.write = drv_lcd_write; + lcd_dev->parent.control = drv_lcd_control; +#endif + + lcd_dev->parent.user_data = RT_NULL; + + ret = rt_device_register(&lcd_dev->parent, "lcd", RT_DEVICE_FLAG_RDWR); + + return ret; +} +INIT_DEVICE_EXPORT(rt_hw_lcd_init); + +void lcd_set_direction(lcd_dir_t dir) +{ + drv_lcd_set_direction(&_lcddev, dir); +} #endif diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.h b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.h index 925780367..868c528ff 100644 --- a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.h +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.h @@ -1,480 +1,43 @@ -/* Copyright 2018 Canaan Inc. +/* + * Copyright (c) 2006-2018, RT-Thread Development Team * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at + * SPDX-License-Identifier: Apache-2.0 * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. + * Change Logs: + * Date Author Notes + * 2019-03-07 ZYH first version */ +#ifndef DRV_LCD_H__ +#define DRV_LCD_H__ +#include +#include +#include +#include +#include +#include +#include "dmalock.h" -#ifndef _DRV_LCD_H__ -#define _DRV_LCD_H__ - -#include -/* clang-format off */ -#define NO_OPERATION 0x00 -#define SOFTWARE_RESET 0x01 -#define READ_ID 0x04 -#define READ_STATUS 0x09 -#define READ_POWER_MODE 0x0A -#define READ_MADCTL 0x0B -#define READ_PIXEL_FORMAT 0x0C -#define READ_IMAGE_FORMAT 0x0D -#define READ_SIGNAL_MODE 0x0E -#define READ_SELT_DIAG_RESULT 0x0F -#define SLEEP_ON 0x10 -#define SLEEP_OFF 0x11 -#define PARTIAL_DISPALY_ON 0x12 -#define NORMAL_DISPALY_ON 0x13 -#define INVERSION_DISPALY_OFF 0x20 -#define INVERSION_DISPALY_ON 0x21 -#define GAMMA_SET 0x26 -#define DISPALY_OFF 0x28 -#define DISPALY_ON 0x29 -#define HORIZONTAL_ADDRESS_SET 0x2A -#define VERTICAL_ADDRESS_SET 0x2B -#define MEMORY_WRITE 0x2C -#define COLOR_SET 0x2D -#define MEMORY_READ 0x2E -#define PARTIAL_AREA 0x30 -#define VERTICAL_SCROL_DEFINE 0x33 -#define TEAR_EFFECT_LINE_OFF 0x34 -#define TEAR_EFFECT_LINE_ON 0x35 -#define MEMORY_ACCESS_CTL 0x36 -#define VERTICAL_SCROL_S_ADD 0x37 -#define IDLE_MODE_OFF 0x38 -#define IDLE_MODE_ON 0x39 -#define PIXEL_FORMAT_SET 0x3A -#define WRITE_MEMORY_CONTINUE 0x3C -#define READ_MEMORY_CONTINUE 0x3E -#define SET_TEAR_SCANLINE 0x44 -#define GET_SCANLINE 0x45 -#define WRITE_BRIGHTNESS 0x51 -#define READ_BRIGHTNESS 0x52 -#define WRITE_CTRL_DISPALY 0x53 -#define READ_CTRL_DISPALY 0x54 -#define WRITE_BRIGHTNESS_CTL 0x55 -#define READ_BRIGHTNESS_CTL 0x56 -#define WRITE_MIN_BRIGHTNESS 0x5E -#define READ_MIN_BRIGHTNESS 0x5F -#define READ_ID1 0xDA -#define READ_ID2 0xDB -#define READ_ID3 0xDC -#define RGB_IF_SIGNAL_CTL 0xB0 -#define NORMAL_FRAME_CTL 0xB1 -#define IDLE_FRAME_CTL 0xB2 -#define PARTIAL_FRAME_CTL 0xB3 -#define INVERSION_CTL 0xB4 -#define BLANK_PORCH_CTL 0xB5 -#define DISPALY_FUNCTION_CTL 0xB6 -#define ENTRY_MODE_SET 0xB7 -#define BACKLIGHT_CTL1 0xB8 -#define BACKLIGHT_CTL2 0xB9 -#define BACKLIGHT_CTL3 0xBA -#define BACKLIGHT_CTL4 0xBB -#define BACKLIGHT_CTL5 0xBC -#define BACKLIGHT_CTL7 0xBE -#define BACKLIGHT_CTL8 0xBF -#define POWER_CTL1 0xC0 -#define POWER_CTL2 0xC1 -#define VCOM_CTL1 0xC5 -#define VCOM_CTL2 0xC7 -#define NV_MEMORY_WRITE 0xD0 -#define NV_MEMORY_PROTECT_KEY 0xD1 -#define NV_MEMORY_STATUS_READ 0xD2 -#define READ_ID4 0xD3 -#define POSITIVE_GAMMA_CORRECT 0xE0 -#define NEGATIVE_GAMMA_CORRECT 0xE1 -#define DIGITAL_GAMMA_CTL1 0xE2 -#define DIGITAL_GAMMA_CTL2 0xE3 -#define INTERFACE_CTL 0xF6 - -#define DCX_GPIONUM (5) -#define RST_GPIONUM (4) -#define LCD_SPI_SLAVE_SELECT 3 - -#define SPI_CHANNEL 0 -#define SPI_SLAVE_SELECT 3 - -/* clang-format off */ -#define LCD_X_MAX (240) -#define LCD_Y_MAX (320) - -#define BLACK 0x0000 -#define NAVY 0x000F -#define DARKGREEN 0x03E0 -#define DARKCYAN 0x03EF -#define MAROON 0x7800 -#define PURPLE 0x780F -#define OLIVE 0x7BE0 -#define LIGHTGREY 0xC618 -#define DARKGREY 0x7BEF -#define BLUE 0x001F -#define GREEN 0x07E0 -#define CYAN 0x07FF -#define RED 0xF800 -#define MAGENTA 0xF81F -#define YELLOW 0xFFE0 -#define WHITE 0xFFFF -#define ORANGE 0xFD20 -#define GREENYELLOW 0xAFE5 -#define PINK 0xF81F -#define USER_COLOR 0xAA55 -/* clang-format on */ - -uint8_t const ascii0816[] = -{ - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x81, 0xA5, 0x81, 0x81, 0xBD, - 0x99, 0x81, 0x81, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0xFF, - 0xDB, 0xFF, 0xFF, 0xC3, 0xE7, 0xFF, 0xFF, 0x7E, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x6C, 0xFE, 0xFE, 0xFE, 0xFE, 0x7C, 0x38, 0x10, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x7C, 0xFE, - 0x7C, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, - 0x3C, 0x3C, 0xE7, 0xE7, 0xE7, 0x18, 0x18, 0x3C, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x18, 0x3C, 0x7E, 0xFF, 0xFF, 0x7E, 0x18, 0x18, 0x3C, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3C, - 0x3C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xE7, 0xC3, 0xC3, 0xE7, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x66, 0x42, 0x42, 0x66, 0x3C, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xC3, 0x99, 0xBD, - 0xBD, 0x99, 0xC3, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x1E, 0x0E, - 0x1A, 0x32, 0x78, 0xCC, 0xCC, 0xCC, 0xCC, 0x78, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x3C, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x18, 0x7E, 0x18, 0x18, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x33, 0x3F, 0x30, 0x30, 0x30, - 0x30, 0x70, 0xF0, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x63, - 0x7F, 0x63, 0x63, 0x63, 0x63, 0x67, 0xE7, 0xE6, 0xC0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x18, 0x18, 0xDB, 0x3C, 0xE7, 0x3C, 0xDB, 0x18, 0x18, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xC0, 0xE0, 0xF0, 0xF8, 0xFE, 0xF8, - 0xF0, 0xE0, 0xC0, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x06, 0x0E, - 0x1E, 0x3E, 0xFE, 0x3E, 0x1E, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x18, 0x3C, 0x7E, 0x18, 0x18, 0x18, 0x7E, 0x3C, 0x18, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, - 0x66, 0x00, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0xDB, - 0xDB, 0xDB, 0x7B, 0x1B, 0x1B, 0x1B, 0x1B, 0x1B, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x7C, 0xC6, 0x60, 0x38, 0x6C, 0xC6, 0xC6, 0x6C, 0x38, 0x0C, 0xC6, - 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFE, 0xFE, 0xFE, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3C, - 0x7E, 0x18, 0x18, 0x18, 0x7E, 0x3C, 0x18, 0x7E, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x18, 0x3C, 0x7E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x18, 0x7E, 0x3C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x18, 0x0C, 0xFE, 0x0C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x60, 0xFE, 0x60, 0x30, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0xC0, - 0xC0, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x28, 0x6C, 0xFE, 0x6C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x38, 0x7C, 0x7C, 0xFE, 0xFE, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0xFE, 0x7C, 0x7C, - 0x38, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x18, 0x3C, 0x3C, 0x3C, 0x18, 0x18, 0x18, 0x00, 0x18, 0x18, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x24, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6C, - 0x6C, 0xFE, 0x6C, 0x6C, 0x6C, 0xFE, 0x6C, 0x6C, 0x00, 0x00, 0x00, 0x00, - 0x18, 0x18, 0x7C, 0xC6, 0xC2, 0xC0, 0x7C, 0x06, 0x06, 0x86, 0xC6, 0x7C, - 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC2, 0xC6, 0x0C, 0x18, - 0x30, 0x60, 0xC6, 0x86, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x00, 0xFE, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x7E, 0x18, - 0x18, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, - 0x18, 0x0C, 0x06, 0x0C, 0x18, 0x30, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x0C, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0C, 0x00, 0x7E, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x1B, 0x1B, 0x18, 0x18, 0x18, - 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x18, 0x18, 0x18, 0x18, 0xD8, 0xD8, 0xD8, 0x70, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x7E, 0x00, 0x18, 0x18, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xDC, 0x00, - 0x76, 0xDC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6C, 0x6C, - 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x0C, 0x0C, - 0x0C, 0x0C, 0x0C, 0xEC, 0x6C, 0x6C, 0x3C, 0x1C, 0x00, 0x00, 0x00, 0x00, - 0x00, 0xD8, 0x6C, 0x6C, 0x6C, 0x6C, 0x6C, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0xD8, 0x30, 0x60, 0xC8, 0xF8, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x7C, 0x7C, 0x7C, 0x7C, 0x7C, 0x7C, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 -}; +//POINT_COLOR +#define WHITE 0xFFFF +#define BLACK 0x0000 +#define BLUE 0x001F +#define BRED 0XF81F +#define GRED 0XFFE0 +#define GBLUE 0X07FF +#define RED 0xF800 +#define MAGENTA 0xF81F +#define GREEN 0x07E0 +#define CYAN 0x7FFF +#define YELLOW 0xFFE0 +#define BROWN 0XBC40 +#define BRRED 0XFC07 +#define GRAY 0X8430 +#define GRAY175 0XAD75 +#define GRAY151 0X94B2 +#define GRAY187 0XBDD7 +#define GRAY240 0XF79E typedef enum _lcd_dir { @@ -490,31 +53,38 @@ typedef enum _lcd_dir DIR_MASK = 0xE0, } lcd_dir_t; -typedef struct _lcd_ctl +typedef struct lcd_8080_device { - uint8_t mode; - uint8_t dir; - uint16_t width; - uint16_t height; -} lcd_ctl_t; + struct rt_device parent; + struct rt_device_graphic_info lcd_info; + int spi_channel; + int cs; + int dc_pin; +#if BSP_LCD_RST_PIN >= 0 + int rst_pin; +#endif +#if BSP_LCD_BACKLIGHT_PIN >= 0 + int backlight_pin; +#endif + int dma_channel; +} * lcd_8080_device_t; -void tft_hard_init(void); -void tft_write_command(uint8_t cmd); -void tft_write_byte(uint8_t *data_buf, uint32_t length); -void tft_write_half(uint16_t *data_buf, uint32_t length); -void tft_write_word(uint32_t *data_buf, uint32_t length, uint32_t flag); -void tft_fill_data(uint32_t *data_buf, uint32_t length); +int rt_hw_lcd_init(void); +void drv_lcd_set_area(lcd_8080_device_t lcd, rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2); +void drv_lcd_data_word(lcd_8080_device_t lcd, rt_uint32_t *data_buf, rt_uint32_t length); +void drv_lcd_data_half_word(lcd_8080_device_t lcd, rt_uint16_t *data_buf, rt_uint32_t length); -void lcd_polling_enable(void); -void lcd_interrupt_enable(void); -int lcd_init(void); -void lcd_clear(uint16_t color); +/* for mpy machine.lcd */ +void lcd_display_on(void); +void lcd_display_off(void); +void lcd_clear(int color); +void lcd_draw_point_color(int x, int y, int color); +void lcd_show_string(int x, int y, int size, const char *data); +void lcd_draw_line(int x1, int y1, int x2, int y2); +void lcd_draw_rectangle(int x1, int y1, int x2, int y2); +void lcd_draw_circle(int x1, int y1, int r); +void lcd_set_color(int back, int fore); +void lcd_show_image(int x, int y, int length, int wide, const unsigned char *buf); void lcd_set_direction(lcd_dir_t dir); -void lcd_set_area(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2); -void lcd_draw_point(uint16_t x, uint16_t y, uint16_t color); -void lcd_draw_string(uint16_t x, uint16_t y, char *str, uint16_t color); -void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr); -void lcd_draw_rectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t width, uint16_t color); -void lcd_ram_draw_string(char *str, uint32_t *ptr, uint16_t font_color, uint16_t bg_color); #endif diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_mpylcd.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_mpylcd.c new file mode 100644 index 000000000..ff7e96ce0 --- /dev/null +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_mpylcd.c @@ -0,0 +1,1297 @@ +#include +#include +#include +#include + +static const uint8_t asc2_1608[]; +static const uint8_t asc2_2412[]; +static const uint8_t asc2_3216[]; + +static rt_device_t dev = 0; +static struct rt_device_graphic_info info; +static uint16_t fcolor = WHITE; +static int bcolor = BLACK; + +static int lcd_init(void) +{ + int result; + + if (dev) + return 0; + + dev = rt_device_find("lcd"); + if (!dev) + return -1; + + if (rt_device_open(dev, 0) != 0) + { + dev = 0; + return -1; + } + + result = rt_device_control(dev, RTGRAPHIC_CTRL_GET_INFO, &info); + if (result != 0) + { + rt_device_close(dev); + dev = 0; + return result; + } + + return 0; +} + +static int lcd_fill_point(int x, int y, uint16_t c) +{ + uint16_t *fb = (uint16_t *)info.framebuffer; + + if ((x < 0) || (y < 0) || (x >= info.width) || (y >= info.height)) + return -1; + + fb += x; + fb += (y * info.width); + + *fb = c; + + return 0; +} + +static void lcd_fill_char1608(int x, int y, char c, uint16_t color, int bc) +{ + uint8_t pos = 0; + uint8_t t = 0; + uint8_t data, temp; + int size = 16; + + data = c - ' '; + + for (pos = 0; pos < size; pos++) + { + temp = asc2_1608[(uint16_t)data * size + pos]; + for (t = 0; t < 8; t++) + { + if (temp & 0x80) + lcd_fill_point(x + t, y, color); + else if (bc != -1) + lcd_fill_point(x + t, y, (uint16_t)bc); + + temp <<= 1; + } + y++; + } +} + +static void lcd_fill_char2412(int x, int y, char c, uint16_t color, int bc) +{ + uint8_t pos = 0; + uint8_t t = 0; + uint8_t data, temp; + int size = 24; + int num; + int x0; + + data = c - ' '; + + for (pos = 0; pos < (size * 16) / 8; pos++) + { + temp = asc2_2412[(uint16_t)data * (size * 16) / 8 + pos]; + if (pos % 2 == 0) + { + num = 8; + x0 = x; + } + else + { + num = 4; + } + + for (t = 0; t < num; t++) + { + if (temp & 0x80) + lcd_fill_point(x0, y, color); + else if (bc != -1) + lcd_fill_point(x0, y, (uint16_t)bc); + + temp <<= 1; + x0++; + } + + if (pos % 2 != 0) + y++; + } +} + +static void lcd_fill_char3216(int x, int y, char c, uint16_t color, int bc) +{ + uint8_t pos = 0; + uint8_t t = 0; + uint8_t data, temp; + int size = 32; + int x0; + + data = c - ' '; + + for (pos = 0; pos < size * (size / 2) / 8; pos++) + { + temp = asc2_3216[(uint16_t)data * size * (size / 2) / 8 + pos]; + if (pos % 2 == 0) + { + x0 = x; + } + + for (t = 0; t < 8; t++) + { + if (temp & 0x80) + lcd_fill_point(x0, y, color); + else if (bc != -1) + lcd_fill_point(x0, y, (uint16_t)bc); + + temp <<= 1; + x0++; + } + + if (pos % 2 != 0) + y++; + } +} + +static void lcd_update(int x, int y, int w, int h) +{ + struct rt_device_rect_info rect; + + if (x < 0) + { + w += x; + x = 0; + } + if (y < 0) + { + h += y; + y = 0; + } + if ((x > info.width) || (y > info.height)) + return; + + if ((x + w) > info.width) + w = info.width - x; + if ((y + h) > info.height) + h = info.height - h; + + if ((w < 1) || (h < 1)) + return; + + rect.x = x; + rect.y = y; + rect.width = w; + rect.height = h; + + rt_device_control(dev, RTGRAPHIC_CTRL_RECT_UPDATE, &rect); +} + +static void _draw_ellipse(int16_t x, int16_t y, int16_t rx, int16_t ry) +{ + int ix, iy; + int h, i, j, k; + int oh, oi, oj, ok; + int xmh, xph, ypk, ymk; + int xmi, xpi, ymj, ypj; + int xmj, xpj, ymi, ypi; + int xmk, xpk, ymh, yph; + uint16_t color = fcolor; + + /* + * Sanity check radii + */ + if ((rx <= 0) || (ry <= 0)) + return; + + /* + * Init vars + */ + oh = oi = oj = ok = 0xFFFF; + + if (rx > ry) + { + ix = 0; + iy = rx * 64; + + do + { + h = (ix + 32) >> 6; + i = (iy + 32) >> 6; + j = (h * ry) / rx; + k = (i * ry) / rx; + + if (((ok != k) && (oj != k)) || ((oj != j) && (ok != j)) || (k != j)) + { + xph = x + h; + xmh = x - h; + if (k > 0) + { + ypk = y + k; + ymk = y - k; + lcd_fill_point(xmh, ypk, color); + lcd_fill_point(xph, ypk, color); + lcd_fill_point(xmh, ymk, color); + lcd_fill_point(xph, ymk, color); + } + else + { + lcd_fill_point(xmh, y, color); + lcd_fill_point(xph, y, color); + } + ok = k; + xpi = x + i; + xmi = x - i; + if (j > 0) + { + ypj = y + j; + ymj = y - j; + lcd_fill_point(xmi, ypj, color); + lcd_fill_point(xpi, ypj, color); + lcd_fill_point(xmi, ymj, color); + lcd_fill_point(xpi, ymj, color); + } + else + { + lcd_fill_point(xmi, y, color); + lcd_fill_point(xpi, y, color); + } + oj = j; + } + + ix = ix + iy / rx; + iy = iy - ix / rx; + } while (i > h); + } + else + { + ix = 0; + iy = ry * 64; + + do + { + h = (ix + 32) >> 6; + i = (iy + 32) >> 6; + j = (h * rx) / ry; + k = (i * rx) / ry; + + if (((oi != i) && (oh != i)) || ((oh != h) && (oi != h) && (i != h))) + { + xmj = x - j; + xpj = x + j; + if (i > 0) + { + ypi = y + i; + ymi = y - i; + lcd_fill_point(xmj, ypi, color); + lcd_fill_point(xpj, ypi, color); + lcd_fill_point(xmj, ymi, color); + lcd_fill_point(xpj, ymi, color); + } + else + { + lcd_fill_point(xmj, y, color); + lcd_fill_point(xpj, y, color); + } + oi = i; + xmk = x - k; + xpk = x + k; + if (h > 0) + { + yph = y + h; + ymh = y - h; + lcd_fill_point(xmk, yph, color); + lcd_fill_point(xpk, yph, color); + lcd_fill_point(xmk, ymh, color); + lcd_fill_point(xpk, ymh, color); + } + else + { + lcd_fill_point(xmk, y, color); + lcd_fill_point(xpk, y, color); + } + oh = h; + } + + ix = ix + iy / ry; + iy = iy - ix / ry; + } while (i > h); + } + + x -= rx; + y -= ry; + if (x < 0) + x = 0; + if (y < 0) + y = 0; + + lcd_update(x, y, 2 * rx + 1, 2 * ry + 1); +} + +void lcd_display_on(void) +{ + if (lcd_init() != 0) + return; + + rt_device_control(dev, RTGRAPHIC_CTRL_POWERON, RT_NULL); +} + +void lcd_display_off(void) +{ + if (lcd_init() != 0) + return; + + rt_device_control(dev, RTGRAPHIC_CTRL_POWEROFF, RT_NULL); +} + +void lcd_clear(int color) +{ + int x, y; + + if (lcd_init() != 0) + return; + + for (x = 0; x < info.width; x++) + { + for (y = 0; y < info.height; y++) + { + lcd_fill_point(x, y, (uint16_t)color); + } + } + + lcd_update(0, 0, info.width, info.height); +} + +void lcd_draw_point_color(int x, int y, int color) +{ + if (lcd_init() != 0) + return; + + if (lcd_fill_point(x, y, (uint16_t)color) == 0) + lcd_update(x, y, 1, 1); +} + +void lcd_show_string(int x, int y, int size, const char *str) +{ + uint16_t color = fcolor; + int bc = bcolor; + int x0 = x; + + if (lcd_init() != 0) + return; + + switch (size) + { + case 16: + { + while (*str) + { + lcd_fill_char1608(x, y, *str, color, bc); + str++; + x += 8; + } + + lcd_update(x0, y, x - x0, size); + } + break; + case 24: + { + while (*str) + { + lcd_fill_char2412(x, y, *str, color, bc); + str++; + x += 12; + } + + lcd_update(x0, y, x - x0, size); + } + break; + case 32: + { + while (*str) + { + lcd_fill_char3216(x, y, *str, color, bc); + str++; + x += 16; + } + + lcd_update(x0, y, x - x0, size); + } + break; + } +} + +void lcd_draw_line(int x1, int y1, int x2, int y2) +{ + float k, b; + int y, x; + + if (lcd_init() != 0) + return; + + k = (y2 - y1) / (float)(x2 - x1); + b = y1 - k * x1; + + for (x = x1; x <= x2; x++) + { + y = k * x + b; + lcd_fill_point(x, y, fcolor); + } + + lcd_update(x1, y1, x2 - x1 + 1, y2 - y1 + 1); +} + +void lcd_draw_rectangle(int x1, int y1, int x2, int y2) +{ + int x, y; + uint16_t color = (uint16_t)fcolor; + + if (lcd_init() != 0) + return; + + for (x = x1; x < x2; x++) + { + lcd_fill_point(x, y1, color); + } + + for (x = x1; x < x2; x++) + { + lcd_fill_point(x, y2, color); + } + + for (y = y1; y < y2; y++) + { + lcd_fill_point(x1, y, color); + } + + for (y = y1; y < y2; y++) + { + lcd_fill_point(x2, y, color); + } + + lcd_update(x1, y1, x2 - x1 + 1, y2 - y1 + 1); +} + +void lcd_draw_circle(int x1, int y1, int r) +{ + if (lcd_init() != 0) + return; + + _draw_ellipse(x1, y1, r, r); +} + +void lcd_set_color(int back, int fore) +{ + bcolor = back; + fcolor = (uint16_t)fore; +} + +void lcd_show_image(int x, int y, int wide, int height,const rt_uint8_t *buf) +{ + uint16_t *color = (uint16_t*)buf; + int h, w; + + if (lcd_init() != 0) + return; + + for (h = 0; h < height; h ++) + { + for (w = 0; w < wide; w ++) + { + lcd_fill_point(x + w, y + h, *color); + color ++; + } + } + + lcd_update(x, y, wide, height); +} +//////////////////////////////////////////////////////////////////////////////////////////////// +void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr) +{ + lcd_8080_device_t lcd = (lcd_8080_device_t)dev; + if (lcd_init() != 0) + return; + drv_lcd_set_area(lcd,x1, y1, x1 + width, y1 + height); + drv_lcd_data_word(lcd,ptr, width * height/2); +} + +void lcd_draw_16_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr) +{ + lcd_8080_device_t lcd = (lcd_8080_device_t)dev; + if (lcd_init() != 0) + return; + drv_lcd_set_area(lcd,x1, y1, x1 + width, y1 + height); + drv_lcd_data_half_word(lcd,ptr, width * height); + +} + +#define ASC2_1608 +#define ASC2_2412 +#define ASC2_3216 + +#ifdef ASC2_1608 +static const uint8_t asc2_1608[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*" ",0*/ + 0x00, 0x00, 0x00, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x00, 0x00, 0x10, 0x10, 0x00, 0x00, 0x00, /*"!",1*/ + 0x00, 0x00, 0x00, 0x28, 0x28, 0x28, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*""",2*/ + 0x00, 0x00, 0x00, 0x12, 0x12, 0x16, 0x7F, 0x24, 0x24, 0xFE, 0x28, 0x48, 0x48, 0x00, 0x00, 0x00, /*"#",3*/ + 0x00, 0x00, 0x08, 0x08, 0x3E, 0x49, 0x48, 0x68, 0x3E, 0x0B, 0x09, 0x49, 0x3E, 0x08, 0x08, 0x00, /*"$",4*/ + 0x00, 0x00, 0x00, 0x60, 0x90, 0x90, 0x62, 0x0C, 0x30, 0x46, 0x09, 0x09, 0x06, 0x00, 0x00, 0x00, /*"%",5*/ + 0x00, 0x00, 0x00, 0x1C, 0x20, 0x20, 0x30, 0x30, 0x49, 0x45, 0x45, 0x62, 0x3D, 0x00, 0x00, 0x00, /*"&",6*/ + 0x00, 0x00, 0x00, 0x10, 0x10, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"'",7*/ + 0x00, 0x00, 0x0C, 0x08, 0x08, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x08, 0x08, 0x04, 0x00, 0x00, /*"(",8*/ + 0x00, 0x00, 0x30, 0x10, 0x10, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x10, 0x10, 0x30, 0x00, 0x00, /*")",9*/ + 0x00, 0x00, 0x00, 0x08, 0x49, 0x3E, 0x1C, 0x6B, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"*",10*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x10, 0x10, 0xFE, 0x10, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, /*"+",11*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x10, 0x20, 0x00, /*",",12*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"-",13*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, /*".",14*/ + 0x00, 0x00, 0x00, 0x02, 0x04, 0x04, 0x04, 0x08, 0x08, 0x10, 0x10, 0x20, 0x20, 0x20, 0x40, 0x00, /*"/",15*/ + 0x00, 0x00, 0x00, 0x1C, 0x22, 0x41, 0x41, 0x49, 0x41, 0x41, 0x41, 0x22, 0x1C, 0x00, 0x00, 0x00, /*"0",16*/ + 0x00, 0x00, 0x00, 0x18, 0x28, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x3E, 0x00, 0x00, 0x00, /*"1",17*/ + 0x00, 0x00, 0x00, 0x3E, 0x43, 0x01, 0x01, 0x02, 0x06, 0x0C, 0x10, 0x20, 0x7F, 0x00, 0x00, 0x00, /*"2",18*/ + 0x00, 0x00, 0x00, 0x3E, 0x41, 0x01, 0x03, 0x1C, 0x03, 0x01, 0x01, 0x43, 0x3E, 0x00, 0x00, 0x00, /*"3",19*/ + 0x00, 0x00, 0x00, 0x06, 0x0A, 0x1A, 0x12, 0x22, 0x42, 0x7F, 0x02, 0x02, 0x02, 0x00, 0x00, 0x00, /*"4",20*/ + 0x00, 0x00, 0x00, 0x7E, 0x40, 0x40, 0x7C, 0x42, 0x01, 0x01, 0x01, 0x42, 0x3C, 0x00, 0x00, 0x00, /*"5",21*/ + 0x00, 0x00, 0x00, 0x1E, 0x31, 0x60, 0x40, 0x5E, 0x63, 0x41, 0x41, 0x23, 0x1E, 0x00, 0x00, 0x00, /*"6",22*/ + 0x00, 0x00, 0x00, 0x7F, 0x03, 0x02, 0x04, 0x04, 0x08, 0x08, 0x10, 0x10, 0x20, 0x00, 0x00, 0x00, /*"7",23*/ + 0x00, 0x00, 0x00, 0x3E, 0x41, 0x41, 0x41, 0x3E, 0x63, 0x41, 0x41, 0x63, 0x3E, 0x00, 0x00, 0x00, /*"8",24*/ + 0x00, 0x00, 0x00, 0x3C, 0x62, 0x41, 0x41, 0x63, 0x3D, 0x01, 0x03, 0x46, 0x3C, 0x00, 0x00, 0x00, /*"9",25*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, /*":",26*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x18, 0x18, 0x10, 0x20, 0x00, /*";",27*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0E, 0x38, 0x40, 0x38, 0x0E, 0x01, 0x00, 0x00, 0x00, 0x00, /*"<",28*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"=",29*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x38, 0x0E, 0x01, 0x0E, 0x38, 0x40, 0x00, 0x00, 0x00, 0x00, /*">",30*/ + 0x00, 0x00, 0x00, 0x38, 0x44, 0x04, 0x0C, 0x18, 0x10, 0x10, 0x00, 0x10, 0x10, 0x00, 0x00, 0x00, /*"?",31*/ + 0x00, 0x00, 0x00, 0x1E, 0x33, 0x21, 0x47, 0x49, 0x49, 0x49, 0x49, 0x47, 0x20, 0x30, 0x0E, 0x00, /*"@",32*/ + 0x00, 0x00, 0x00, 0x08, 0x14, 0x14, 0x14, 0x14, 0x22, 0x3E, 0x22, 0x41, 0x41, 0x00, 0x00, 0x00, /*"A",33*/ + 0x00, 0x00, 0x00, 0x7E, 0x41, 0x41, 0x41, 0x7E, 0x43, 0x41, 0x41, 0x43, 0x7E, 0x00, 0x00, 0x00, /*"B",34*/ + 0x00, 0x00, 0x00, 0x1E, 0x21, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x21, 0x1E, 0x00, 0x00, 0x00, /*"C",35*/ + 0x00, 0x00, 0x00, 0x7C, 0x42, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x42, 0x7C, 0x00, 0x00, 0x00, /*"D",36*/ + 0x00, 0x00, 0x00, 0x7F, 0x40, 0x40, 0x40, 0x7F, 0x40, 0x40, 0x40, 0x40, 0x7F, 0x00, 0x00, 0x00, /*"E",37*/ + 0x00, 0x00, 0x00, 0x7F, 0x40, 0x40, 0x40, 0x7F, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, 0x00, 0x00, /*"F",38*/ + 0x00, 0x00, 0x00, 0x1E, 0x21, 0x40, 0x40, 0x40, 0x43, 0x41, 0x41, 0x21, 0x1E, 0x00, 0x00, 0x00, /*"G",39*/ + 0x00, 0x00, 0x00, 0x41, 0x41, 0x41, 0x41, 0x7F, 0x41, 0x41, 0x41, 0x41, 0x41, 0x00, 0x00, 0x00, /*"H",40*/ + 0x00, 0x00, 0x00, 0x7C, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x7C, 0x00, 0x00, 0x00, /*"I",41*/ + 0x00, 0x00, 0x00, 0x1C, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x44, 0x38, 0x00, 0x00, 0x00, /*"J",42*/ + 0x00, 0x00, 0x00, 0x42, 0x44, 0x48, 0x50, 0x70, 0x78, 0x48, 0x44, 0x46, 0x42, 0x00, 0x00, 0x00, /*"K",43*/ + 0x00, 0x00, 0x00, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x7F, 0x00, 0x00, 0x00, /*"L",44*/ + 0x00, 0x00, 0x00, 0x63, 0x63, 0x55, 0x55, 0x55, 0x49, 0x41, 0x41, 0x41, 0x41, 0x00, 0x00, 0x00, /*"M",45*/ + 0x00, 0x00, 0x00, 0x61, 0x61, 0x51, 0x51, 0x49, 0x49, 0x45, 0x45, 0x43, 0x43, 0x00, 0x00, 0x00, /*"N",46*/ + 0x00, 0x00, 0x00, 0x1C, 0x22, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x22, 0x1C, 0x00, 0x00, 0x00, /*"O",47*/ + 0x00, 0x00, 0x00, 0x7E, 0x43, 0x41, 0x41, 0x43, 0x7E, 0x40, 0x40, 0x40, 0x40, 0x00, 0x00, 0x00, /*"P",48*/ + 0x00, 0x00, 0x00, 0x1C, 0x22, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x22, 0x1E, 0x06, 0x02, 0x00, /*"Q",49*/ + 0x00, 0x00, 0x00, 0x7E, 0x43, 0x41, 0x41, 0x43, 0x7C, 0x42, 0x41, 0x41, 0x40, 0x00, 0x00, 0x00, /*"R",50*/ + 0x00, 0x00, 0x00, 0x1E, 0x61, 0x40, 0x40, 0x30, 0x0E, 0x01, 0x01, 0x43, 0x3E, 0x00, 0x00, 0x00, /*"S",51*/ + 0x00, 0x00, 0x00, 0xFE, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x00, 0x00, 0x00, /*"T",52*/ + 0x00, 0x00, 0x00, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x63, 0x3E, 0x00, 0x00, 0x00, /*"U",53*/ + 0x00, 0x00, 0x00, 0x41, 0x41, 0x22, 0x22, 0x22, 0x14, 0x14, 0x14, 0x14, 0x08, 0x00, 0x00, 0x00, /*"V",54*/ + 0x00, 0x00, 0x00, 0x81, 0x81, 0x81, 0x5A, 0x5A, 0x5A, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, /*"W",55*/ + 0x00, 0x00, 0x00, 0x41, 0x22, 0x14, 0x14, 0x08, 0x14, 0x14, 0x22, 0x22, 0x41, 0x00, 0x00, 0x00, /*"X",56*/ + 0x00, 0x00, 0x00, 0x82, 0x44, 0x44, 0x28, 0x38, 0x10, 0x10, 0x10, 0x10, 0x10, 0x00, 0x00, 0x00, /*"Y",57*/ + 0x00, 0x00, 0x00, 0x7F, 0x03, 0x02, 0x04, 0x08, 0x08, 0x10, 0x20, 0x60, 0x7F, 0x00, 0x00, 0x00, /*"Z",58*/ + 0x00, 0x00, 0x1C, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x1C, 0x00, 0x00, /*"[",59*/ + 0x00, 0x00, 0x00, 0x40, 0x20, 0x20, 0x20, 0x10, 0x10, 0x08, 0x08, 0x04, 0x04, 0x04, 0x02, 0x00, /*"\",60*/ + 0x00, 0x00, 0x38, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x38, 0x00, 0x00, /*"]",61*/ + 0x00, 0x00, 0x00, 0x10, 0x28, 0x44, 0xC6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"^",62*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, /*"_",63*/ + 0x00, 0x30, 0x10, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"`",64*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x22, 0x02, 0x3E, 0x42, 0x42, 0x46, 0x3A, 0x00, 0x00, 0x00, /*"a",65*/ + 0x00, 0x00, 0x40, 0x40, 0x40, 0x7C, 0x64, 0x42, 0x42, 0x42, 0x42, 0x64, 0x5C, 0x00, 0x00, 0x00, /*"b",66*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x22, 0x40, 0x40, 0x40, 0x40, 0x22, 0x1C, 0x00, 0x00, 0x00, /*"c",67*/ + 0x00, 0x00, 0x02, 0x02, 0x02, 0x3E, 0x26, 0x42, 0x42, 0x42, 0x42, 0x26, 0x3A, 0x00, 0x00, 0x00, /*"d",68*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x26, 0x42, 0x7E, 0x40, 0x40, 0x22, 0x1C, 0x00, 0x00, 0x00, /*"e",69*/ + 0x00, 0x00, 0x0C, 0x10, 0x10, 0x7C, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x00, 0x00, 0x00, /*"f",70*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x3A, 0x26, 0x42, 0x42, 0x42, 0x42, 0x26, 0x3A, 0x02, 0x22, 0x1C, /*"g",71*/ + 0x00, 0x00, 0x40, 0x40, 0x40, 0x5C, 0x62, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x00, 0x00, 0x00, /*"h",72*/ + 0x00, 0x00, 0x10, 0x10, 0x00, 0x70, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x7C, 0x00, 0x00, 0x00, /*"i",73*/ + 0x00, 0x00, 0x08, 0x08, 0x00, 0x38, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x70, /*"j",74*/ + 0x00, 0x00, 0x40, 0x40, 0x40, 0x44, 0x48, 0x50, 0x70, 0x48, 0x48, 0x44, 0x42, 0x00, 0x00, 0x00, /*"k",75*/ + 0x00, 0x00, 0x70, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x0E, 0x00, 0x00, 0x00, /*"l",76*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x00, 0x00, 0x00, /*"m",77*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x62, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x00, 0x00, 0x00, /*"n",78*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x66, 0x42, 0x42, 0x42, 0x42, 0x66, 0x3C, 0x00, 0x00, 0x00, /*"o",79*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x5C, 0x64, 0x42, 0x42, 0x42, 0x42, 0x64, 0x7C, 0x40, 0x40, 0x40, /*"p",80*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x3A, 0x26, 0x42, 0x42, 0x42, 0x42, 0x26, 0x3A, 0x02, 0x02, 0x02, /*"q",81*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x32, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, /*"r",82*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x42, 0x40, 0x70, 0x0E, 0x02, 0x42, 0x3C, 0x00, 0x00, 0x00, /*"s",83*/ + 0x00, 0x00, 0x00, 0x10, 0x10, 0x7E, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x0E, 0x00, 0x00, 0x00, /*"t",84*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x46, 0x3A, 0x00, 0x00, 0x00, /*"u",85*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x42, 0x42, 0x24, 0x24, 0x24, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, /*"v",86*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x81, 0x81, 0x5A, 0x5A, 0x5A, 0x5A, 0x24, 0x24, 0x00, 0x00, 0x00, /*"w",87*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x42, 0x24, 0x18, 0x18, 0x18, 0x24, 0x24, 0x42, 0x00, 0x00, 0x00, /*"x",88*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x42, 0x22, 0x24, 0x24, 0x14, 0x18, 0x18, 0x08, 0x08, 0x10, 0x30, /*"y",89*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x7E, 0x00, 0x00, 0x00, /*"z",90*/ + 0x00, 0x00, 0x0C, 0x10, 0x10, 0x10, 0x10, 0x10, 0x60, 0x10, 0x10, 0x10, 0x10, 0x10, 0x0C, 0x00, /*"{",91*/ + 0x00, 0x00, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, /*"|",92*/ + 0x00, 0x00, 0x60, 0x10, 0x10, 0x10, 0x10, 0x10, 0x0C, 0x10, 0x10, 0x10, 0x10, 0x10, 0x60, 0x00, /*"}",93*/ +}; +#endif + +#ifdef ASC2_2412 +static const uint8_t asc2_2412[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*" ",0*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, + 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"!",1*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19, 0x80, 0x19, 0x80, 0x19, 0x80, 0x19, 0x80, + 0x19, 0x80, 0x19, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*""",2*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x60, 0x04, 0x40, 0x0C, 0xC0, 0x0C, 0xC0, + 0x7F, 0xF0, 0x7F, 0xF0, 0x08, 0x80, 0x19, 0x80, 0x19, 0x80, 0xFF, 0xE0, 0xFF, 0xE0, 0x33, 0x00, + 0x33, 0x00, 0x22, 0x00, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"#",3*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x0F, 0x80, 0x1F, 0xC0, 0x3A, 0x40, + 0x32, 0x00, 0x32, 0x00, 0x3A, 0x00, 0x1F, 0x00, 0x07, 0xC0, 0x02, 0xE0, 0x02, 0x60, 0x02, 0x60, + 0x22, 0xE0, 0x3F, 0xC0, 0x1F, 0x80, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, /*"$",4*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x00, 0x48, 0x00, 0xCC, 0x00, 0xCC, 0x00, + 0xCC, 0x00, 0x48, 0x40, 0x79, 0xC0, 0x0E, 0x00, 0x73, 0xC0, 0x02, 0x40, 0x06, 0x60, 0x06, 0x60, + 0x06, 0x60, 0x02, 0x40, 0x03, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"%",5*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x80, 0x1F, 0x80, 0x18, 0x00, 0x18, 0x00, + 0x18, 0x00, 0x0C, 0x00, 0x1E, 0x00, 0x36, 0x30, 0x63, 0x30, 0x63, 0xB0, 0x61, 0xA0, 0x60, 0xE0, + 0x30, 0xC0, 0x3F, 0x60, 0x0E, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"&",6*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, + 0x06, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 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0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, + 0x71, 0x80, 0x7F, 0x80, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"b",66*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x0F, 0x00, 0x3F, 0x80, 0x30, 0x80, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, + 0x30, 0x80, 0x3F, 0x80, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"c",67*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, + 0x1E, 0xC0, 0x3F, 0xC0, 0x31, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, + 0x31, 0xC0, 0x3F, 0xC0, 0x1E, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"d",68*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x0F, 0x00, 0x3F, 0x80, 0x31, 0xC0, 0x60, 0xC0, 0x7F, 0xC0, 0x7F, 0xC0, 0x60, 0x00, 0x60, 0x00, + 0x30, 0x40, 0x3F, 0xC0, 0x0F, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"e",69*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xE0, 0x03, 0xE0, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, + 0x3F, 0xE0, 0x3F, 0xE0, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, + 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"f",70*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1E, 0xC0, 0x3F, 0xC0, 0x31, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, + 0x31, 0xC0, 0x3F, 0xC0, 0x1E, 0xC0, 0x00, 0xC0, 0x21, 0xC0, 0x3F, 0x80, 0x1F, 0x00, 0x00, 0x00, /*"g",71*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, + 0x67, 0x00, 0x7F, 0x80, 0x71, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, + 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"h",72*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3E, 0x00, 0x3E, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, + 0x06, 0x00, 0x7F, 0xE0, 0x7F, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"i",73*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1F, 0x00, 0x1F, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, + 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x3E, 0x00, 0x3C, 0x00, 0x00, 0x00, /*"j",74*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, + 0x61, 0xC0, 0x63, 0x80, 0x67, 0x00, 0x6E, 0x00, 0x7C, 0x00, 0x7C, 0x00, 0x76, 0x00, 0x67, 0x00, + 0x63, 0x00, 0x61, 0x80, 0x61, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"k",75*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFC, 0x00, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, + 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, + 0x0E, 0x00, 0x07, 0xC0, 0x03, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"l",76*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x6D, 0xC0, 0x7F, 0xE0, 0x66, 0x60, 0x66, 0x60, 0x66, 0x60, 0x66, 0x60, 0x66, 0x60, 0x66, 0x60, + 0x66, 0x60, 0x66, 0x60, 0x66, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"m",77*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x67, 0x00, 0x7F, 0x80, 0x71, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, + 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"n",78*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1F, 0x00, 0x3F, 0x80, 0x31, 0x80, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, + 0x31, 0x80, 0x3F, 0x80, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"o",79*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x6F, 0x00, 0x7F, 0x80, 0x71, 0x80, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, + 0x71, 0x80, 0x7F, 0x80, 0x6F, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, 0x00, 0x00, /*"p",80*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1E, 0xC0, 0x3F, 0xC0, 0x31, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, + 0x31, 0xC0, 0x3F, 0xC0, 0x1E, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0x00, /*"q",81*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x0C, 0xE0, 0x0D, 0xF0, 0x0F, 0x10, 0x0E, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, + 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"r",82*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1F, 0x80, 0x3F, 0xC0, 0x60, 0x40, 0x60, 0x00, 0x7F, 0x00, 0x1F, 0x80, 0x01, 0xC0, 0x00, 0xC0, + 0x41, 0xC0, 0x7F, 0x80, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"s",83*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, + 0x7F, 0xC0, 0x7F, 0xC0, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, + 0x0C, 0x00, 0x0F, 0xC0, 0x07, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"t",84*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, 0x60, 0xC0, + 0x71, 0xC0, 0x3F, 0xC0, 0x1C, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"u",85*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x60, 0xC0, 0x71, 0xC0, 0x31, 0x80, 0x31, 0x80, 0x3B, 0x80, 0x1B, 0x00, 0x1B, 0x00, 0x1B, 0x00, + 0x0E, 0x00, 0x0E, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"v",86*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xC0, 0x30, 0xC0, 0x30, 0x60, 0x60, 0x66, 0x60, 0x66, 0x60, 0x66, 0x60, 0x3F, 0xC0, 0x39, 0xC0, + 0x39, 0xC0, 0x39, 0xC0, 0x30, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"w",87*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x71, 0xC0, 0x31, 0x80, 0x1B, 0x00, 0x1F, 0x00, 0x0E, 0x00, 0x0E, 0x00, 0x0E, 0x00, 0x1F, 0x00, + 0x1B, 0x00, 0x31, 0x80, 0x71, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"x",88*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x60, 0xC0, 0x31, 0x80, 0x31, 0x80, 0x31, 0x80, 0x1B, 0x00, 0x1B, 0x00, 0x1F, 0x00, 0x0E, 0x00, + 0x0E, 0x00, 0x06, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x38, 0x00, 0x38, 0x00, 0x00, 0x00, /*"y",89*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x7F, 0xC0, 0x7F, 0xC0, 0x03, 0x80, 0x03, 0x00, 0x07, 0x00, 0x0E, 0x00, 0x1C, 0x00, 0x18, 0x00, + 0x30, 0x00, 0x7F, 0xC0, 0x7F, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"z",90*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0xC0, 0x07, 0xC0, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, + 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x0E, 0x00, 0x06, 0x00, 0x06, 0x00, + 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x07, 0xC0, 0x03, 0xC0, 0x00, 0x00, 0x00, 0x00, /*"{",91*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, + 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, + 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, /*"|",92*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x3E, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, + 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x03, 0xC0, 0x03, 0xC0, 0x07, 0x00, 0x06, 0x00, 0x06, 0x00, + 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0x3E, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, /*"}",93*/ +}; +#endif + +#ifdef ASC2_3216 +static const uint8_t asc2_3216[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*" ",0*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xC0, 0x01, 0xC0, + 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, + 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xC0, + 0x01, 0xC0, 0x01, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"!",1*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x30, 0x06, 0x30, + 0x06, 0x30, 0x06, 0x30, 0x06, 0x30, 0x06, 0x30, 0x06, 0x30, 0x06, 0x30, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*""",2*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x8C, 0x03, 0x8C, 0x03, 0x0C, + 0x03, 0x18, 0x03, 0x18, 0x03, 0x18, 0x7F, 0xFF, 0x7F, 0xFF, 0x06, 0x30, 0x06, 0x30, 0x0E, 0x30, + 0x0C, 0x70, 0x0C, 0x60, 0xFF, 0xFE, 0xFF, 0xFE, 0x18, 0x60, 0x18, 0xC0, 0x18, 0xC0, 0x18, 0xC0, + 0x30, 0xC0, 0x31, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"#",3*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, + 0x03, 0xF0, 0x0F, 0xFC, 0x0E, 0x8C, 0x1C, 0x80, 0x1C, 0x80, 0x1C, 0x80, 0x1C, 0x80, 0x0E, 0x80, + 0x0F, 0xE0, 0x03, 0xF8, 0x00, 0xFC, 0x00, 0x9E, 0x00, 0x8E, 0x00, 0x8E, 0x00, 0x8E, 0x10, 0x9C, + 0x1F, 0xF8, 0x07, 0xF0, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, /*"$",4*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x7E, 0x00, + 0xE7, 0x00, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, 0xE7, 0x00, 0x7E, 0x1C, 0x3C, 0x78, 0x01, 0xC0, + 0x07, 0x00, 0x3C, 0x78, 0x70, 0xFC, 0x01, 0xCE, 0x01, 0x86, 0x01, 0x86, 0x01, 0x86, 0x01, 0xCE, + 0x00, 0xFC, 0x00, 0x78, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"%",5*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0xC0, 0x0F, 0xE0, + 0x1E, 0x20, 0x1C, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0x1E, 0x00, 0x0E, 0x00, 0x0F, 0x00, 0x1F, 0x00, + 0x3F, 0x83, 0x33, 0xC3, 0x71, 0xE3, 0x70, 0xE3, 0x70, 0xF6, 0x70, 0x7E, 0x78, 0x3C, 0x3C, 0x3E, + 0x1F, 0xEE, 0x07, 0xCF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"&",6*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x80, 0x01, 0x80, + 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"'",7*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x60, 0x00, 0x60, + 0x00, 0xE0, 0x00, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, + 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x01, 0x80, 0x01, 0xC0, + 0x01, 0xC0, 0x00, 0xC0, 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0x01, 0xC0, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0xC0, 0x1F, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, + 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, + 0x3F, 0xFE, 0x3F, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"i",73*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x00, 0xE0, 0x00, 0xE0, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0xE0, 0x0F, 0xE0, 0x00, 0xE0, 0x00, 0xE0, 0x00, 0xE0, + 0x00, 0xE0, 0x00, 0xE0, 0x00, 0xE0, 0x00, 0xE0, 0x00, 0xE0, 0x00, 0xE0, 0x00, 0xE0, 0x00, 0xE0, + 0x00, 0xE0, 0x00, 0xE0, 0x00, 0xE0, 0x00, 0xE0, 0x00, 0xE0, 0x01, 0xC0, 0x1F, 0xC0, 0x1F, 0x00, /*"j",74*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0x1C, 0x00, + 0x1C, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0x1C, 0x0F, 0x1C, 0x1E, 0x1C, 0x3C, 0x1C, 0x78, 0x1C, 0xF0, + 0x1D, 0xE0, 0x1F, 0xC0, 0x1F, 0xE0, 0x1F, 0xE0, 0x1E, 0xF0, 0x1C, 0x78, 0x1C, 0x3C, 0x1C, 0x1C, + 0x1C, 0x1E, 0x1C, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"k",75*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x80, 0x7F, 0x80, 0x03, 0x80, + 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, + 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x01, 0xC0, + 0x01, 0xFC, 0x00, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"l",76*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x1C, 0x7F, 0xBE, 0x71, 0xE7, 0x71, 0xC7, 0x71, 0xC7, + 0x71, 0xC7, 0x71, 0xC7, 0x71, 0xC7, 0x71, 0xC7, 0x71, 0xC7, 0x71, 0xC7, 0x71, 0xC7, 0x71, 0xC7, + 0x71, 0xC7, 0x71, 0xC7, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"m",77*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0xF0, 0x1D, 0xF8, 0x1E, 0x3C, 0x1E, 0x1C, 0x1C, 0x1C, + 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, + 0x1C, 0x1C, 0x1C, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"n",78*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0xE0, 0x0F, 0xF8, 0x1E, 0x3C, 0x1C, 0x1C, 0x38, 0x0E, + 0x38, 0x0E, 0x38, 0x0E, 0x38, 0x0E, 0x38, 0x0E, 0x38, 0x0E, 0x38, 0x0E, 0x1C, 0x1C, 0x1E, 0x3C, + 0x0F, 0xF8, 0x03, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"o",79*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0xF8, 0x1F, 0xFC, 0x1F, 0x1E, 0x1E, 0x0E, 0x1C, 0x07, + 0x1C, 0x07, 0x1C, 0x07, 0x1C, 0x07, 0x1C, 0x07, 0x1C, 0x07, 0x1C, 0x07, 0x1E, 0x0E, 0x1F, 0x1E, + 0x1F, 0xFC, 0x1C, 0xF8, 0x1C, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0x1C, 0x00, /*"p",80*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0xCE, 0x0F, 0xFE, 0x1E, 0x3E, 0x1C, 0x1E, 0x38, 0x0E, + 0x38, 0x0E, 0x38, 0x0E, 0x38, 0x0E, 0x38, 0x0E, 0x38, 0x0E, 0x38, 0x0E, 0x1C, 0x1E, 0x1E, 0x3E, + 0x0F, 0xFE, 0x07, 0xCE, 0x00, 0x0E, 0x00, 0x0E, 0x00, 0x0E, 0x00, 0x0E, 0x00, 0x0E, 0x00, 0x0E, /*"q",81*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x3C, 0x07, 0x7E, 0x07, 0xC2, 0x07, 0x80, 0x07, 0x80, + 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, 0x07, 0x00, + 0x07, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"r",82*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0xF0, 0x0F, 0xF8, 0x1E, 0x08, 0x1C, 0x00, 0x1C, 0x00, + 0x1F, 0x00, 0x0F, 0xF0, 0x07, 0xF8, 0x00, 0xFC, 0x00, 0x3C, 0x00, 0x1C, 0x00, 0x1C, 0x10, 0x3C, + 0x1F, 0xF8, 0x07, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"s",83*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, + 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x3F, 0xFE, 0x3F, 0xFE, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, + 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x03, 0xC0, + 0x01, 0xFE, 0x00, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"t",84*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, + 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x3C, 0x1E, 0x3C, + 0x0F, 0xDC, 0x07, 0x9C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"u",85*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x0E, 0x38, 0x1C, 0x38, 0x1C, 0x38, 0x1C, 0x1C, 0x38, + 0x1C, 0x38, 0x1E, 0x78, 0x0E, 0x70, 0x0E, 0x70, 0x0F, 0xF0, 0x07, 0xE0, 0x07, 0xE0, 0x07, 0xE0, + 0x03, 0xC0, 0x03, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"v",86*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x07, 0xE0, 0x07, 0x70, 0x0E, 0x70, 0x0E, 0x71, 0x8E, + 0x71, 0x8E, 0x7B, 0xDE, 0x3B, 0xDC, 0x3A, 0x5C, 0x3A, 0x5C, 0x3E, 0x7C, 0x1E, 0x78, 0x1C, 0x38, + 0x1C, 0x38, 0x1C, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"w",87*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x3C, 0x1E, 0x78, 0x0E, 0x70, 0x0F, 0xF0, 0x07, 0xE0, + 0x03, 0xC0, 0x03, 0xC0, 0x01, 0x80, 0x03, 0xC0, 0x07, 0xE0, 0x0F, 0xF0, 0x0E, 0x70, 0x1E, 0x78, + 0x3C, 0x3C, 0x78, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"x",88*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x0E, 0x38, 0x1C, 0x38, 0x1C, 0x3C, 0x3C, 0x1C, 0x38, + 0x1C, 0x38, 0x1E, 0x78, 0x0E, 0x70, 0x0E, 0x70, 0x07, 0xE0, 0x07, 0xE0, 0x07, 0xE0, 0x03, 0xC0, + 0x03, 0xC0, 0x03, 0x80, 0x03, 0x80, 0x03, 0x80, 0x07, 0x00, 0x0F, 0x00, 0x3E, 0x00, 0x3C, 0x00, /*"y",89*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0xFC, 0x1F, 0xFC, 0x00, 0x3C, 0x00, 0x78, 0x00, 0x70, + 0x00, 0xF0, 0x01, 0xE0, 0x01, 0xC0, 0x03, 0xC0, 0x07, 0x80, 0x07, 0x00, 0x0F, 0x00, 0x1E, 0x00, + 0x1F, 0xFC, 0x1F, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*"z",90*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0x00, 0xFC, 0x01, 0xE0, + 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, + 0x03, 0x80, 0x1F, 0x00, 0x1F, 0x00, 0x03, 0x80, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, + 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xE0, 0x00, 0xFC, 0x00, 0x7C, 0x00, 0x00, /*"{",91*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, + 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, + 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, + 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, /*"|",92*/ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x1F, 0x80, 0x03, 0xC0, + 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, + 0x00, 0xE0, 0x00, 0x7C, 0x00, 0x7C, 0x00, 0xE0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, + 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x01, 0xC0, 0x03, 0xC0, 0x1F, 0x80, 0x1F, 0x00, 0x00, 0x00, /*"}",93*/ +}; +#endif \ No newline at end of file diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_mpymachine.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_mpymachine.c new file mode 100644 index 000000000..1cc00e302 --- /dev/null +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_mpymachine.c @@ -0,0 +1,27 @@ +#include + +int mp_port_get_freq(int clkid, int *freq) +{ + int ret = 0; + uint32_t value; + + switch (clkid) + { + case 0: + value = sysctl_clock_get_freq(SYSCTL_CLOCK_CPU); + break; + case 1: + value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL1); + break; + case 2: + value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL2); + break; + default: + ret = -1; + break; + } + + *freq = (int)value; + + return ret; +} diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_spi.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_spi.c new file mode 100644 index 000000000..0f591e1d3 --- /dev/null +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_spi.c @@ -0,0 +1,301 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-03-18 ZYH first version + */ + +#include +#include + +#ifdef RT_USING_SPI +#include "drv_spi.h" +#include +#include +#include "dmalock.h" +#include +#include +#include +#include "utils.h" + +#define DRV_SPI_DEVICE(spi_bus) (struct drv_spi_bus *)(spi_bus) + +#define MAX_CLOCK (40000000UL) + +struct drv_spi_bus +{ + struct rt_spi_bus parent; + spi_device_num_t spi_instance; + dmac_channel_number_t dma_send_channel; + dmac_channel_number_t dma_recv_channel; + struct rt_completion dma_completion; +}; + +struct drv_cs +{ + int cs_index; + int cs_pin; +}; + +static volatile spi_t *const spi_instance[4] = +{ + (volatile spi_t *)SPI0_BASE_ADDR, + (volatile spi_t *)SPI1_BASE_ADDR, + (volatile spi_t *)SPI_SLAVE_BASE_ADDR, + (volatile spi_t *)SPI3_BASE_ADDR +}; + +static rt_err_t drv_spi_configure(struct rt_spi_device *device, + struct rt_spi_configuration *configuration) +{ + rt_err_t ret = RT_EOK; + int freq = 0; + struct drv_spi_bus *bus = DRV_SPI_DEVICE(device->bus); + struct drv_cs * cs = (struct drv_cs *)device->parent.user_data; + RT_ASSERT(bus != RT_NULL); + + gpiohs_set_drive_mode(cs->cs_pin, GPIO_DM_OUTPUT); + gpiohs_set_pin(cs->cs_pin, GPIO_PV_HIGH); + +#ifdef BSP_USING_SPI1_AS_QSPI + /* Todo:QSPI*/ +#else + spi_init(bus->spi_instance, configuration->mode & RT_SPI_MODE_3, SPI_FF_STANDARD, configuration->data_width, 0); +#endif + freq = spi_set_clk_rate(bus->spi_instance, configuration->max_hz > MAX_CLOCK ? MAX_CLOCK : configuration->max_hz); + rt_kprintf("set spi freq %d\n", freq); + return ret; +} + + +void __spi_set_tmod(uint8_t spi_num, uint32_t tmod) +{ + RT_ASSERT(spi_num < SPI_DEVICE_MAX); + volatile spi_t *spi_handle = spi[spi_num]; + uint8_t tmod_offset = 0; + switch(spi_num) + { + case 0: + case 1: + case 2: + tmod_offset = 8; + break; + case 3: + default: + tmod_offset = 10; + break; + } + set_bit(&spi_handle->ctrlr0, 3 << tmod_offset, tmod << tmod_offset); +} +int dma_irq_callback(void *ctx) +{ + struct rt_completion * cmp = ctx; + if(cmp) + { + rt_completion_done(cmp); + } +} + +static rt_uint32_t drv_spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message) +{ + struct drv_spi_bus *bus = DRV_SPI_DEVICE(device->bus); + struct drv_cs * cs = (struct drv_cs *)device->parent.user_data; + struct rt_spi_configuration *cfg = &device->config; + uint32_t * tx_buff = RT_NULL; + uint32_t * rx_buff = RT_NULL; + int i; + rt_ubase_t dummy = 0xFFFFFFFFU; + if(cfg->data_width != 8) + { + return 0; + } + + RT_ASSERT(bus != RT_NULL); + + if(message->cs_take) + { + gpiohs_set_pin(cs->cs_pin, GPIO_PV_LOW); + } + if(message->length) + { + bus->dma_send_channel = DMAC_CHANNEL_MAX; + bus->dma_recv_channel = DMAC_CHANNEL_MAX; + + rt_completion_init(&bus->dma_completion); + if(message->recv_buf) + { + dmalock_sync_take(&bus->dma_recv_channel, RT_WAITING_FOREVER); + sysctl_dma_select(bus->dma_recv_channel, SYSCTL_DMA_SELECT_SSI0_RX_REQ + bus->spi_instance * 2); + rx_buff = rt_calloc(message->length * 4, 1); + if(!rx_buff) + { + goto transfer_done; + } + } + + if(message->send_buf) + { + dmalock_sync_take(&bus->dma_send_channel, RT_WAITING_FOREVER); + sysctl_dma_select(bus->dma_send_channel, SYSCTL_DMA_SELECT_SSI0_TX_REQ + bus->spi_instance * 2); + tx_buff = rt_malloc(message->length * 4); + if(!tx_buff) + { + goto transfer_done; + } + for(i = 0; i < message->length; i++) + { + tx_buff[i] = ((uint8_t *)message->send_buf)[i]; + } + } + + if(message->send_buf && message->recv_buf) + { + dmac_irq_register(bus->dma_recv_channel, dma_irq_callback, &bus->dma_completion, 1); + __spi_set_tmod(bus->spi_instance, SPI_TMOD_TRANS_RECV); + spi_instance[bus->spi_instance]->dmacr = 0x3; + spi_instance[bus->spi_instance]->ssienr = 0x01; + dmac_set_single_mode(bus->dma_recv_channel, (void *)(&spi_instance[bus->spi_instance]->dr[0]), rx_buff, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT, + DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, message->length); + dmac_set_single_mode(bus->dma_send_channel, tx_buff, (void *)(&spi_instance[bus->spi_instance]->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE, + DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, message->length); + } + else if(message->send_buf) + { + dmac_irq_register(bus->dma_send_channel, dma_irq_callback, &bus->dma_completion, 1); + __spi_set_tmod(bus->spi_instance, SPI_TMOD_TRANS); + spi_instance[bus->spi_instance]->dmacr = 0x2; + spi_instance[bus->spi_instance]->ssienr = 0x01; + dmac_set_single_mode(bus->dma_send_channel, tx_buff, (void *)(&spi_instance[bus->spi_instance]->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE, + DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, message->length); + } + else if(message->recv_buf) + { + dmac_irq_register(bus->dma_recv_channel, dma_irq_callback, &bus->dma_completion, 1); + __spi_set_tmod(bus->spi_instance, SPI_TMOD_RECV); + spi_instance[bus->spi_instance]->ctrlr1 = message->length - 1; + spi_instance[bus->spi_instance]->dmacr = 0x1; + spi_instance[bus->spi_instance]->ssienr = 0x01; + spi_instance[bus->spi_instance]->dr[0] = 0xFF; + dmac_set_single_mode(bus->dma_recv_channel, (void *)(&spi_instance[bus->spi_instance]->dr[0]), rx_buff, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT, + DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, message->length); + } + else + { + goto transfer_done; + } + spi_instance[bus->spi_instance]->ser = 1U << cs->cs_index; + + rt_completion_wait(&bus->dma_completion, RT_WAITING_FOREVER); + if(message->recv_buf) + dmac_irq_unregister(bus->dma_recv_channel); + else + dmac_irq_unregister(bus->dma_send_channel); + + // wait until all data has been transmitted + while ((spi_instance[bus->spi_instance]->sr & 0x05) != 0x04) + ; + spi_instance[bus->spi_instance]->ser = 0x00; + spi_instance[bus->spi_instance]->ssienr = 0x00; + + if(message->recv_buf) + { + for(i = 0; i < message->length; i++) + { + ((uint8_t *)message->recv_buf)[i] = (uint8_t)rx_buff[i]; + } + } + +transfer_done: + dmalock_release(bus->dma_send_channel); + dmalock_release(bus->dma_recv_channel); + if(tx_buff) + { + rt_free(tx_buff); + } + if(rx_buff) + { + rt_free(rx_buff); + } + } + + if(message->cs_release) + { + gpiohs_set_pin(cs->cs_pin, GPIO_PV_HIGH); + } + + return message->length; +} + +const static struct rt_spi_ops drv_spi_ops = +{ + drv_spi_configure, + drv_spi_xfer +}; + +int rt_hw_spi_init(void) +{ + rt_err_t ret = RT_EOK; + +#ifdef BSP_USING_SPI1 + { + static struct drv_spi_bus spi_bus1; + spi_bus1.spi_instance = SPI_DEVICE_1; + ret = rt_spi_bus_register(&spi_bus1.parent, "spi1", &drv_spi_ops); + +#ifdef BSP_SPI1_USING_SS0 + { + static struct rt_spi_device spi_device10; + static struct drv_cs cs10 = + { + .cs_index = SPI_CHIP_SELECT_0, + .cs_pin = SPI1_CS0_PIN + }; + + rt_spi_bus_attach_device(&spi_device10, "spi10", "spi1", (void *)&cs10); + } +#endif + +#ifdef BSP_SPI1_USING_SS1 + { + static struct rt_spi_device spi_device11; + static struct drv_cs cs11 = + { + .cs_index = SPI_CHIP_SELECT_1, + .cs_pin = SPI1_CS1_PIN + }; + rt_spi_bus_attach_device(&spi_device11, "spi11", "spi1", (void *)&cs11); + } +#endif + +#ifdef BSP_SPI1_USING_SS2 + { + static struct rt_spi_device spi_device12; + static struct drv_cs cs12 = + { + .cs_index = SPI_CHIP_SELECT_2, + .cs_pin = SPI1_CS2_PIN + }; + rt_spi_bus_attach_device(&spi_device12, "spi12", "spi1", (void *)&cs12); + } +#endif + +#ifdef BSP_SPI1_USING_SS3 + { + static struct rt_spi_device spi_device13; + static struct drv_cs cs13 = + { + .cs_index = SPI_CHIP_SELECT_2, + .cs_pin = SPI1_CS2_PIN + }; + rt_spi_bus_attach_device(&spi_device13, "spi13", "spi1", (void *)&cs13); + } +#endif + } +#endif + return ret; +} +INIT_DEVICE_EXPORT(rt_hw_spi_init); +#endif diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_spi.h b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_spi.h new file mode 100644 index 000000000..78c973e0e --- /dev/null +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_spi.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-03-18 ZYH first version + */ + +#ifndef DRV_SPI_H__ +#define DRV_SPI_H__ + +int rt_hw_spi_init(void); + +#endif diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/heap.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/heap.c new file mode 100644 index 000000000..f1d6d2c27 --- /dev/null +++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/heap.c @@ -0,0 +1,11 @@ +#include +#include + +size_t get_free_heap_size(void) +{ + rt_uint32_t total, used, max; + + rt_memory_info(&total, &used, &max); + + return total - used; +} diff --git a/Ubiquitous/RT_Thread/bsp/k210/rtconfig.h b/Ubiquitous/RT_Thread/bsp/k210/rtconfig.h index 4730b6183..fb106bb78 100644 --- a/Ubiquitous/RT_Thread/bsp/k210/rtconfig.h +++ b/Ubiquitous/RT_Thread/bsp/k210/rtconfig.h @@ -18,12 +18,13 @@ #define RT_ALIGN_SIZE 8 #define RT_THREAD_PRIORITY_32 #define RT_THREAD_PRIORITY_MAX 32 -#define RT_TICK_PER_SECOND 1000 +#define RT_TICK_PER_SECOND 80 #define RT_USING_OVERFLOW_CHECK #define RT_USING_HOOK #define RT_USING_IDLE_HOOK #define RT_IDLE_HOOK_LIST_SIZE 4 #define IDLE_THREAD_STACK_SIZE 4096 +#define SYSTEM_THREAD_STACK_SIZE 4096 /* kservice optimization */ @@ -74,17 +75,17 @@ /* Command shell */ #define RT_USING_FINSH +#define RT_USING_MSH +#define FINSH_USING_MSH #define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 16384 #define FINSH_USING_HISTORY #define FINSH_HISTORY_LINES 5 #define FINSH_USING_SYMTAB -#define FINSH_USING_DESCRIPTION -#define FINSH_THREAD_PRIORITY 20 -#define FINSH_THREAD_STACK_SIZE 16384 #define FINSH_CMD_SIZE 80 -#define FINSH_USING_MSH -#define FINSH_USING_MSH_DEFAULT -#define FINSH_USING_MSH_ONLY +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION #define FINSH_ARG_MAX 10 /* Device virtual file system */ @@ -108,6 +109,7 @@ #define RT_DFS_ELM_DRIVES 2 #define RT_DFS_ELM_MAX_SECTOR_SIZE 4096 #define RT_DFS_ELM_REENTRANT +#define RT_DFS_ELM_MUTEX_TIMEOUT 3000 #define RT_USING_DFS_DEVFS /* Device Drivers */ @@ -118,6 +120,7 @@ #define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 #define RT_SYSTEM_WORKQUEUE_PRIORITY 23 #define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 #define RT_SERIAL_USING_DMA #define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN @@ -163,7 +166,8 @@ #define RT_USING_PTHREADS #define PTHREAD_NUM_MAX 8 #define RT_USING_POSIX -#define RT_LIBC_FIXED_TIMEZONE 8 +#define RT_LIBC_USING_TIME +#define RT_LIBC_DEFAULT_TIMEZONE 8 /* Network */ @@ -245,9 +249,14 @@ /* Board Drivers Config */ #define BSP_USING_UART_HS + +/* General Purpose UARTs */ + #define BSP_USING_UART1 #define BSP_UART1_TXD_PIN 20 #define BSP_UART1_RXD_PIN 21 +#define BSP_UART1_RTS_PIN -1 +#define BSP_UART1_CTS_PIN -1 #define BSP_USING_SPI1 #define BSP_SPI1_CLK_PIN 27 #define BSP_SPI1_D0_PIN 28 @@ -261,6 +270,10 @@ #define BSP_LCD_WR_PIN 39 #define BSP_LCD_DC_PIN 38 #define BSP_LCD_RST_PIN 37 +#define BSP_LCD_BACKLIGHT_PIN -1 +#define BSP_LCD_BACKLIGHT_ACTIVE_LOW +#define BSP_LCD_CLK_FREQ 20000000 +#define BSP_BOARD_USER #define BSP_LCD_X_MAX 240 #define BSP_LCD_Y_MAX 320 #define BSP_USING_SDCARD @@ -276,6 +289,9 @@ #define BSP_DVP_CMOS_XCLK_PIN 46 #define BSP_DVP_CMOS_PCLK_PIN 47 #define BSP_DVP_CMOS_HREF_PIN 45 +#define RW007_SPIDEV_NAME "spi11" +#define RW007_INT_BUSY_PIN 7 +#define RW007_RST_PIN 6 /* Kendryte SDK Config */ @@ -283,6 +299,9 @@ /* More Drivers */ +#define PKG_USING_RW007 +#define RW007_NOT_USE_EXAMPLE_DRIVERS +#define RW007_SPI_MAX_HZ 20000000 #define DRV_USING_OV2640 /* APP_Framework */ @@ -303,23 +322,36 @@ /* knowing app */ +#define APPLICATION_KNOWING #define FACE_DETECT /* sensor app */ +#define APPLICATION_SENSOR +#define APPLICATION_SENSOR_VOICE +#define APPLICATION_SENSOR_VOICE_D124 /* Framework */ #define TRANSFORM_LAYER_ATTRIUBUTE #define ADD_XIUOS_FETURES #define SUPPORT_SENSOR_FRAMEWORK +#define SENSOR_VOICE +#define SENSOR_D124 +#define SENSOR_DEVICE_D124 "d124_1" +#define SENSOR_QUANTITY_D124_VOICE "voice_1" +#define SENSOR_DEVICE_D124_DEV "/dev/uar2" #define SUPPORT_KNOWING_FRAMEWORK #define USING_KPU_POSTPROCESSING #define USING_YOLOV2 -/* app lib */ +/* Security */ + + +/* lib */ #define APP_SELECT_NEWLIB +#define LIB_USING_CJSON #define __STACKSIZE__ 4096 #endif From 43f19c4b55940d83d99246618627e05e92fc6fc7 Mon Sep 17 00:00:00 2001 From: chunyexixiaoyu <834670833@qq.com> Date: Thu, 14 Oct 2021 11:20:06 +0800 Subject: [PATCH 05/11] Ubiquitous/RT_Thread/: add lcd test example update main.c function when it starts. --- .../bsp/k210/applications/lcd_test.c | 100 ++++++++++++++++++ .../RT_Thread/bsp/k210/applications/main.c | 17 ++- .../bsp/k210/applications/ov2640_test.c | 10 +- 3 files changed, 117 insertions(+), 10 deletions(-) create mode 100644 Ubiquitous/RT_Thread/bsp/k210/applications/lcd_test.c diff --git a/Ubiquitous/RT_Thread/bsp/k210/applications/lcd_test.c b/Ubiquitous/RT_Thread/bsp/k210/applications/lcd_test.c new file mode 100644 index 000000000..77afbe215 --- /dev/null +++ b/Ubiquitous/RT_Thread/bsp/k210/applications/lcd_test.c @@ -0,0 +1,100 @@ +#include +#include +#include +#include +#include "drv_lcd.h" + +static void drawarea(rt_device_t dev, struct rt_device_graphic_info *info, + int x, int y, int w, int h, uint16_t c) +{ + struct rt_device_rect_info rect; + uint16_t *fb; + int i, j; + + fb = (uint16_t *)info->framebuffer; + fb += (info->width * y); + fb += x; + + for (j = 0; j < h; j++) + { + for (i = 0; i < w; i++) + { + fb[i] = c; + } + fb += info->width; + } + + rect.x = x; + rect.y = y; + rect.width = w; + rect.height = h; + + rt_device_control(dev, RTGRAPHIC_CTRL_RECT_UPDATE, &rect); +} +#define RGB_BUF_SIZE (320*240*2) +static int showcolor(int argc, char **argv) +{ + unsigned char r = 0, g = 0, b = 0; + char *devname = "lcd"; + rt_device_t dev; + struct rt_device_graphic_info info; + int result; + int x = 0, y = 0; + int i; + uint16_t c; + + for (i = 1; i < argc; i++) + { + switch (i) + { + case 1: + r = atoi(argv[i]); + break; + case 2: + g = atoi(argv[i]); + break; + case 3: + b = atoi(argv[i]); + break; + } + } + + dev = rt_device_find(devname); + if (!dev) + { + rt_kprintf("lcd: %s not found\n", devname); + return -1; + } + + if (rt_device_open(dev, 0) != 0) + { + rt_kprintf("lcd open fail\n"); + return -1; + } + + result = rt_device_control(dev, RTGRAPHIC_CTRL_GET_INFO, &info); + if (result != RT_EOK) + { + rt_kprintf("get device information failed\n"); + return result; + } + + c = (uint16_t)(((r >> 3) << 11) | ((g >> 2) << 6) | ((b >> 3))); + drawarea(dev, &info, x, y, 24, 24, c); + + lcd_set_color(BLACK, BLUE); + lcd_show_string(0, 40, 16, "hello world"); + lcd_show_string(0, 60, 24, "hello world"); + lcd_show_string(0, 90, 32, "hello world"); + lcd_draw_line(0, 200, 319, 200); + lcd_draw_circle(270, 120, 30); + + lcd_set_color(BLACK, RED); + lcd_show_string(0, 130, 32, "after set color"); + lcd_draw_line(0, 0, 319, 239); + lcd_draw_rectangle(50, 10, 170, 145); + lcd_draw_circle(160, 120, 50); + rt_device_close(dev); + return 0; +} +MSH_CMD_EXPORT(showcolor, showcolor R G B-- R / G / B : 0 ~255); diff --git a/Ubiquitous/RT_Thread/bsp/k210/applications/main.c b/Ubiquitous/RT_Thread/bsp/k210/applications/main.c index 45213d732..5b51e4275 100644 --- a/Ubiquitous/RT_Thread/bsp/k210/applications/main.c +++ b/Ubiquitous/RT_Thread/bsp/k210/applications/main.c @@ -1,3 +1,11 @@ +/* + * @Author: your name + * @Date: 2021-10-11 22:04:25 + * @LastEditTime: 2021-10-14 11:12:52 + * @LastEditors: Please set LastEditors + * @Description: In User Settings Edit + * @FilePath: \xiuos\Ubiquitous\RT_Thread\bsp\k210\applications\main.c + */ /* * Copyright (c) 2020 AIIT XUOS Lab * XiUOS is licensed under Mulan PSL v2. @@ -21,14 +29,13 @@ int main(void) rt_thread_mdelay(100); char info1[25] ={0}; char info2[25] ={0}; - sprintf(info1,"xuos-intelligence k210 build "); - sprintf(info2,"%s %s",__DATE__,__TIME__); + sprintf(info1,"xuos-intelligence k210 "); + sprintf(info2,"build %s %s",__DATE__,__TIME__); printf("%s %s \n",info1,info2); #ifdef BSP_USING_LCD #include - lcd_clear(PINK); - lcd_draw_string(70,100,info1,BLACK); - lcd_draw_string(70,120,info2,BLACK); + lcd_show_string(0,60,24,info1); + lcd_show_string(0,90,24,info2); #endif while(1) { diff --git a/Ubiquitous/RT_Thread/bsp/k210/applications/ov2640_test.c b/Ubiquitous/RT_Thread/bsp/k210/applications/ov2640_test.c index b9401ff08..b5027c7e4 100644 --- a/Ubiquitous/RT_Thread/bsp/k210/applications/ov2640_test.c +++ b/Ubiquitous/RT_Thread/bsp/k210/applications/ov2640_test.c @@ -21,10 +21,10 @@ static int g_fd = 0; static _ioctl_shoot_para shoot_para_t = {0}; - +extern void lcd_show_image(int x, int y, int wide, int height,const rt_uint8_t *buf); +extern void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr); void ov2640_test(int argc, char **argv) { - extern void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr); g_fd = open("/dev/ov2640",O_RDONLY); if(g_fd < 0) @@ -71,7 +71,7 @@ void ov2640_test(int argc, char **argv) close(g_fd); return; } - lcd_draw_picture(0, 0, 320, 240, rgbbuffer); + lcd_show_image(0, 0, 320, 240, rgbbuffer); rt_thread_mdelay(100); printf("the lcd has shown the image \n"); rt_free(rgbbuffer); @@ -82,7 +82,6 @@ MSH_CMD_EXPORT(ov2640_test,lcd show camera shot image); void lcd_show_ov2640_thread(uint32_t* rgbbuffer) { - extern void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr); rt_err_t ret = 0; while(1) { @@ -94,8 +93,9 @@ void lcd_show_ov2640_thread(uint32_t* rgbbuffer) rt_free(rgbbuffer); return; } + //lcd_show_image(0, 0, 320, 240, rgbbuffer); lcd_draw_picture(0, 0, 320, 240, rgbbuffer); - rt_thread_mdelay(2); + rt_thread_mdelay(1); } } From bea5eda2e0adbfea8970c3fed45af170587d58f3 Mon Sep 17 00:00:00 2001 From: chunyexixiaoyu <834670833@qq.com> Date: Thu, 14 Oct 2021 11:21:23 +0800 Subject: [PATCH 06/11] APP_Framework/Applications:update face detect and instrusion detect ,the version had been tested for long time,and its's stable. At the same time,rt-thread and kendryte-sdk-source both sub module must be updated. --- .../knowing_app/face_detect/face_detect.c | 34 ++++++++++------- .../knowing_app/instrusion_detect/human.json | 2 +- .../instrusion_detect/instrusion_detect.c | 37 ++++++++++++------- .../transform_layer/rtthread/transform.h | 7 ++++ Ubiquitous/RT_Thread/bsp/k210/rtconfig.h | 2 +- 5 files changed, 52 insertions(+), 30 deletions(-) diff --git a/APP_Framework/Applications/knowing_app/face_detect/face_detect.c b/APP_Framework/Applications/knowing_app/face_detect/face_detect.c index 6eca10910..77e4e3efa 100644 --- a/APP_Framework/Applications/knowing_app/face_detect/face_detect.c +++ b/APP_Framework/Applications/knowing_app/face_detect/face_detect.c @@ -7,7 +7,7 @@ #define STACK_SIZE (128 * 1024) #define JSON_FILE_PATH "/kmodel/detect.json" #define JSON_BUFFER_SIZE (4 * 1024) - +static dmac_channel_number_t dma_ch = DMAC_CHANNEL_MAX; // params from json static float anchor[ANCHOR_NUM * 2] = {}; static int net_output_shape[3] = {}; @@ -184,23 +184,23 @@ void face_detect() } _ioctl_set_dvp_reso set_dvp_reso = {sensor_output_size[1], sensor_output_size[0]}; ioctl(g_fd, IOCTRL_CAMERA_SET_DVP_RESO, &set_dvp_reso); - showbuffer = (unsigned char *)malloc(sensor_output_size[0] * sensor_output_size[1] * 2); + showbuffer = (unsigned char *)rt_malloc_align(sensor_output_size[0] * sensor_output_size[1] * 2,64); if (NULL == showbuffer) { close(g_fd); printf("showbuffer apply memory fail !!"); return; } - kpurgbbuffer = (unsigned char *)malloc(net_input_size[0] * net_input_size[1] * 3); + kpurgbbuffer = (unsigned char *)rt_malloc_align(net_input_size[0] * net_input_size[1] * 3,64); if (NULL == kpurgbbuffer) { close(g_fd); - free(showbuffer); + rt_free_align(showbuffer); printf("kpurgbbuffer apply memory fail !!"); return; } model_data = (unsigned char *)malloc(kmodel_size + 255); if (NULL == model_data) { - free(showbuffer); - free(kpurgbbuffer); + rt_free_align(showbuffer); + rt_free_align(kpurgbbuffer); close(g_fd); printf("model_data apply memory fail !!"); return; @@ -296,27 +296,33 @@ static void *thread_face_detcet_entry(void *parameter) pthread_exit(NULL); return NULL; } + if (dmalock_sync_take(&dma_ch, 2000)) + { + printf("Fail to take DMA channel"); + } kpu_run_kmodel(&face_detect_task, kpurgbbuffer, DMAC_CHANNEL5, ai_done, NULL); while (!g_ai_done_flag) ; + dmalock_release(dma_ch); float *output; size_t output_size; kpu_get_output(&face_detect_task, 0, (uint8_t **)&output, &output_size); face_detect_rl.input = output; region_layer_run(&face_detect_rl, &face_detect_info); /* display result */ -#ifdef BSP_USING_LCD + for (int face_cnt = 0; face_cnt < face_detect_info.obj_number; face_cnt++) { draw_edge((uint32_t *)showbuffer, &face_detect_info, face_cnt, 0xF800, (uint16_t)sensor_output_size[1], (uint16_t)sensor_output_size[0]); - printf("%d: (%d, %d, %d, %d) cls: %s conf: %f\t", face_cnt, face_detect_info.obj[face_cnt].x1, - face_detect_info.obj[face_cnt].y1, face_detect_info.obj[face_cnt].x2, face_detect_info.obj[face_cnt].y2, - labels[face_detect_info.obj[face_cnt].class_id], face_detect_info.obj[face_cnt].prob); - } - if (0 != face_detect_info.obj_number) printf("\n"); - lcd_draw_picture(0, 0, (uint16_t)sensor_output_size[1], (uint16_t)sensor_output_size[0], (unsigned int *)showbuffer); + // printf("%d: (%d, %d, %d, %d) cls: %s conf: %f\t", face_cnt, face_detect_info.obj[face_cnt].x1, + // face_detect_info.obj[face_cnt].y1, face_detect_info.obj[face_cnt].x2, face_detect_info.obj[face_cnt].y2, + // labels[face_detect_info.obj[face_cnt].class_id], face_detect_info.obj[face_cnt].prob); + } +#ifdef BSP_USING_LCD + lcd_draw_picture(0, 0, (uint16_t)sensor_output_size[1], (uint16_t)sensor_output_size[0], (uint32_t *)showbuffer); + //lcd_show_image(0, 0, (uint16_t)sensor_output_size[1], (uint16_t)sensor_output_size[0], (unsigned int *)showbuffer); #endif - usleep(1); + usleep(500); if (1 == if_exit) { if_exit = 0; printf("thread_face_detcet_entry exit"); diff --git a/APP_Framework/Applications/knowing_app/instrusion_detect/human.json b/APP_Framework/Applications/knowing_app/instrusion_detect/human.json index 9ef268f5a..feab75aeb 100644 --- a/APP_Framework/Applications/knowing_app/instrusion_detect/human.json +++ b/APP_Framework/Applications/knowing_app/instrusion_detect/human.json @@ -27,7 +27,7 @@ "kmodel_path": "/kmodel/human.kmodel", "kmodel_size": 2713236, "obj_thresh": [ - 0.55 + 0.7 ], "labels": [ "human" diff --git a/APP_Framework/Applications/knowing_app/instrusion_detect/instrusion_detect.c b/APP_Framework/Applications/knowing_app/instrusion_detect/instrusion_detect.c index 5683ec02d..0a48a1841 100644 --- a/APP_Framework/Applications/knowing_app/instrusion_detect/instrusion_detect.c +++ b/APP_Framework/Applications/knowing_app/instrusion_detect/instrusion_detect.c @@ -1,4 +1,5 @@ #include +#include #ifdef LIB_USING_CJSON #include #endif @@ -7,7 +8,9 @@ #define STACK_SIZE (128 * 1024) #define JSON_FILE_PATH "/kmodel/human.json" #define JSON_BUFFER_SIZE (4 * 1024) +static dmac_channel_number_t dma_ch = DMAC_CHANNEL_MAX; +extern void lcd_show_image(int x, int y, int wide, int height,const rt_uint8_t *buf); // params from json static float anchor[ANCHOR_NUM * 2] = {}; static int net_output_shape[3] = {}; @@ -184,23 +187,23 @@ void instrusion_detect() } _ioctl_set_dvp_reso set_dvp_reso = {sensor_output_size[1], sensor_output_size[0]}; ioctl(g_fd, IOCTRL_CAMERA_SET_DVP_RESO, &set_dvp_reso); - showbuffer = (unsigned char *)malloc(sensor_output_size[0] * sensor_output_size[1] * 2); + showbuffer = (unsigned char *)rt_malloc_align(sensor_output_size[0] * sensor_output_size[1] * 2,64); if (NULL == showbuffer) { close(g_fd); printf("showbuffer apply memory fail !!"); return; } - kpurgbbuffer = (unsigned char *)malloc(net_input_size[0] * net_input_size[1] * 3); + kpurgbbuffer = (unsigned char *)rt_malloc_align(net_input_size[0] * net_input_size[1] * 3,64); if (NULL == kpurgbbuffer) { close(g_fd); - free(showbuffer); + rt_free_align(showbuffer); printf("kpurgbbuffer apply memory fail !!"); return; } model_data = (unsigned char *)malloc(kmodel_size + 255); if (NULL == model_data) { - free(showbuffer); - free(kpurgbbuffer); + rt_free_align(showbuffer); + rt_free_align(kpurgbbuffer); close(g_fd); printf("model_data apply memory fail !!"); return; @@ -281,10 +284,12 @@ void instrusion_detect() #ifdef __RT_THREAD_H__ MSH_CMD_EXPORT(instrusion_detect, instrusion detect task); #endif + extern void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t * ptr); + extern void lcd_show_image(int x, int y, int wide, int height,const rt_uint8_t *buf); + extern void lcd_draw_16_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t * ptr); static void *thread_instrusion_detect_entry(void *parameter) { - extern void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t * ptr); printf("thread_instrusion_detect_entry start!\n"); int ret = 0; // sysctl_enable_irq(); @@ -299,31 +304,35 @@ static void *thread_instrusion_detect_entry(void *parameter) pthread_exit(NULL); return NULL; } + if (dmalock_sync_take(&dma_ch, 2000)) + { + printf("Fail to take DMA channel"); + } kpu_run_kmodel(&instrusion_detect_task, kpurgbbuffer, DMAC_CHANNEL5, ai_done, NULL); while (!g_ai_done_flag) ; + dmalock_release(dma_ch); float *output; size_t output_size; kpu_get_output(&instrusion_detect_task, 0, (uint8_t **)&output, &output_size); instrusion_detect_rl.input = output; region_layer_run(&instrusion_detect_rl, &instrusion_detect_info); /* display result */ - - for (int instrusion_cnt = 0; instrusion_cnt < instrusion_detect_info.obj_number; instrusion_cnt++) { - // draw_edge((uint32_t *)showbuffer, &instrusion_detect_info, instrusion_cnt, 0xF800, - // (uint16_t)sensor_output_size[1], - // (uint16_t)sensor_output_size[0]); + for (int instrusion_cnt = 0; instrusion_cnt < instrusion_detect_info.obj_number; instrusion_cnt++) + { + draw_edge((uint32_t *)showbuffer, &instrusion_detect_info, instrusion_cnt, 0xF800,(uint16_t)sensor_output_size[1],(uint16_t)sensor_output_size[0]); printf("%d: (%d, %d, %d, %d) cls: %s conf: %f\t", instrusion_cnt, instrusion_detect_info.obj[instrusion_cnt].x1, instrusion_detect_info.obj[instrusion_cnt].y1, instrusion_detect_info.obj[instrusion_cnt].x2, instrusion_detect_info.obj[instrusion_cnt].y2, labels[instrusion_detect_info.obj[instrusion_cnt].class_id], instrusion_detect_info.obj[instrusion_cnt].prob); } +#ifdef BSP_USING_LCD + //lcd_show_image(0, 0,(uint16_t)sensor_output_size[1], (uint16_t)sensor_output_size[0],(unsigned int *)showbuffer); + lcd_draw_picture(0, 0, (uint16_t)sensor_output_size[1], (uint16_t)sensor_output_size[0], (uint32_t *)showbuffer); +#endif if (0 != instrusion_detect_info.obj_number) { printf("\n"); } -#ifdef BSP_USING_LCD - lcd_draw_picture(0, 0, (uint16_t)sensor_output_size[1], (uint16_t)sensor_output_size[0], (unsigned int *)showbuffer); -#endif usleep(1); if (1 == if_exit) { if_exit = 0; diff --git a/APP_Framework/Framework/transform_layer/rtthread/transform.h b/APP_Framework/Framework/transform_layer/rtthread/transform.h index 7fa00bcbe..a6db34732 100644 --- a/APP_Framework/Framework/transform_layer/rtthread/transform.h +++ b/APP_Framework/Framework/transform_layer/rtthread/transform.h @@ -37,6 +37,7 @@ #include #include #include +#include #ifdef RT_USING_POSIX_TERMIOS #include #endif @@ -50,6 +51,12 @@ #include #include #endif /* RT_USING_SAL */ +#ifdef BOARD_K210_EVB +#include +#include +#endif + + #ifdef __cplusplus extern "C" { #endif diff --git a/Ubiquitous/RT_Thread/bsp/k210/rtconfig.h b/Ubiquitous/RT_Thread/bsp/k210/rtconfig.h index fb106bb78..c0c6bb3cf 100644 --- a/Ubiquitous/RT_Thread/bsp/k210/rtconfig.h +++ b/Ubiquitous/RT_Thread/bsp/k210/rtconfig.h @@ -18,7 +18,7 @@ #define RT_ALIGN_SIZE 8 #define RT_THREAD_PRIORITY_32 #define RT_THREAD_PRIORITY_MAX 32 -#define RT_TICK_PER_SECOND 80 +#define RT_TICK_PER_SECOND 100 #define RT_USING_OVERFLOW_CHECK #define RT_USING_HOOK #define RT_USING_IDLE_HOOK From 8aac82b1b4120c7578fe30dc7a605e2962383a50 Mon Sep 17 00:00:00 2001 From: Liu_Weichao Date: Thu, 14 Oct 2021 17:25:04 +0800 Subject: [PATCH 07/11] support adapter_4G send and receive data function --- .../Framework/connection/4G/adapter_4G.c | 21 ++-- .../Framework/connection/adapter_agent.c | 110 +++++++++--------- APP_Framework/Framework/connection/at_agent.h | 1 + 3 files changed, 69 insertions(+), 63 deletions(-) diff --git a/APP_Framework/Framework/connection/4G/adapter_4G.c b/APP_Framework/Framework/connection/4G/adapter_4G.c index cb81c65fb..00bf150db 100644 --- a/APP_Framework/Framework/connection/4G/adapter_4G.c +++ b/APP_Framework/Framework/connection/4G/adapter_4G.c @@ -84,16 +84,16 @@ int Adapter4GInit(void) /******************4G TEST*********************/ int Adapter4GTest(void) { - const char *send_msg = "SendHeart"; - char recv_msg[128]; + const char *send_msg = "Adapter_4G Test"; + char recv_msg[256] = {0}; int baud_rate = BAUD_RATE_115200; struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_4G_NAME); #ifdef ADAPTER_EC200T - //Using DSD server to test 4G Socket connection - uint8 server_addr[64] = "115.238.53.61"; - uint8 server_port[64] = "33333"; + //Using Hang Xiao server to test 4G Socket connection + uint8 server_addr[64] = "101.68.82.219"; + uint8 server_port[64] = "9898"; adapter->socket.socket_id = 0; @@ -102,11 +102,12 @@ int Adapter4GTest(void) AdapterDeviceConnect(adapter, CLIENT, server_addr, server_port, IPV4); - // while (1) { - // AdapterDeviceSend(adapter, send_msg, strlen(send_msg)); - // AdapterDeviceRecv(adapter, recv_msg, 128); - // printf("4G recv msg %s\n", recv_msg); - // } + while (1) { + AdapterDeviceSend(adapter, send_msg, strlen(send_msg)); + AdapterDeviceRecv(adapter, recv_msg, 256); + printf("4G recv msg %s\n", recv_msg); + memset(recv_msg, 0, 256); + } #endif return 0; diff --git a/APP_Framework/Framework/connection/adapter_agent.c b/APP_Framework/Framework/connection/adapter_agent.c index 5a87b7ca6..401dec9a2 100755 --- a/APP_Framework/Framework/connection/adapter_agent.c +++ b/APP_Framework/Framework/connection/adapter_agent.c @@ -45,9 +45,9 @@ unsigned int IpTint(char *ipstr) token = strtok(ipstr, "."); - while (token != NULL){ + while (token != NULL) { cur = atoi(token); - if (cur >= 0 && cur <= 255){ + if (cur >= 0 && cur <= 255) { total += cur * pow(256, i); } i--; @@ -61,8 +61,8 @@ void SwapStr(char *str, int begin, int end) { int i, j; - for (i = begin, j = end; i <= j; i++, j--){ - if (str[i] != str[j]){ + for (i = begin, j = end; i <= j; i++, j--) { + if (str[i] != str[j]) { str[i] = str[i] ^ str[j]; str[j] = str[i] ^ str[j]; str[i] = str[i] ^ str[j]; @@ -79,7 +79,7 @@ char *IpTstr(unsigned int ipint) char token[4]; int bt, ed, len, cur; - while (ipint){ + while (ipint) { cur = ipint % 256; sprintf(token, "%d", cur); strcat(new, token); @@ -91,8 +91,8 @@ char *IpTstr(unsigned int ipint) len = strlen(new); SwapStr(new, 0, len - 1); - for (bt = ed = 0; ed < len;){ - while (ed < len && new[ed] != '.'){ + for (bt = ed = 0; ed < len;) { + while (ed < len && new[ed] != '.') { ed++; } SwapStr(new, bt, ed - 1); @@ -126,7 +126,7 @@ uint32 ATSprintf(int fd, const char *format, va_list params) int ATOrderSend(ATAgentType agent, uint32 timeout_s, ATReplyType reply, const char *cmd_expr, ...) { - if (agent == NULL){ + if (agent == NULL) { printf("ATAgent is null"); return -ERROR; } @@ -151,16 +151,16 @@ int ATOrderSend(ATAgentType agent, uint32 timeout_s, ATReplyType reply, const ch agent->reply = reply; - if(agent->reply != NULL){ + if(agent->reply != NULL) { reply->reply_len = 0; va_start(params, cmd_expr); ATSprintf(agent->fd, cmd_expr, params); va_end(params); - if (PrivSemaphoreObtainWait(&agent->rsp_sem, &abstime) != EOK){ + if (PrivSemaphoreObtainWait(&agent->rsp_sem, &abstime) != EOK) { result = -ETIMEOUT; goto __out; } - }else{ + } else { va_start(params, cmd_expr); ATSprintf(agent->fd, cmd_expr, params); va_end(params); @@ -170,7 +170,7 @@ int ATOrderSend(ATAgentType agent, uint32 timeout_s, ATReplyType reply, const ch __out: agent->reply = NULL; PrivMutexAbandon(&agent->lock); - agent->receive_mode = ENTM_MODE; + agent->receive_mode = DEFAULT_MODE; return result; } @@ -275,21 +275,25 @@ int EntmRecv(ATAgentType agent, char *rev_buffer, int buffer_len, int timeout_s) PrivTaskDelay(1000); + if (PrivSemaphoreObtainWait(&agent->entm_rx_notice, &abstime)) { + return -ERROR; + } + + PrivMutexObtain(&agent->lock); + + if (buffer_len < agent->entm_recv_len) { + return -ERROR; + } + + printf("EntmRecv once len %u.\n", agent->entm_recv_len); + + agent->entm_recv_buf[agent->entm_recv_len - 1] = '\0'; + memcpy(rev_buffer, agent->entm_recv_buf, agent->entm_recv_len - 2); + memset(agent->entm_recv_buf, 0, ENTM_RECV_MAX); agent->entm_recv_len = 0; - if (PrivSemaphoreObtainWait(&agent->entm_rx_notice, &abstime)){ - return -ERROR; - } - - if (buffer_len < agent->entm_recv_len){ - return -ERROR; - } - - printf("EntmRecv once .\n"); - - agent->entm_recv_buf[agent->entm_recv_len - 2] = '\0'; - memcpy(rev_buffer, agent->entm_recv_buf, agent->entm_recv_len - 2); + PrivMutexAbandon(&agent->lock); return EOK; } @@ -303,32 +307,34 @@ static int GetCompleteATReply(ATAgentType agent) memset(agent->maintain_buffer, 0x00, agent->maintain_max); agent->maintain_len = 0; - while (1){ + while (1) { PrivRead(agent->fd, &ch, 1); printf(" %c (0x%x)\n", ch, ch); if (agent->receive_mode == ENTM_MODE){ - if (agent->entm_recv_len < ENTM_RECV_MAX){ + if (agent->entm_recv_len < ENTM_RECV_MAX) { + PrivMutexObtain(&agent->lock); + agent->entm_recv_buf[agent->entm_recv_len] = ch; agent->entm_recv_len++; + PrivMutexAbandon(&agent->lock); + if (last_ch == '!' && ch == '@'){ PrivSemaphoreAbandon(&agent->entm_rx_notice); } last_ch = ch; - } - else{ + } else { printf("entm_recv_buf is_full ...\n"); } - } - else if (agent->receive_mode == AT_MODE){ + } else if (agent->receive_mode == AT_MODE) { if (read_len < agent->maintain_max){ agent->maintain_buffer[read_len] = ch; read_len++; agent->maintain_len = read_len; - }else{ + } else { printf("maintain_len is_full ...\n"); is_full = true; } @@ -356,8 +362,8 @@ static int GetCompleteATReply(ATAgentType agent) ATAgentType GetATAgent(const char *agent_name) { struct ATAgent* result = NULL; - for (int i = 0; i < AT_AGENT_MAX; i++){ - if (strcmp(at_agent_table[i].agent_name, agent_name) == 0){ + for (int i = 0; i < AT_AGENT_MAX; i++) { + if (strcmp(at_agent_table[i].agent_name, agent_name) == 0) { result = &at_agent_table[i]; } } @@ -368,23 +374,23 @@ ATAgentType GetATAgent(const char *agent_name) static int DeleteATAgent(ATAgentType agent) { - if (agent->lock){ + if (agent->lock) { PrivMutexDelete(&agent->lock); } - if (agent->entm_rx_notice){ + if (agent->entm_rx_notice) { PrivSemaphoreDelete(&agent->entm_rx_notice); } - if (agent->fd > 0){ + if (agent->fd > 0) { PrivClose(agent->fd); } - if (agent->rsp_sem){ + if (agent->rsp_sem) { PrivSemaphoreDelete(&agent->rsp_sem); } - if (agent->maintain_buffer){ + if (agent->maintain_buffer) { PrivFree(agent->maintain_buffer); } @@ -396,19 +402,18 @@ static void *ATAgentReceiveProcess(void *param) ATAgentType agent = (ATAgentType)param; const struct at_urc *urc; - while (1){ - if (GetCompleteATReply(agent) > 0){ + while (1) { + if (GetCompleteATReply(agent) > 0) { if (agent->reply != NULL){ ATReplyType reply = agent->reply; agent->maintain_buffer[agent->maintain_len] = '\0'; - if (agent->maintain_len < reply->reply_max_len){ + if (agent->maintain_len < reply->reply_max_len) { memcpy(reply->reply_buffer, agent->maintain_buffer, agent->maintain_len); reply->reply_len = agent->maintain_len; - } - else{ + } else { printf("out of memory (%d)!", reply->reply_max_len); } @@ -427,7 +432,7 @@ static int ATAgentInit(ATAgentType agent) agent->maintain_len = 0; agent->maintain_buffer = (char *)PrivMalloc(agent->maintain_max); - if (agent->maintain_buffer == NONE){ + if (agent->maintain_buffer == NONE) { printf("ATAgentInit malloc maintain_buffer error\n"); goto __out; } @@ -435,13 +440,13 @@ static int ATAgentInit(ATAgentType agent) memset(agent->maintain_buffer, 0, agent->maintain_max); result = PrivSemaphoreCreate(&agent->entm_rx_notice, 0, 0); - if (result < 0){ + if (result < 0) { printf("ATAgentInit create entm sem error\n"); goto __out; } result = PrivSemaphoreCreate(&agent->rsp_sem, 0, 0); - if (result < 0){ + if (result < 0) { printf("ATAgentInit create rsp sem error\n"); goto __out; } @@ -498,8 +503,7 @@ int InitATAgent(const char *agent_name, int agent_fd, uint32 maintain_max) agent->maintain_max = maintain_max; result = ATAgentInit(agent); - if (result == EOK) - { + if (result == EOK) { PrivTaskStartup(&agent->at_handler); } @@ -511,7 +515,7 @@ ATReplyType CreateATReply(uint32 reply_max_len) ATReplyType reply = NULL; reply = (ATReplyType)PrivMalloc(sizeof(struct ATReply)); - if (reply == NULL){ + if (reply == NULL) { printf("no more memory\n"); return NULL; } @@ -519,7 +523,7 @@ ATReplyType CreateATReply(uint32 reply_max_len) reply->reply_max_len = reply_max_len; reply->reply_buffer = (char *)PrivMalloc(reply_max_len); - if (reply->reply_buffer == NULL){ + if (reply->reply_buffer == NULL) { printf("no more memory\n"); PrivFree(reply); return NULL; @@ -532,14 +536,14 @@ ATReplyType CreateATReply(uint32 reply_max_len) void DeleteATReply(ATReplyType reply) { - if (reply){ - if (reply->reply_buffer){ + if (reply) { + if (reply->reply_buffer) { PrivFree(reply->reply_buffer); reply->reply_buffer = NULL; } } - if (reply){ + if (reply) { PrivFree(reply); reply = NULL; } diff --git a/APP_Framework/Framework/connection/at_agent.h b/APP_Framework/Framework/connection/at_agent.h index 527de572a..4f690f50c 100755 --- a/APP_Framework/Framework/connection/at_agent.h +++ b/APP_Framework/Framework/connection/at_agent.h @@ -30,6 +30,7 @@ enum ReceiveMode { + DEFAULT_MODE = 0, ENTM_MODE = 1, AT_MODE = 2, }; From 8f6cac9797ffe91c1497f2f85d8a9ebf8ca233fb Mon Sep 17 00:00:00 2001 From: Liu_Weichao Date: Fri, 15 Oct 2021 10:12:19 +0800 Subject: [PATCH 08/11] fix adapter_bluetooth test function bugs --- .../Framework/connection/bluetooth/adapter_bluetooth.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/APP_Framework/Framework/connection/bluetooth/adapter_bluetooth.c b/APP_Framework/Framework/connection/bluetooth/adapter_bluetooth.c index f75bd3773..0f855a4ae 100644 --- a/APP_Framework/Framework/connection/bluetooth/adapter_bluetooth.c +++ b/APP_Framework/Framework/connection/bluetooth/adapter_bluetooth.c @@ -85,7 +85,6 @@ int AdapterBlueToothTest(void) { const char *bluetooth_msg = "BT Adapter Test"; char bluetooth_recv_msg[128]; - char recv_msg[128]; int len; int baud_rate = BAUD_RATE_115200; @@ -103,6 +102,7 @@ int AdapterBlueToothTest(void) AdapterDeviceSend(adapter, bluetooth_msg, len); printf("send %s after recv\n", bluetooth_msg); PrivTaskDelay(100); + memset(bluetooth_recv_msg, 0, 128); } #endif From 06c9c6ecc4967ffa32bb2d8a7da39585e72e03e8 Mon Sep 17 00:00:00 2001 From: Liu_Weichao Date: Fri, 15 Oct 2021 11:05:36 +0800 Subject: [PATCH 09/11] refactor connection directory to follow code standards --- APP_Framework/Framework/connection/{4G => 4g}/Kconfig | 2 +- APP_Framework/Framework/connection/{4G => 4g}/Makefile | 4 ++-- .../connection/{4G/adapter_4G.c => 4g/adapter_4g.c} | 0 .../Framework/connection/{4G/EC200T => 4g/ec200t}/Kconfig | 0 .../Framework/connection/{4G/EC200T => 4g/ec200t}/Makefile | 0 .../Framework/connection/{4G/EC200T => 4g/ec200t}/ec200t.c | 0 APP_Framework/Framework/connection/{5G => 5g}/Kconfig | 0 .../Framework/connection/{wifi/HFA21 => 5g}/Makefile | 2 +- .../connection/{5G/adapter_5G.c => 5g/adapter_5g.c} | 2 +- APP_Framework/Framework/connection/Kconfig | 4 ++-- APP_Framework/Framework/connection/Makefile | 4 ++-- APP_Framework/Framework/connection/bluetooth/Kconfig | 2 +- APP_Framework/Framework/connection/bluetooth/Makefile | 2 +- .../Framework/connection/bluetooth/{HC08 => hc08}/Kconfig | 0 .../Framework/connection/bluetooth/{HC08 => hc08}/Makefile | 0 .../Framework/connection/bluetooth/{HC08 => hc08}/hc08.c | 0 .../Framework/connection/lora/{SX1278 => sx1278}/Kconfig | 0 .../Framework/connection/lora/{SX1278 => sx1278}/Makefile | 0 .../Framework/connection/lora/{SX1278 => sx1278}/sx1278.c | 0 .../Framework/connection/nbiot/{BC28 => bc28}/Kconfig | 0 .../Framework/connection/nbiot/{BC28 => bc28}/Makefile | 0 .../Framework/connection/nbiot/{BC28 => bc28}/bc28.c | 0 APP_Framework/Framework/connection/wifi/Kconfig | 6 +++--- APP_Framework/Framework/connection/wifi/Makefile | 4 ++-- APP_Framework/Framework/connection/wifi/adapter_wifi.c | 4 ++-- .../Framework/connection/wifi/{HFA21 => hfa21_wifi}/Kconfig | 4 ++-- .../Framework/connection/{5G => wifi/hfa21_wifi}/Makefile | 2 +- .../wifi/{HFA21/hfa21.c => hfa21_wifi/hfa21_wifi.c} | 0 APP_Framework/Framework/connection/zigbee/Kconfig | 2 +- APP_Framework/Framework/connection/zigbee/Makefile | 2 +- .../Framework/connection/zigbee/{E18 => e18}/Kconfig | 0 .../Framework/connection/zigbee/{E18 => e18}/Makefile | 0 .../Framework/connection/zigbee/{E18 => e18}/e18.c | 0 .../Framework/connection/zigbee/{E18 => e18}/e18.h | 0 34 files changed, 23 insertions(+), 23 deletions(-) rename APP_Framework/Framework/connection/{4G => 4g}/Kconfig (67%) rename APP_Framework/Framework/connection/{4G => 4g}/Makefile (62%) rename APP_Framework/Framework/connection/{4G/adapter_4G.c => 4g/adapter_4g.c} (100%) rename APP_Framework/Framework/connection/{4G/EC200T => 4g/ec200t}/Kconfig (100%) rename APP_Framework/Framework/connection/{4G/EC200T => 4g/ec200t}/Makefile (100%) rename APP_Framework/Framework/connection/{4G/EC200T => 4g/ec200t}/ec200t.c (100%) rename APP_Framework/Framework/connection/{5G => 5g}/Kconfig (100%) rename APP_Framework/Framework/connection/{wifi/HFA21 => 5g}/Makefile (58%) mode change 100755 => 100644 rename APP_Framework/Framework/connection/{5G/adapter_5G.c => 5g/adapter_5g.c} (96%) rename APP_Framework/Framework/connection/bluetooth/{HC08 => hc08}/Kconfig (100%) rename APP_Framework/Framework/connection/bluetooth/{HC08 => hc08}/Makefile (100%) rename APP_Framework/Framework/connection/bluetooth/{HC08 => hc08}/hc08.c (100%) rename APP_Framework/Framework/connection/lora/{SX1278 => sx1278}/Kconfig (100%) rename APP_Framework/Framework/connection/lora/{SX1278 => sx1278}/Makefile (100%) rename APP_Framework/Framework/connection/lora/{SX1278 => sx1278}/sx1278.c (100%) rename APP_Framework/Framework/connection/nbiot/{BC28 => bc28}/Kconfig (100%) rename APP_Framework/Framework/connection/nbiot/{BC28 => bc28}/Makefile (100%) rename APP_Framework/Framework/connection/nbiot/{BC28 => bc28}/bc28.c (100%) rename APP_Framework/Framework/connection/wifi/{HFA21 => hfa21_wifi}/Kconfig (92%) rename APP_Framework/Framework/connection/{5G => wifi/hfa21_wifi}/Makefile (58%) mode change 100644 => 100755 rename APP_Framework/Framework/connection/wifi/{HFA21/hfa21.c => hfa21_wifi/hfa21_wifi.c} (100%) rename APP_Framework/Framework/connection/zigbee/{E18 => e18}/Kconfig (100%) rename APP_Framework/Framework/connection/zigbee/{E18 => e18}/Makefile (100%) rename APP_Framework/Framework/connection/zigbee/{E18 => e18}/e18.c (100%) rename APP_Framework/Framework/connection/zigbee/{E18 => e18}/e18.h (100%) diff --git a/APP_Framework/Framework/connection/4G/Kconfig b/APP_Framework/Framework/connection/4g/Kconfig similarity index 67% rename from APP_Framework/Framework/connection/4G/Kconfig rename to APP_Framework/Framework/connection/4g/Kconfig index 950529421..17e05a974 100644 --- a/APP_Framework/Framework/connection/4G/Kconfig +++ b/APP_Framework/Framework/connection/4g/Kconfig @@ -3,6 +3,6 @@ config ADAPTER_EC200T default y if ADAPTER_EC200T - source "$APP_DIR/Framework/connection/4G/EC200T/Kconfig" + source "$APP_DIR/Framework/connection/4g/ec200t/Kconfig" endif diff --git a/APP_Framework/Framework/connection/4G/Makefile b/APP_Framework/Framework/connection/4g/Makefile similarity index 62% rename from APP_Framework/Framework/connection/4G/Makefile rename to APP_Framework/Framework/connection/4g/Makefile index 1ef3b9279..436b7d97f 100644 --- a/APP_Framework/Framework/connection/4G/Makefile +++ b/APP_Framework/Framework/connection/4g/Makefile @@ -1,7 +1,7 @@ -SRC_FILES := adapter_4G.c +SRC_FILES := adapter_4g.c ifeq ($(CONFIG_ADAPTER_EC200T),y) - SRC_DIR += EC200T + SRC_DIR += ec200t endif include $(KERNEL_ROOT)/compiler.mk \ No newline at end of file diff --git a/APP_Framework/Framework/connection/4G/adapter_4G.c b/APP_Framework/Framework/connection/4g/adapter_4g.c similarity index 100% rename from APP_Framework/Framework/connection/4G/adapter_4G.c rename to APP_Framework/Framework/connection/4g/adapter_4g.c diff --git a/APP_Framework/Framework/connection/4G/EC200T/Kconfig b/APP_Framework/Framework/connection/4g/ec200t/Kconfig similarity index 100% rename from APP_Framework/Framework/connection/4G/EC200T/Kconfig rename to APP_Framework/Framework/connection/4g/ec200t/Kconfig diff --git a/APP_Framework/Framework/connection/4G/EC200T/Makefile b/APP_Framework/Framework/connection/4g/ec200t/Makefile similarity index 100% rename from APP_Framework/Framework/connection/4G/EC200T/Makefile rename to APP_Framework/Framework/connection/4g/ec200t/Makefile diff --git a/APP_Framework/Framework/connection/4G/EC200T/ec200t.c b/APP_Framework/Framework/connection/4g/ec200t/ec200t.c similarity index 100% rename from APP_Framework/Framework/connection/4G/EC200T/ec200t.c rename to APP_Framework/Framework/connection/4g/ec200t/ec200t.c diff --git a/APP_Framework/Framework/connection/5G/Kconfig b/APP_Framework/Framework/connection/5g/Kconfig similarity index 100% rename from APP_Framework/Framework/connection/5G/Kconfig rename to APP_Framework/Framework/connection/5g/Kconfig diff --git a/APP_Framework/Framework/connection/wifi/HFA21/Makefile b/APP_Framework/Framework/connection/5g/Makefile old mode 100755 new mode 100644 similarity index 58% rename from APP_Framework/Framework/connection/wifi/HFA21/Makefile rename to APP_Framework/Framework/connection/5g/Makefile index a5c95324b..5b98645c0 --- a/APP_Framework/Framework/connection/wifi/HFA21/Makefile +++ b/APP_Framework/Framework/connection/5g/Makefile @@ -1,3 +1,3 @@ -SRC_FILES := hfa21.c +SRC_FILES := adapter_5g.c include $(KERNEL_ROOT)/compiler.mk diff --git a/APP_Framework/Framework/connection/5G/adapter_5G.c b/APP_Framework/Framework/connection/5g/adapter_5g.c similarity index 96% rename from APP_Framework/Framework/connection/5G/adapter_5G.c rename to APP_Framework/Framework/connection/5g/adapter_5g.c index ff5ff1943..27485e108 100644 --- a/APP_Framework/Framework/connection/5G/adapter_5G.c +++ b/APP_Framework/Framework/connection/5g/adapter_5g.c @@ -11,7 +11,7 @@ */ /** - * @file adapter_5G.c + * @file adapter_5g.c * @brief Implement the connection 5G adapter function * @version 1.1 * @author AIIT XUOS Lab diff --git a/APP_Framework/Framework/connection/Kconfig b/APP_Framework/Framework/connection/Kconfig index bd062e6f4..a2ef6e64e 100644 --- a/APP_Framework/Framework/connection/Kconfig +++ b/APP_Framework/Framework/connection/Kconfig @@ -18,7 +18,7 @@ if SUPPORT_CONNECTION_FRAMEWORK bool "Using 4G adapter device" default n if CONNECTION_ADAPTER_4G - source "$APP_DIR/Framework/connection/4G/Kconfig" + source "$APP_DIR/Framework/connection/4g/Kconfig" endif menuconfig CONNECTION_ADAPTER_NB @@ -60,6 +60,6 @@ if SUPPORT_CONNECTION_FRAMEWORK bool "Using 5G adapter device" default n if CONNECTION_ADAPTER_5G - source "$APP_DIR/Framework/connection/5G/Kconfig" + source "$APP_DIR/Framework/connection/5g/Kconfig" endif endif diff --git a/APP_Framework/Framework/connection/Makefile b/APP_Framework/Framework/connection/Makefile index 328455fd7..54ebc25ba 100644 --- a/APP_Framework/Framework/connection/Makefile +++ b/APP_Framework/Framework/connection/Makefile @@ -5,7 +5,7 @@ ifeq ($(CONFIG_CONNECTION_ADAPTER_LORA),y) endif ifeq ($(CONFIG_CONNECTION_ADAPTER_4G),y) - SRC_DIR += 4G + SRC_DIR += 4g endif ifeq ($(CONFIG_CONNECTION_ADAPTER_NB),y) @@ -29,7 +29,7 @@ ifeq ($(CONFIG_CONNECTION_ADAPTER_ZIGBEE),y) endif ifeq ($(CONFIG_CONNECTION_ADAPTER_5G),y) - SRC_DIR += 5G + SRC_DIR += 5g endif include $(KERNEL_ROOT)/compiler.mk \ No newline at end of file diff --git a/APP_Framework/Framework/connection/bluetooth/Kconfig b/APP_Framework/Framework/connection/bluetooth/Kconfig index c2daecdae..cb71df572 100644 --- a/APP_Framework/Framework/connection/bluetooth/Kconfig +++ b/APP_Framework/Framework/connection/bluetooth/Kconfig @@ -3,5 +3,5 @@ config ADAPTER_HC08 default y if ADAPTER_HC08 - source "$APP_DIR/Framework/connection/bluetooth/HC08/Kconfig" + source "$APP_DIR/Framework/connection/bluetooth/hc08/Kconfig" endif diff --git a/APP_Framework/Framework/connection/bluetooth/Makefile b/APP_Framework/Framework/connection/bluetooth/Makefile index 29ef7fc31..bb367019f 100644 --- a/APP_Framework/Framework/connection/bluetooth/Makefile +++ b/APP_Framework/Framework/connection/bluetooth/Makefile @@ -1,7 +1,7 @@ SRC_FILES := adapter_bluetooth.c ifeq ($(CONFIG_ADAPTER_HC08),y) - SRC_DIR += HC08 + SRC_DIR += hc08 endif include $(KERNEL_ROOT)/compiler.mk diff --git a/APP_Framework/Framework/connection/bluetooth/HC08/Kconfig b/APP_Framework/Framework/connection/bluetooth/hc08/Kconfig similarity index 100% rename from APP_Framework/Framework/connection/bluetooth/HC08/Kconfig rename to APP_Framework/Framework/connection/bluetooth/hc08/Kconfig diff --git a/APP_Framework/Framework/connection/bluetooth/HC08/Makefile b/APP_Framework/Framework/connection/bluetooth/hc08/Makefile similarity index 100% rename from APP_Framework/Framework/connection/bluetooth/HC08/Makefile rename to APP_Framework/Framework/connection/bluetooth/hc08/Makefile diff --git a/APP_Framework/Framework/connection/bluetooth/HC08/hc08.c b/APP_Framework/Framework/connection/bluetooth/hc08/hc08.c similarity index 100% rename from APP_Framework/Framework/connection/bluetooth/HC08/hc08.c rename to APP_Framework/Framework/connection/bluetooth/hc08/hc08.c diff --git a/APP_Framework/Framework/connection/lora/SX1278/Kconfig b/APP_Framework/Framework/connection/lora/sx1278/Kconfig similarity index 100% rename from APP_Framework/Framework/connection/lora/SX1278/Kconfig rename to APP_Framework/Framework/connection/lora/sx1278/Kconfig diff --git a/APP_Framework/Framework/connection/lora/SX1278/Makefile b/APP_Framework/Framework/connection/lora/sx1278/Makefile similarity index 100% rename from APP_Framework/Framework/connection/lora/SX1278/Makefile rename to APP_Framework/Framework/connection/lora/sx1278/Makefile diff --git a/APP_Framework/Framework/connection/lora/SX1278/sx1278.c b/APP_Framework/Framework/connection/lora/sx1278/sx1278.c similarity index 100% rename from APP_Framework/Framework/connection/lora/SX1278/sx1278.c rename to APP_Framework/Framework/connection/lora/sx1278/sx1278.c diff --git a/APP_Framework/Framework/connection/nbiot/BC28/Kconfig b/APP_Framework/Framework/connection/nbiot/bc28/Kconfig similarity index 100% rename from APP_Framework/Framework/connection/nbiot/BC28/Kconfig rename to APP_Framework/Framework/connection/nbiot/bc28/Kconfig diff --git a/APP_Framework/Framework/connection/nbiot/BC28/Makefile b/APP_Framework/Framework/connection/nbiot/bc28/Makefile similarity index 100% rename from APP_Framework/Framework/connection/nbiot/BC28/Makefile rename to APP_Framework/Framework/connection/nbiot/bc28/Makefile diff --git a/APP_Framework/Framework/connection/nbiot/BC28/bc28.c b/APP_Framework/Framework/connection/nbiot/bc28/bc28.c similarity index 100% rename from APP_Framework/Framework/connection/nbiot/BC28/bc28.c rename to APP_Framework/Framework/connection/nbiot/bc28/bc28.c diff --git a/APP_Framework/Framework/connection/wifi/Kconfig b/APP_Framework/Framework/connection/wifi/Kconfig index 3ef0316f3..acda24557 100644 --- a/APP_Framework/Framework/connection/wifi/Kconfig +++ b/APP_Framework/Framework/connection/wifi/Kconfig @@ -1,7 +1,7 @@ -config ADAPTER_HFA21 +config ADAPTER_HFA21_WIFI bool "Using wifi adapter device HFA21" default y -if ADAPTER_HFA21 - source "$APP_DIR/Framework/connection/wifi/HFA21/Kconfig" +if ADAPTER_HFA21_WIFI + source "$APP_DIR/Framework/connection/wifi/hfa21_wifi/Kconfig" endif diff --git a/APP_Framework/Framework/connection/wifi/Makefile b/APP_Framework/Framework/connection/wifi/Makefile index 8c5a0c86a..3e08f0652 100644 --- a/APP_Framework/Framework/connection/wifi/Makefile +++ b/APP_Framework/Framework/connection/wifi/Makefile @@ -1,7 +1,7 @@ SRC_FILES := adapter_wifi.c -ifeq ($(CONFIG_ADAPTER_HFA21),y) - SRC_DIR += HFA21 +ifeq ($(CONFIG_ADAPTER_HFA21_WIFI),y) + SRC_DIR += hfa21_wifi endif include $(KERNEL_ROOT)/compiler.mk diff --git a/APP_Framework/Framework/connection/wifi/adapter_wifi.c b/APP_Framework/Framework/connection/wifi/adapter_wifi.c index 379c7e3f4..f9c27e48a 100644 --- a/APP_Framework/Framework/connection/wifi/adapter_wifi.c +++ b/APP_Framework/Framework/connection/wifi/adapter_wifi.c @@ -21,7 +21,7 @@ #include #include -#ifdef ADAPTER_HFA21 +#ifdef ADAPTER_HFA21_WIFI extern AdapterProductInfoType Hfa21Attach(struct Adapter *adapter); #endif @@ -65,7 +65,7 @@ int AdapterWifiInit(void) return -1; } -#ifdef ADAPTER_HFA21 +#ifdef ADAPTER_HFA21_WIFI AdapterProductInfoType product_info = Hfa21Attach(adapter); if (!product_info) { printf("AdapterWifiInit hfa21 attach error\n"); diff --git a/APP_Framework/Framework/connection/wifi/HFA21/Kconfig b/APP_Framework/Framework/connection/wifi/hfa21_wifi/Kconfig similarity index 92% rename from APP_Framework/Framework/connection/wifi/HFA21/Kconfig rename to APP_Framework/Framework/connection/wifi/hfa21_wifi/Kconfig index d61721c79..82f0489b8 100755 --- a/APP_Framework/Framework/connection/wifi/HFA21/Kconfig +++ b/APP_Framework/Framework/connection/wifi/hfa21_wifi/Kconfig @@ -1,6 +1,6 @@ config ADAPTER_WIFI_HFA21 - string "HFA21 adapter name" - default "hfa21" + string "HFA21 WIFI adapter name" + default "hfa21_wifi" if ADD_XIUOS_FETURES diff --git a/APP_Framework/Framework/connection/5G/Makefile b/APP_Framework/Framework/connection/wifi/hfa21_wifi/Makefile old mode 100644 new mode 100755 similarity index 58% rename from APP_Framework/Framework/connection/5G/Makefile rename to APP_Framework/Framework/connection/wifi/hfa21_wifi/Makefile index 9ce9e188f..5304916d9 --- a/APP_Framework/Framework/connection/5G/Makefile +++ b/APP_Framework/Framework/connection/wifi/hfa21_wifi/Makefile @@ -1,3 +1,3 @@ -SRC_FILES := adapter_5G.c +SRC_FILES := hfa21_wifi.c include $(KERNEL_ROOT)/compiler.mk diff --git a/APP_Framework/Framework/connection/wifi/HFA21/hfa21.c b/APP_Framework/Framework/connection/wifi/hfa21_wifi/hfa21_wifi.c similarity index 100% rename from APP_Framework/Framework/connection/wifi/HFA21/hfa21.c rename to APP_Framework/Framework/connection/wifi/hfa21_wifi/hfa21_wifi.c diff --git a/APP_Framework/Framework/connection/zigbee/Kconfig b/APP_Framework/Framework/connection/zigbee/Kconfig index 8656d3c00..42619008d 100644 --- a/APP_Framework/Framework/connection/zigbee/Kconfig +++ b/APP_Framework/Framework/connection/zigbee/Kconfig @@ -4,7 +4,7 @@ if CONNECTION_ADAPTER_ZIGBEE default y if ADAPTER_E18 - source "$APP_DIR/Framework/connection/zigbee/E18/Kconfig" + source "$APP_DIR/Framework/connection/zigbee/e18/Kconfig" endif endif diff --git a/APP_Framework/Framework/connection/zigbee/Makefile b/APP_Framework/Framework/connection/zigbee/Makefile index db3ac987b..316cd2d06 100644 --- a/APP_Framework/Framework/connection/zigbee/Makefile +++ b/APP_Framework/Framework/connection/zigbee/Makefile @@ -1,7 +1,7 @@ SRC_FILES := adapter_zigbee.c ifeq ($(CONFIG_ADAPTER_E18),y) - SRC_DIR += E18 + SRC_DIR += e18 endif include $(KERNEL_ROOT)/compiler.mk diff --git a/APP_Framework/Framework/connection/zigbee/E18/Kconfig b/APP_Framework/Framework/connection/zigbee/e18/Kconfig similarity index 100% rename from APP_Framework/Framework/connection/zigbee/E18/Kconfig rename to APP_Framework/Framework/connection/zigbee/e18/Kconfig diff --git a/APP_Framework/Framework/connection/zigbee/E18/Makefile b/APP_Framework/Framework/connection/zigbee/e18/Makefile similarity index 100% rename from APP_Framework/Framework/connection/zigbee/E18/Makefile rename to APP_Framework/Framework/connection/zigbee/e18/Makefile diff --git a/APP_Framework/Framework/connection/zigbee/E18/e18.c b/APP_Framework/Framework/connection/zigbee/e18/e18.c similarity index 100% rename from APP_Framework/Framework/connection/zigbee/E18/e18.c rename to APP_Framework/Framework/connection/zigbee/e18/e18.c diff --git a/APP_Framework/Framework/connection/zigbee/E18/e18.h b/APP_Framework/Framework/connection/zigbee/e18/e18.h similarity index 100% rename from APP_Framework/Framework/connection/zigbee/E18/e18.h rename to APP_Framework/Framework/connection/zigbee/e18/e18.h From 25221ac7861c59ff2fd5fbfacbc8676edca3d445 Mon Sep 17 00:00:00 2001 From: wang lingyu Date: Fri, 15 Oct 2021 10:51:36 +0800 Subject: [PATCH 10/11] support aiit-arm32-board for nuttx --- .../boards/arm/stm32/aiit-arm32-board/Kconfig | 125 + .../arm/stm32/aiit-arm32-board/README.txt | 2442 +++++++++++++++++ .../aiit-arm32-board/configs/adb/defconfig | 87 + .../aiit-arm32-board/configs/audio/defconfig | 79 + .../aiit-arm32-board/configs/canard/defconfig | 57 + .../configs/cxxtest/Make.defs | 66 + .../configs/cxxtest/defconfig | 45 + .../aiit-arm32-board/configs/elf/defconfig | 46 + .../configs/hciuart/defconfig | 79 + .../aiit-arm32-board/configs/ipv6/defconfig | 93 + .../configs/kostest/defconfig | 49 + .../configs/lcd1602/defconfig | 58 + .../aiit-arm32-board/configs/lwl/defconfig | 50 + .../configs/max31855/defconfig | 56 + .../configs/max7219/defconfig | 86 + .../configs/mmcsdspi/defconfig | 74 + .../configs/modbus_slave/defconfig | 65 + .../aiit-arm32-board/configs/module/defconfig | 54 + .../aiit-arm32-board/configs/netnsh/defconfig | 98 + .../aiit-arm32-board/configs/nsh/defconfig | 62 + .../configs/nxlines/defconfig | 74 + .../aiit-arm32-board/configs/pm/defconfig | 57 + .../configs/posix_spawn/defconfig | 50 + .../configs/pseudoterm/defconfig | 55 + .../aiit-arm32-board/configs/rgbled/defconfig | 65 + .../aiit-arm32-board/configs/rndis/defconfig | 100 + .../configs/sporadic/defconfig | 53 + .../aiit-arm32-board/configs/st7789/defconfig | 68 + .../configs/testlibcxx/Make.defs | 89 + .../configs/testlibcxx/defconfig | 52 + .../aiit-arm32-board/configs/usbmsc/defconfig | 61 + .../aiit-arm32-board/configs/usbnsh/defconfig | 60 + .../aiit-arm32-board/configs/wifi/defconfig | 112 + .../configs/winbuild/Make.defs | 57 + .../configs/winbuild/defconfig | 44 + .../configs/xen1210/defconfig | 58 + .../stm32/aiit-arm32-board/include/board.h | 459 ++++ .../stm32/aiit-arm32-board/kernel/Makefile | 103 + .../aiit-arm32-board/kernel/stm32_userspace.c | 117 + .../stm32/aiit-arm32-board/scripts/Make.defs | 99 + .../stm32/aiit-arm32-board/scripts/gnu-elf.ld | 126 + .../aiit-arm32-board/scripts/kernel-space.ld | 96 + .../stm32/aiit-arm32-board/scripts/ld.script | 111 + .../stm32/aiit-arm32-board/scripts/memory.ld | 85 + .../aiit-arm32-board/scripts/user-space.ld | 98 + .../arm/stm32/aiit-arm32-board/src/Make.defs | 188 ++ .../aiit-arm32-board/src/stm32_appinit.c | 79 + .../aiit-arm32-board/src/stm32_autoleds.c | 231 ++ .../stm32/aiit-arm32-board/src/stm32_boot.c | 129 + .../aiit-arm32-board/src/stm32_bringup.c | 555 ++++ .../aiit-arm32-board/src/stm32_buttons.c | 149 + .../stm32/aiit-arm32-board/src/stm32_can.c | 101 + .../aiit-arm32-board/src/stm32_critmon.c | 65 + .../aiit-arm32-board/src/stm32_cs43l22.c | 400 +++ .../stm32/aiit-arm32-board/src/stm32_ds1307.c | 113 + .../aiit-arm32-board/src/stm32_enc28j60.c | 217 ++ .../aiit-arm32-board/src/stm32_ethernet.c | 240 ++ .../stm32/aiit-arm32-board/src/stm32_extmem.c | 139 + .../stm32/aiit-arm32-board/src/stm32_font.h | 423 +++ .../aiit-arm32-board/src/stm32_gs2200m.c | 247 ++ .../aiit-arm32-board/src/stm32_hciuart.c | 82 + .../stm32/aiit-arm32-board/src/stm32_idle.c | 277 ++ .../aiit-arm32-board/src/stm32_max7219.c | 112 + .../aiit-arm32-board/src/stm32_max7219_leds.c | 88 + .../stm32/aiit-arm32-board/src/stm32_mmcsd.c | 105 + .../aiit-arm32-board/src/stm32_netinit.c | 39 + .../stm32/aiit-arm32-board/src/stm32_ostest.c | 95 + .../aiit-arm32-board/src/stm32_pca9635.c | 89 + .../arm/stm32/aiit-arm32-board/src/stm32_pm.c | 91 + .../aiit-arm32-board/src/stm32_pmbuttons.c | 138 + .../stm32/aiit-arm32-board/src/stm32_pwm.c | 123 + .../stm32/aiit-arm32-board/src/stm32_reset.c | 62 + .../stm32/aiit-arm32-board/src/stm32_rgbled.c | 169 ++ .../stm32/aiit-arm32-board/src/stm32_romfs.h | 76 + .../src/stm32_romfs_initialize.c | 158 ++ .../stm32/aiit-arm32-board/src/stm32_sdio.c | 163 ++ .../stm32/aiit-arm32-board/src/stm32_spi.c | 333 +++ .../aiit-arm32-board/src/stm32_ssd1289.c | 387 +++ .../aiit-arm32-board/src/stm32_ssd1351.c | 133 + .../stm32/aiit-arm32-board/src/stm32_st7032.c | 87 + .../stm32/aiit-arm32-board/src/stm32_st7567.c | 153 ++ .../stm32/aiit-arm32-board/src/stm32_st7789.c | 129 + .../stm32/aiit-arm32-board/src/stm32_sx127x.c | 201 ++ .../stm32/aiit-arm32-board/src/stm32_timer.c | 82 + .../src/stm32_ug2864ambag01.c | 141 + .../src/stm32_ug2864hsweg01.c | 141 + .../stm32/aiit-arm32-board/src/stm32_uid.c | 70 + .../stm32/aiit-arm32-board/src/stm32_usb.c | 343 +++ .../stm32/aiit-arm32-board/src/stm32_usbmsc.c | 70 + .../aiit-arm32-board/src/stm32_usergpio.c | 321 +++ .../aiit-arm32-board/src/stm32_userleds.c | 216 ++ .../stm32/aiit-arm32-board/src/stm32f4aiit.h | 886 ++++++ 92 files changed, 14956 insertions(+) create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/Kconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/README.txt create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/adb/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/audio/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/canard/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/cxxtest/Make.defs create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/cxxtest/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/elf/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/hciuart/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/ipv6/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/kostest/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/lcd1602/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/lwl/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/max31855/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/max7219/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/mmcsdspi/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/modbus_slave/defconfig create mode 100755 Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/module/defconfig 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+ Select if you are using the STM32F4DIS-BB base board with the + STM32F4Discovery. + +config STM32F4AIIT + bool "STM32F4AIIT base board" + default n + ---help--- + Select if you are using the STM32F4AIIT base board with the + STM32F4AIIT. + +config STM32_ROMFS + bool "Automount baked-in ROMFS image" + default n + depends on FS_ROMFS + ---help--- + Select STM32_ROMFS_IMAGEFILE, STM32_ROMFS_DEV_MINOR, STM32_ROMFS_MOUNTPOINT + +config STM32_ROMFS_DEV_MINOR + int "Minor for the block device backing the data" + depends on STM32_ROMFS + default 64 + +config STM32_ROMFS_MOUNTPOINT + string "Mountpoint of the custom romfs image" + depends on STM32_ROMFS + default "/rom" + +config STM32_ROMFS_IMAGEFILE + string "ROMFS image file to include into build" + depends on STM32_ROMFS + default "../../../../../rom.img" + +config STM32F4DISCO_USBHOST_STACKSIZE + int "USB host waiter stack size" + default 1024 + depends on USBHOST + +config STM32F4DISCO_USBHOST_PRIO + int "USB host waiter task priority" + default 100 + depends on USBHOST + +config STM32F4DISCO_QETIMER + int "Timer to use with QE encoder" + default 2 + depends on SENSORS_QENCODER + +config STM32F4DISCO_LIS3DSH + bool "Enable LIS3DSH driver for the IMU on STM32F4Discovery (rev. MB997C)" + default n + depends on SPI + depends on LIS3DSH + default n + select SENSORS_LIS3DSH + ---help--- + Select to create a LIS3DSH driver instance for the builtin accelerometer of + STM32F4Discovery. Provides /dev/acc0 device file. + Also see apps/examples/lis3dsh_reader. + The LIS3DSH is available on the STM32F4Discovery rev. MB997C (see the board manual). + +config PM_BUTTONS + bool "PM button support" + default n + depends on PM && ARCH_IRQBUTTONS + ---help--- + Enable PM button EXTI interrupts to support PM testing + +config PM_BUTTON_ACTIVITY + int "Button PM activity weight" + default 10 + depends on PM_BUTTONS + ---help--- + The activity weight to report to the power management subsystem when + a button is pressed. + +config PM_ALARM_SEC + int "PM_STANDBY delay (seconds)" + default 15 + depends on PM && RTC_ALARM + ---help--- + Number of seconds to wait in PM_STANDBY before going to PM_STANDBY + mode. + +config PM_ALARM_NSEC + int "PM_STANDBY delay (nanoseconds)" + default 0 + depends on PM && RTC_ALARM + ---help--- + Number of additional nanoseconds to wait in PM_STANDBY before going + to PM_STANDBY mode. + +config PM_SLEEP_WAKEUP + bool "PM_SLEEP wake-up alarm" + default n + depends on PM && RTC_ALARM + ---help--- + Wake-up of PM_SLEEP mode after a delay and resume normal operation. + +config PM_SLEEP_WAKEUP_SEC + int "PM_SLEEP delay (seconds)" + default 10 + depends on PM && RTC_ALARM + ---help--- + Number of seconds to wait in PM_SLEEP before going to PM_STANDBY mode. + +config PM_SLEEP_WAKEUP_NSEC + int "PM_SLEEP delay (nanoseconds)" + default 0 + depends on PM && RTC_ALARM + ---help--- + Number of additional nanoseconds to wait in PM_SLEEP before going to + PM_STANDBY mode. + +endif diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/README.txt b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/README.txt new file mode 100755 index 000000000..1720b435b --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/README.txt @@ -0,0 +1,2442 @@ +README +====== + +This README discusses issues unique to NuttX configurations for the +STMicro STM32F4Discovery development board featuring the STM32F407VGT6 +MCU. The STM32F407VGT6 is a 168MHz Cortex-M4 operation with 1Mbit Flash +memory and 128kbytes. The board features: + + - On-board ST-LINK/V2 for programming and debugging, + - LIS302DL, ST MEMS motion sensor, 3-axis digital output accelerometer, + - MP45DT02, ST MEMS audio sensor, omni-directional digital microphone, + - CS43L22, audio DAC with integrated class D speaker driver, + - Four user LEDs and two push-buttons, + - USB OTG FS with micro-AB connector, and + - Easy access to most MCU pins. + +Refer to http://www.st.com/internet/evalboard/product/252419.jsp for +further information about this board. + +NOTE: This port was developed on the original board, order code +STM32F4DISCOVERY. That board has been replaced with the new order code +STM32F407VG-DISC1. The new version of the board differs in at least these +ways: + + - The ST-LINK/V2 has been updated to ST-LINK/V2-A on STM32F4AIIT + with a Virtual Com port and Mass storage. + - LIS3DSH ST MEMS 3-axis accelerometer + +Contents +======== + + - LEDs + - RGB LED Driver + - PWM + - UARTs + - Timer Inputs/Outputs + - Nintendo Wii Nunchuck + - Quadrature Encoder + - FPU + - STM32F4DIS-BB + - RTC DS1307 + - SSD1289 + - UG-2864AMBAG01 / UG-2864HSWEG01 + - NiceRF LoRa (2AD66-LoRa V2) + - Ethernet SPI Module ENC28J60 + - HCI UART + - STM32F4Discovery-specific Configuration Options + - BASIC + - Testing LLVM LIBC++ with NuttX + - Configurations + +LEDs +==== + +The STM32F4Discovery board has four LEDs; green, orange, red and blue on the +board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/up_leds.c. The LEDs are used to encode OS-related +events as follows: + + SYMBOL Meaning LED1* LED2 LED3 LED4 + green orange red blue + ------------------- ----------------------- ------- ------- ------- ------ + LED_STARTED NuttX has been started ON OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF + LED_IRQSENABLED Interrupts enabled ON ON OFF OFF + LED_STACKCREATED Idle stack created OFF OFF ON OFF + LED_INIRQ In an interrupt** ON N/C N/C OFF + LED_SIGNAL In a signal handler*** N/C ON N/C OFF + LED_ASSERTION An assertion failed ON ON N/C OFF + LED_PANIC The system has crashed N/C N/C N/C ON + LED_IDLE STM32 is is sleep mode (Optional, not used) + + * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot + and these LEDs will give you some indication of where the failure was + ** The normal state is LED3 ON and LED1 faintly glowing. This faint glow + is because of timer interrupts that result in the LED being illuminated + on a small proportion of the time. +*** LED2 may also flicker normally if signals are processed. + +RGB LED Driver +============== + +Alan Carvalho de Assis has used the STM32F4-Discovery to drive an RGB LED +using PWM output. The external RGB connected this way: + + R = TIM1 CH1 on PE9 + G = TIM2 CH2 on PA1 + B = TIM3 CH3 on PB0 + +The RGB LED driver that uses PWM to control the red, green, and blue color +components can be enabled with the following configuration settings: + + +CONFIG_RGBLED=y + + +CONFIG_PWM + + +CONFIG_STM32_TIM1 + +CONFIG_STM32_TIM2 + +CONFIG_STM32_TIM3 + +CONFIG_STM32_TIM1_PWM=y + +CONFIG_STM32_TIM1_MODE=0 + +CONFIG_STM32_TIM1_CHANNEL=1 + +CONFIG_STM32_TIM1_CHMODE=0 + +CONFIG_STM32_TIM2_PWM=y + +CONFIG_STM32_TIM2_MODE=0 + +CONFIG_STM32_TIM2_CHANNEL=2 + +CONFIG_STM32_TIM2_CHMODE=0 + +CONFIG_STM32_TIM3_PWM=y + +CONFIG_STM32_TIM3_MODE=0 + +CONFIG_STM32_TIM3_CHANNEL=3 + +CONFIG_STM32_TIM3_CHMODE=0 + +PWM +=== + +The STM32F4Discovery has no real on-board PWM devices, but the board can be +configured to output a pulse train using TIM4 CH2 on PD3. This pin is +available next to the audio jack. + +UARTs +===== + +UART/USART PINS +--------------- + +USART1 + CK PA8 + CTS PA11* + RTS PA12* + RX PA10*, PB7 + TX PA9*, PB6* +USART2 + CK PA4*, PD7 + CTS PA0*, PD3 + RTS PA1, PD4* + RX PA3, PD6 + TX PA2, PD5* +USART3 + CK PB12, PC12*, PD10 + CTS PB13, PD11 + RTS PB14, PD12* + RX PB11, PC11, PD9 + TX PB10*, PC10*, PD8 +UART4 + RX PA1, PC11 + TX PA0*, PC10* +UART5 + RX PD2 + TX PC12* +USART6 + CK PC8, PG7** + CTS PG13**, PG15** + RTS PG12**, PG8** + RX PC7*, PG9** + TX PC6, PG14** + + * Indicates pins that have other on-board functions and should be used only + with care (See table 5 in the STM32F4Discovery User Guide). The rest are + free I/O pins. +** Port G pins are not supported by the MCU + +Default USART/UART Configuration +-------------------------------- + +USART2 is enabled in most configurations (see */defconfig). RX and TX are +configured on pins PA3 and PA2, respectively (see include/board.h). + +These pins selections, however, conflict with Ethernet pin usage on the +STM32F4DIS-BB base board. The STM32F4DIS-BB base board provides RS-232 +drivers and a DB9 connector for USART6. USART6 is the preferred serial +console for use with the STM32F4DIS-BB. + +Timer Inputs/Outputs +==================== + +TIM1 + CH1 PA8, PE9 + CH2 PA9*, PE11 + CH3 PA10*, PE13 + CH4 PA11*, PE14 +TIM2 + CH1 PA0*, PA15, PA5* + CH2 PA1, PB3* + CH3 PA2, PB10* + CH4 PA3, PB11 +TIM3 + CH1 PA6*, PB4, PC6 + CH2 PA7*, PB5, PC7* + CH3 PB0, PC8 + CH4 PB1, PC9 +TIM4 + CH1 PB6*, PD12* + CH2 PB7, PD13* + CH3 PB8, PD14* + CH4 PB9*, PD15* +TIM5 + CH1 PA0*, PH10** + CH2 PA1, PH11** + CH3 PA2, PH12** + CH4 PA3, PI0 +TIM8 + CH1 PC6, PI5 + CH2 PC7*, PI6 + CH3 PC8, PI7 + CH4 PC9, PI2 +TIM9 + CH1 PA2, PE5 + CH2 PA3, PE6 +TIM10 + CH1 PB8, PF6 +TIM11 + CH1 PB9*, PF7 +TIM12 + CH1 PH6**, PB14 + CH2 PC15, PH9** +TIM13 + CH1 PA6*, PF8 +TIM14 + CH1 PA7*, PF9 + + * Indicates pins that have other on-board functions and should be used only + with care (See table 5 in the STM32F4Discovery User Guide). The rest are + free I/O pins. +** Port H pins are not supported by the MCU + +Nintendo Wii Nunchuck: +====================== + + There is a driver on NuttX to support Nintendo Wii Nunchuck Joystick. If you + want to use it please select these options: + + - Enable the I2C1 at System Type -> STM32 Peripheral Support, it will enable: + + CONFIG_STM32_I2C1=y + + - Enable to Custom board/driver initialization at RTOS Features -> RTOS hooks + + CONFIG_BOARD_LATE_INITIALIZE=y + + - Enable the I2C Driver Support at Device Drivers, it will enable this symbol: + + CONFIG_I2C=y + + - Nintendo Wii Nunchuck Joystick at Device Drivers -> [*] Input Device Support + + CONFIG_INPUT=y + CONFIG_INPUT_NUNCHUCK=y + + - Enable the Nunchuck joystick example at Application Configuration -> Examples + + CONFIG_EXAMPLES_NUNCHUCK=y + CONFIG_EXAMPLES_NUNCHUCK_DEVNAME="/dev/nunchuck0" + + You need to connect GND and +3.3V pins from Nunchuck connector to GND and 3V + of stm32f4discovery respectively (Nunchuck also can work connected to 5V, but + I don't recommend it). Connect I2C Clock from Nunchuck to SCK (PB6) and the + I2C Data to SDA (PB9). + +Quadrature Encoder: +=================== + + The nsh configuration has been used to test the Quadrture Encoder + (QEncoder, QE) with the following modifications to the configuration + file: + + - These setting enable support for the common QEncode upper half driver: + + CONFIG_BOARD_LATE_INITIALIZE=y + + CONFIG_SENSORS=y + CONFIG_SENSORS_QENCODER=y + + - The timer 2 needs to be enabled: + + CONFIG_STM32_TIM2=y + + - This is a board setting that selected timer 2 for use with the + quadrature encode: + + CONFIG_STM32F4DISCO_QETIMER=2 + + - These settings enable the STM32 Quadrature encoder on timer 2: + + CONFIG_STM32_TIM2_QE=y + CONFIG_STM32_TIM4_QECLKOUT=2800000 + CONFIG_STM32_QENCODER_FILTER=y + CONFIG_STM32_QENCODER_SAMPLE_EVENT_6=y + CONFIG_STM32_QENCODER_SAMPLE_FDTS_4=y + + - These settings enable the test case at apps/examples/qencoder: + + CONFIG_EXAMPLES_QENCODER=y + CONFIG_EXAMPLES_QENCODER_DELAY=100 + CONFIG_EXAMPLES_QENCODER_DEVPATH="/dev/qe0" + + In this configuration, the QEncoder inputs will be on the TIM2 inputs of + PA15 and PA1 (CH1 and CH2 respectively). + + You can also use QEncoder with other timers, but keep in mind that only TIM2 + and TIM5 are 32bits timers, all other timers are 16-bit then the QE counter + will overflow after 65535. + + If TIM4 is selected, then PB6 and PB7 will be used for CH1 and CH2. + If TIM8 is selected, then PC6 and PI5 will be used for CH1 and CH2. + +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the STM32 port. + +1. Non-Lazy Floating Point Register Save + + In this configuration floating point register save and restore is + implemented on interrupt entry and return, respectively. In this + case, you may use floating point operations for interrupt handling + logic if necessary. This FPU behavior logic is enabled by default + with: + + CONFIG_ARCH_FPU=y + +2. Lazy Floating Point Register Save. + + An alternative implementation only saves and restores FPU registers only + on context switches. This means: (1) floating point registers are not + stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file: + + CONFIG_ARCH_FPU=y + CONFIG_ARMV7M_LAZYFPU=y + +CFLAGS +------ + +Only recent GCC toolchains have built-in support for the Cortex-M4 FPU. You will see +the following lines in each Make.defs file: + + ifeq ($(CONFIG_ARCH_FPU),y) + ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard + else + ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft + endif + +STM32F4DIS-BB +============= + +On-board PIO usage: + + ---------- ------------- ------------------------------ + PIO SIGNAL FUNCTION + ---------- ------------- ------------------------------ + PB11 TXEN LAN8720 + PB12 TXD0 + PB13 TXD1 + PC4 RXD0/MODE0 + PC5 RXD1/MODE1 + PA7 RXDR/PHYAD0 + PA2 MDIO + PC1 MDC + PA1 NINT/REFCLK0 + PE2 NRST + ---------- ------------- ------------------------------ + PC6 D2 DCMI + PC7 D3 + PE0 D4 + PE1 D5 + PE4 D6 + PB6 D7 + PE5 D8 + PE6 D9 + PA6 PCLK + PA4 HS + PB7 VS + PD6 PWR_EN + PD12 RST + PB9 SDA + PB8 SCL + ---------- ------------- ------------------------------ + USART6_TX T1IN SP3232EEY-L + USART6_RX T2OUT + ---------- ------------- ------------------------------ + PB15 NCD MicroSD + PC9 DAT1 + PC8 DAT0 + PC12 CLK + PD2 CMD + PC11 CD/DAT3 + PC10 DAT2 + ---------- ------------- ------------------------------ + +RTC DS1307 +========== + +It is possible to use a low cost extern DS1307 RTC to keep date and time +always updated. These DS1307 RTC modules come with a 3V button battery, then +even when the board is turned OFF the Date/Time registers keep running. + +You can connect the module this way (STM32F4Discovery to DS1307 board): GND +to GND; 5V to VCC; PB9 to SDA; PB6 to SCL. In the NuttX menuconfig you need +to enable these options: + +System Type ---> + STM32 Peripheral Support ---> + [*] I2C1 + +Device Drivers ---> + Timer Driver Support ---> + [*] RTC Driver Support ---> + -*- Date/Time RTC Support + [*] External RTC Support + [*] DS130x/DS323x RTC Driver + Maxim Integrated RTC (DS1307) ---> + (100000) DS1307/DS323x I2C frequency + +Application Configuration ---> + NSH Library ---> + Disable Individual commands ---> + [ ] Disable date ( <-- Deselect ) + +It is also a good idea to enable the DEBUG to RTC initially, you will see: + +ABCDF +stm32_ds1307_init: Initialize I2C1 +stm32_ds1307_init: Bind the DS1307 RTC driver to I2C1 +rtc_dumptime: Returning: +rtc_dumptime: tm_sec: 00000039 +rtc_dumptime: tm_min: 00000001 +rtc_dumptime: tm_hour: 00000009 +rtc_dumptime: tm_mday: 00000016 +rtc_dumptime: tm_mon: 00000008 +rtc_dumptime: tm_year: 00000077 + +NuttShell (NSH) +nsh> date +Sep 22 09:01:58 2019 + +SSD1289 +======= + +I purchased an LCD display on eBay from China. The LCD is 320x240 RGB565 and +is based on an SSD1289 LCD controller and an XPT2046 touch IC. The pin out +from the 2x16 connect on the LCD is labelled as follows: + +LCD CONNECTOR: SSD1289 MPU INTERFACE PINS: + + +------+------+ DEN I Display enable pin +1 | GND | 3V3 | 2 VSYNC I Frame synchronization signal + +------+------+ HSYNC I Line synchronization signal +3 | D1 | D0 | 4 DOTCLK I Dot clock and OSC source + +------+------+ DC I Data or command +5 | D3 | D2 | 6 E (~RD) I Enable/Read strobe + +------+------+ R (~WR) I Read/Write strobe +7 | D5 | D4 | 8 D0-D17 IO For parallel mode, 8/9/16/18 bit interface + +------+------+ WSYNC O RAM write synchronizatin output +9 | D7 | D6 | 10 ~RES I System reset + +------+------+ ~CS I Chip select of serial interface +11 | D9 | D8 | 12 SCK I Clock of serial interface + +------+------+ SDI I Data input in serial mode +13 | D11 | D10 | 14 SDO O Data output in serial moce + +------+------+ +15 | D13 | D12 | 16 + +------+------+ +17 | D15 | D14 | 18 + +------+------+ +19 | RS | CS | 20 + +------+------+ +21 | RD | WR | 22 NOTES: + +------+------+ +23 |BL_CNT|RESET | 24 BL_CNT is the PWM backlight level control. + +------+------+ +25 |TP_RQ |TP_S0 | 26 These pins are for the touch panel: TP_REQ + +------+------+ TP_S0, TP_SI, TP_SCX, and TP_CS +27 | NC |TP_SI | 28 + +------+------+ +29 | NC |TP_SCX| 30 + +------+------+ +31 | NC |TP_CS | 32 + +------+------+ + +MAPPING TO STM32 F4: + + ---------------- -------------- ---------------------------------- + STM32 FUNCTION LCD PIN STM32F4Discovery PIN + ---------------- -------------- ---------------------------------- + FSMC_D0 D0 pin 4 PD14 P1 pin 46 Conflict (Note 1) + FSMC_D1 D1 pin 3 PD15 P1 pin 47 Conflict (Note 2) + FSMC_D2 D2 pin 6 PD0 P2 pin 36 Free I/O + FSMC_D3 D3 pin 5 PD1 P2 pin 33 Free I/O + FSMC_D4 D4 pin 8 PE7 P1 pin 25 Free I/O + FSMC_D5 D5 pin 7 PE8 P1 pin 26 Free I/O + FSMC_D6 D6 pin 10 PE9 P1 pin 27 Free I/O + FSMC_D7 D7 pin 9 PE10 P1 pin 28 Free I/O + FSMC_D8 D8 pin 12 PE11 P1 pin 29 Free I/O + FSMC_D9 D9 pin 11 PE12 P1 pin 30 Free I/O + FSMC_D10 D10 pin 14 PE13 P1 pin 31 Free I/O + FSMC_D11 D11 pin 13 PE14 P1 pin 32 Free I/O + FSMC_D12 D12 pin 16 PE15 P1 pin 33 Free I/O + FSMC_D13 D13 pin 15 PD8 P1 pin 40 Free I/O + FSMC_D14 D14 pin 18 PD9 P1 pin 41 Free I/O + FSMC_D15 D15 pin 17 PD10 P1 pin 42 Free I/O + FSMC_A16 RS pin 19 PD11 P1 pin 27 Free I/O + FSMC_NE1 ~CS pin 10 PD7 P2 pin 27 Free I/O + FSMC_NWE ~WR pin 22 PD5 P2 pin 29 Conflict (Note 3) + FSMC_NOE ~RD pin 21 PD4 P2 pin 32 Conflict (Note 4) + PC6 RESET pin 24 PC6 P2 pin 47 Free I/O + Timer output BL_CNT pin 23 (to be determined) + ---------------- -------------- ---------------------------------- + + 1 Used for the RED LED + 2 Used for the BLUE LED + 3 Used for the RED LED and for OTG FS Overcurrent. It may be okay to use + for the parallel interface if PC0 is held high (or floating). PC0 enables + the STMPS2141STR IC power switch that drives the OTG FS host VBUS. + 4 Also the reset pin for the CS43L22 audio Codec. + +NOTE: The configuration to test this LCD configuration is available at +boards/arm/stm32/stm32f4discovery/nxlines. As of this writing, I have not seen the +LCD working so I probably have some things wrong. + +I might need to use a bit-banging interface. Below is the pin configuration +of a similar LCD to support a (write-only), bit banging interface: + + LCD PIN BOARD CONNECTION + LEDA 5V + VCC 5V + RD 3.3V + GND GND + DB0-7 Port C pins configured as outputs + DB8-15 Port A pins configured as outputs + RS Pin configured as output + WR Pin configured as output + CS Pin configured as output + RSET Pin configured as output + +The following summarize the bit banging operations: + + /* Rese the LCD */ + void Reset(void) + { + Set RSET output + delay + Clear RSET output + delay + Set RSET output + } + + /* Write 16-bits of whatever */ + void Write16(uint8_t ms, uint8_t ls) + { + Set port A to ms + Set port B to ls + + Clear WR pin + Set WR pin + } + + /* Set the index register to an LCD register address */ + void Index(uint8_t address) + { + Clear RS + Write16(0, address); + } + + /* Write data to the LCD register or GRAM memory */ + void WriteData(uin16_t data) + { + Set RS + Write16(data >> 8, data & 0xff); + } + + /* Write to a register */ + void WriteRegister(uint8_t address, uint16_t data) + { + Index(address); + WriteData(data); + } + +UG-2864AMBAG01 / UG-2864HSWEG01 +=============================== + +I purchased an OLED display on eBay. The OLED is 128x64 monochrome and +is based on an UG-2864AMBAG01 OLED controller. The OLED can run in either +parallel or SPI mode. I am using SPI mode. In SPI mode, the OLED is +write only so the driver keeps a 128*64/8 = 1KB framebuffer to remember +the display contents: + +Here is how I have the OLED connected. But you can change this with the +settings in include/board.h and src/stm324fdiscovery.h. Connector +pinout for the UG-2864AMBAG01 is specific to the theO.net display board +that I am using: + + --------------------------+---------------------------------------------- + Connector CON10 J1: | STM32F4Discovery + --------------+-----------+---------------------------------------------- + CON10 J1: | CON20 J2: | P1/P2: + --------------+-----------+---------------------------------------------- + 1 3v3 | 3,4 3v3 | P2 3V + 3 /RESET | 8 /RESET | P2 PB6 (Arbitrary selection) + 5 /CS | 7 /CS | P2 PB7 (Arbitrary selection) + 7 A0 | 9 A0 | P2 PB8 (Arbitrary selection) + 9 LED+ (N/C) | ----- | ----- + 2 5V Vcc | 1,2 Vcc | P2 5V + 4 DI | 18 D1/SI | P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1 (1)) + 6 SCLK | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK == GPIO_SPI1_SCK_1 (1)) + 8 LED- (N/C) | ----- | ------ + 10 GND | 20 GND | P2 GND + --------------+-----------+---------------------------------------------- + (1) Required because of on-board MEMS + ------------------------------------------------------------------------- + +Darcy Gong recently added support for the UG-2864HSWEG01 OLED which is also +an option with this configuration. I have little technical information about +the UG-2864HSWEG01 interface (see boards/arm/stm32/stm32f4discovery/src/up_ug2864hsweg01.c). + +NiceRF LoRa (2AD66-LoRa V2) +=========================== + +It is possible to wire an external LoRa module to STM32F4Discovery board. + +First connect the GND and VCC (to 3.3V) and then connect the SCK label to PA5, +connect the MISO to PA6, connect the MOSI to PA7, connect the NSS to PD8, +connect DIO0 to PD0 and finally connect NRESET to PD4. + +Ethernet SPI Module ENC28J60 +============================ + +You can use an external Ethernet SPI Module ENC28J60 with STM32F4Discovery board. + +First connect the GND and VCC (to 3.3V). Note: according with ENC28J60 datasheet +the Operating Voltage should be between 3.1V to 3.6V, but STM32F4Discover only +supply 3.0V. You can modify your board to supply 3.3V: just remove the D3 diode +and short-circuit the board pads where it was soldered). + +Connect the SCK label to PA5, connect the SO to PA6, connect the SI to PA7, +connect the CS to PA4, connect RST to PE1 and finally connect INT to PE4. + +The next step is to enable the ENC28J60 in the menuconfig ("make menuconfig") +and the necessary Network configuration, you can use the +boards/arm/stm32/fire-stm32v2/configs/nsh/defconfig as reference. + +HCI UART +======== + +BT860 +----- + + I have been testing with the DVK_BT960_SA board via J10 as follows: + + DVK_BT860-SA J10 STM32F4 Discovery P1 + pin 1 GND P1 pin 49 + pin 2 Module_RTS_O USART3_CTS PB13, P1 pin 37 + pin 3 N/C + pin 4 Module_RX_I USART3_TXD PB10, P1 pin 34 + pin 5 Module_TX_O USART3_RX PB11, P1 pin 35 + pin 6 Module_CTS_I USART3_RTS PB14, P1 pin 38 + + Due to conflicts, USART3 many not be used if Ethernet is enabled with + the STM32F4DIS-BB base board: + + PB-11 conflicts with Ethernet TXEN + PB-13 conflicts with Ethernet TXD1 + + If you need to use the HCI uart with Ethernet, then you will need to + configure a new U[S]ART and/or modify the pin selections in + include/board.h. + +CC2564 +------ + + [To be provided] + + One confusing thing compared with the BT860 is in the naming of the pins + at the 4-pin RS232 TTL interface: The BT860 uses BT860-centric naming, + the Rx pin is for BT860 receive and needs to connect with the STM32 Tx + pin, the Tx pin is for BT860 transmit an needs to be connected with the + STM32 Rx pin, etc. The CC2564, on the hand, uses host-centric naming so + that the CC2564 Rx pin connects to the STM32 Rx pin, Tx to Tx pin, etc. + +Troubleshooting +--------------- + + First you should enable CONFIG_DEBUG_WIRELESS_ERR, WARN, and INFO options + so that you can see what the driver is doing. + + The bring-up problems that I encountered mostly involved setting up the + 4-wire UART interface: Remember to cross Rx/Tx and RTS/CTS. The active + state for RTS and CTS is low. For bringup of the BT860, I used a Seleae + logic analyzer connected to the Tx, Rx, RTS, and CTS pins. When the + BT860 is working correctly you would see this: + + 1. All signals high initially, + 2. When NuttX starts, RTS goes low + 3. The BT860 sees RTS go low and responds by setting CTS low after a + delay. This is when it selects between USB and UART. + 4. After another delay, the STM32 sends the 4 Tx bytes. + 5. The BT860 responds with 3 bytes. + 6. If successful, additional commands and responses follow. + + Some of these steps may be different for other HCI UARTs. Steps 4-5 are + the reset sequence. the 4 Tx bytes comes from the code in the function + hci_initialize() in the file wireless/bluetooth/bt_hcicore.c: + + /* Send HCI_RESET */ + + bt_hci_cmd_send(BT_HCI_OP_RESET, NULL); + + The code is actually working one command ahead. It has already queued up + the reset command and is requesting the HCI UART device features while the + reset command is being sent: + + ret = bt_hci_cmd_send_sync(BT_HCI_OP_READ_LOCAL_FEATURES, NULL, &rsp); + if (ret < 0) + { + wlerr("ERROR: bt_hci_cmd_send_sync failed: %d\n", ret); + return ret; + } + + A common failure is to see a timeout error (-116) due to a Tx flow control + failure (CTS is high). There is no timeout on the first command, the + timeout actually occurs on the second command in bt_hci_cmd_send_sync(): + + do + { + /* The timed wait could also be awakened by a signal */ + + ret = nxsem_timedwait(&sync_sem, &abstime); + } + while (ret == -EINTR); + + The above times out and generates the 116 error. + + In the case of the timeout, the second command is stuck in the message queue + is never processed because the Tx thread is waiting for the BT_HCI_OP_RESET + command to complete. It is blocked in hci_tx_thread() kernel thread. + + The Tx occurs on a kernel thread. The Tx send of the first command causes + the hci_tx_kthread() to block. It waits here until what the HCI UART + receives the command and responses with the command complete event: + + /* Wait until ncmd > 0 */ + + do + { + ret = nxsem_wait(&g_btdev.ncmd_sem); + } + while (ret == -EINTR); + + bt_hci_cmd_send() will block on the first BT_HCI_OP_RESET until until it + gets the 3-byte event (BT_EVT) that indicates that the command was + completed and provides the command status. See the function + hci_command_complete() where it posts g_btdev.ncmd_sem. + + g_btdev.ncmd = 1; + nxsem_post(&g_btdev.ncmd_sem); + + You can see such a hange in the wireless debug output + + bt_hci_cmd_send: opcode 0c03 len 3 <<< BT_HCI_OP_RESET command is queue + hci_tx_kthread: Sending command 0c03 buf 20002a40 to driver <<< Sent to driver from the Tx thread + hciuart_write: config 801d924 buffer 20002760 buflen 4 <<< Goes to STM32 HCI UART driver + + bt_hci_cmd_send_sync: opcode 1003 len 3 <<< next command is queued. + hciuart_copytotxfifo: txhead 1 txtail 4 nbytes 1 <<< One byte of first command written to Tx HR + hciuart_enableints: CR1 000020ac CR2 00000301 <<< Tx interrupts enabled + +!!!! No Tx interrupts, probably because of Tx flow control (CTS is high) !!! + + hci_initialize: ERROR: bt_hci_cmd_send_sync failed: -116 <<< Times out on second message + +STM32F4Discovery-specific Configuration Options +=============================================== + + CONFIG_ARCH - Identifies the arch/ subdirectory. This should + be set to: + + CONFIG_ARCH=arm + + CONFIG_ARCH_family - For use in C code: + + CONFIG_ARCH_ARM=y + + CONFIG_ARCH_architecture - For use in C code: + + CONFIG_ARCH_CORTEXM4=y + + CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory + + CONFIG_ARCH_CHIP=stm32 + + CONFIG_ARCH_CHIP_name - For use in C code to identify the exact + chip: + + CONFIG_ARCH_CHIP_STM32F407VG=y + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock + configuration features. + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + + CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and + hence, the board that supports the particular chip or SoC. + + CONFIG_ARCH_BOARD=STM32F4Discovery (for the STM32F4Discovery development board) + + CONFIG_ARCH_BOARD_name - For use in C code + + CONFIG_ARCH_BOARD_STM32F4_AIIT=y + + CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation + of delay loops + + CONFIG_ENDIAN_BIG - define if big endian (default is little + endian) + + CONFIG_RAM_SIZE - Describes the installed RAM + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + + CONFIG_RAM_START - The start address of installed RAM + + CONFIG_RAM_START=0x20000000 + + CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP + + CONFIG_ARCH_FPU - The STM32F4Discovery supports a floating point unit (FPU) + + CONFIG_ARCH_FPU=y + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that + have LEDs + + CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt + stack. If defined, this symbol is the size of the interrupt + stack in bytes. If not defined, the user task stacks will be + used during interrupt handling. + + CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + + CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. + + Individual subsystems can be enabled: + + AHB1 + ---- + CONFIG_STM32_CRC + CONFIG_STM32_BKPSRAM + CONFIG_STM32_CCMDATARAM + CONFIG_STM32_DMA1 + CONFIG_STM32_DMA2 + CONFIG_STM32_ETHMAC + CONFIG_STM32_OTGHS + + AHB2 + ---- + CONFIG_STM32_DCMI + CONFIG_STM32_CRYP + CONFIG_STM32_HASH + CONFIG_STM32_RNG + CONFIG_STM32_OTGFS + + AHB3 + ---- + CONFIG_STM32_FSMC + + APB1 + ---- + CONFIG_STM32_TIM2 + CONFIG_STM32_TIM3 + CONFIG_STM32_TIM4 + CONFIG_STM32_TIM5 + CONFIG_STM32_TIM6 + CONFIG_STM32_TIM7 + CONFIG_STM32_TIM12 + CONFIG_STM32_TIM13 + CONFIG_STM32_TIM14 + CONFIG_STM32_WWDG + CONFIG_STM32_IWDG + CONFIG_STM32_SPI2 + CONFIG_STM32_SPI3 + CONFIG_STM32_USART2 + CONFIG_STM32_USART3 + CONFIG_STM32_UART4 + CONFIG_STM32_UART5 + CONFIG_STM32_I2C1 + CONFIG_STM32_I2C2 + CONFIG_STM32_I2C3 + CONFIG_STM32_CAN1 + CONFIG_STM32_CAN2 + CONFIG_STM32_DAC1 + CONFIG_STM32_DAC2 + CONFIG_STM32_PWR -- Required for RTC + + APB2 + ---- + CONFIG_STM32_TIM1 + CONFIG_STM32_TIM8 + CONFIG_STM32_USART1 + CONFIG_STM32_USART6 + CONFIG_STM32_ADC1 + CONFIG_STM32_ADC2 + CONFIG_STM32_ADC3 + CONFIG_STM32_SDIO + CONFIG_STM32_SPI1 + CONFIG_STM32_SYSCFG + CONFIG_STM32_TIM9 + CONFIG_STM32_TIM10 + CONFIG_STM32_TIM11 + + Timer devices may be used for different purposes. One special purpose is + to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn + is defined (as above) then the following may also be defined to indicate that + the timer is intended to be used for pulsed output modulation, ADC conversion, + or DAC conversion. Note that ADC/DAC require two definition: Not only do you have + to assign the timer (n) for used by the ADC or DAC, but then you also have to + configure which ADC or DAC (m) it is assigned to. + + CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + + For each timer that is enabled for PWM usage, we need the following additional + configuration settings: + + CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + + NOTE: The STM32 timers are each capable of generating different signals on + each of the four channels with different duty cycles. That capability is + not supported by this driver: Only one output channel per timer. + + JTAG Enable settings (by default only SW-DP is enabled): + + CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP) + but without JNTRST. + CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled + + STM32F4Discovery specific device driver settings + + CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART + m (m=4,5) for the console and ttys0 (default is the USART1). + CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. + This specific the size of the receive buffer + CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before + being sent. This specific the size of the transmit buffer + CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + CONFIG_U[S]ARTn_2STOP - Two stop bits + + STM32F4Discovery CAN Configuration + + CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or + CONFIG_STM32_CAN2 must also be defined) + CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default + Standard 11-bit IDs. + CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. + Default: 8 + CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. + Default: 4 + CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback + mode for testing. The STM32 CAN driver does support loopback mode. + CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 + is defined. + CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 + is defined. + CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1. + Default: 6 + CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2. + Default: 7 + CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an + dump of all CAN registers. + + STM32F4Discovery SPI Configuration + + CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI + support. Non-interrupt-driven, poll-waiting is recommended if the + interrupt rate would be to high in the interrupt driven case. + CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance. + Cannot be used with CONFIG_STM32_SPI_INTERRUPT. + + STM32F4Discovery DMA Configuration + + CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO + and CONFIG_STM32_DMA2. + CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128 + CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. + Default: Medium + CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: + 4-bit transfer mode. + + STM32 USB OTG FS Host Driver Support + + Pre-requisites + + CONFIG_USBDEV - Enable USB device support + CONFIG_USBHOST - Enable USB host support + CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block + CONFIG_STM32_SYSCFG - Needed + CONFIG_SCHED_WORKQUEUE - Worker thread support is required + + Options: + + CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. + Default 128 (512 bytes) + CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO + in 32-bit words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit + words. Default 96 (384 bytes) + CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128 + CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever + want to do that? + CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access + debug. Depends on CONFIG_DEBUG_FEATURES. + CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB + packets. Depends on CONFIG_DEBUG_FEATURES. + +BASIC +===== + I have used the stm32f4discovery/nsh configuration to test Michael Haardt's + BASIC interpreter that you can find at apps/interpreters/bas. + + Bas is an interpreter for the classic dialect of the programming language + BASIC. It is pretty compatible to typical BASIC interpreters of the 1980s, + unlike some other UNIX BASIC interpreters, that implement a different + syntax, breaking compatibility to existing programs. Bas offers many ANSI + BASIC statements for structured programming, such as procedures, local + variables and various loop types. Further there are matrix operations, + automatic LIST indentation and many statements and functions found in + specific classic dialects. Line numbers are not required. + + There is also a test suite for the interpreter that can be found at + apps/examples/bastest. + + Configuration + ------------- + Below are the recommended configuration changes to use BAS with the + stm32f4discovery/nsh configuration: + + Dependencies: + CONFIG_LIBC_EXECFUNCS=y : exec*() functions are required + CONFIG_LIBM=y : Some floating point library is required + CONFIG_LIBC_FLOATINGPOINT=y : Floating point printing support is required + CONFIG_LIBC_TMPDIR="/tmp" : Writable temporary files needed for some commands + CONFIG_FS_FAT=y : With FAT you create a RAMDISK at /tmp + CONFIG_FAT_LFN=y : FAT is difficult to use with long file names + + Enable the BASIC interpreter. Other default options should be okay: + CONFIG_INTERPRETERS_BAS=y : Enables the interpreter + CONFIG_INTERPRETER_BAS_VT100=y + + The BASIC test suite can be included: + CONFIG_FS_ROMFS=y : ROMFS support is needed + CONFIG_EXAMPLES_BASTEST=y : Enables the BASIC test setup + CONFIG_EXAMPLES_BASTEST_DEVMINOR=0 + CONFIG_EXAMPLES_BASTEST_DEVPATH="/dev/ram0" + + Usage + ----- + This setup will initialize the BASIC test (optional): This will mount + a ROMFS file system at /mnt/romfs that contains the BASIC test files: + + nsh> bastest + Registering romdisk at /dev/ram0 + Mounting ROMFS filesystem at target=/mnt/romfs with source=/dev/ram0 + nsh> + + These steps will create and mount a RAMDISK at /tmp (required only for a + few BASIC commands). This will create a RAMDISK device at /dev/ram1 with + size = 512 * 64 = 32KiB and mount it at /tmp: + + nsh> mkrd -m 1 -s 512 64 + nsh> mkfatfs /dev/ram1 + nsh> mount -t vfat /dev/ram1 /tmp + nsh> + + The interactive interpreter is started like: + + nsh> bas + bas 2.4 + Copyright 1999-2014 Michael Haardt. + This is free software with ABSOLUTELY NO WARRANTY. + > + + Ctrl-D exits the interpreter. + + The test programs can be ran like this: + + nsh> bastest + Registering romdisk at /dev/ram0 + Mounting ROMFS filesystem at target=/mnt/romfs with source=/dev/ram0 + nsh> bas /mnt/romfs/test01.bas + 1 + hello + 0.0002 + 0.0000020 + 0.0000002 + + nsh> + + Or you can load a test into memory and execute it interactively: + + nsh> bas + bas 2.4 + Copyright 1999-2014 Michael Haardt. + This is free software with ABSOLUTELY NO WARRANTY. + > load "/mnt/romfs/test01.bas" + > run + 1 + hello + 0.0002 + 0.0000020 + 0.0000002 + > + +Testing LLVM LIBC++ with NuttX +============================== + +You can use LLVM LIBC++ on NuttX to get a C++ compiler with C++11 features. +Follow these steps to get it working: + +Clone the needed repositories: + + $ git clone https://www.bitbucket.org/acassis/libcxx + + $ git clone https://www.bitbucket.org/nuttx/apps + + $ git clone https://www.bitbucket.org/nuttx/nuttx + +Install the libcxx files on NuttX: + + $ cd libcxx + + $ ./install.sh ../nuttx + Installing LLVM/libcxx in the NuttX source tree + Installation succeeded + +Enter inside NuttX and compile it: + + $ cd ../nuttx + + $ tools/configure.sh stm32f4discovery:testlibcxx + Copy files + Refreshing... + + $ ls -l nuttx.bin + -rwxrwxr-x 1 alan alan 58112 Ago 8 11:08 nuttx.bin + +Plug the MiniUSB cable in the STM32F4Discovery board and flash the firmware: + + $ sudo openocd -f interface/stlink-v2.cfg -f target/stm32f4x.cfg -c init \ + -c "reset halt" -c "flash write_image erase nuttx.bin 0x08000000" + + ... + + Info : device id = 0x10036413 + Info : flash size = 1024kbytes + target halted due to breakpoint, current mode: Thread + xPSR: 0x61000000 pc: 0x20000046 msp: 0x20001d60 + wrote 65536 bytes from file nuttx.bin in 2.959432s (21.626 KiB/s) + +Connect the USB/Serial 3.3V dongle to PA2(board TX) and PA3(board RX) use +minicom or other serial console configured to 115200 8n1. + +Press Reset pin of the board and you will see: + + NuttShell (NSH) + nsh> ? + help usage: help [-v] [] + + [ cmp free mh source usleep + ? dirname help mv sleep xd + basename dd hexdump mw test + break echo kill pwd time + cat exec ls rm true + cd exit mb rmdir uname + cp false mkdir set unset + + Builtin Apps: + helloxx + + nsh> + + +Just type helloxx: + + nsh> helloxx + helloxx_main: Saying hello from the dynamically constructed instance + CHelloWorld::HelloWorld: Hello, World!! + helloxx_main: Saying hello from the instance constructed on the stack + CHelloWorld::HelloWorld: Hello, World!! + helloxx_main: Saying hello from the statically constructed instance + CHelloWorld::HelloWorld: Hello, World!! + + nsh> + +Configurations +============== + +Common Information +------------------ + +Each STM32F4Discovery configuration is maintained in a sub-directory and +can be selected as follow: + + tools/configure.sh STM32F4Discovery: + +Where is one of the sub-directories listed in the next paragraph + + NOTES (common for all configurations): + + 1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + +Configuration Sub-directories +------------------------- + + audio: + ----- + + This configuration is a variant of the NSH configuration used for + demonstrating PCM audio using the CS43L22 stereo DAC/amplifier on board + the STM32F4 Discovery and the STM32 I2S DMA interface. It uses the + file player at apps/system/nxplayer. The serial console is on USART2. + + The original CS43L22 and STM32 I2S drivers were contribued by Taras + Drozdovsky in May of 2017. The audio configuration was contributed by + Alan Carvalho de Assis and derives, in part, from the work of Taras at + https://github.com/tdrozdovskiy/CS43L22-Audio-driver. + + Usage instructions from the README file at the location: + + 1. Prepare USB flash storage. This configuration depends on .WAV files + provided to the system via a USB flash stick. There are some sample + audio files at https://github.com/tdrozdovskiy/CS43L22-Audio-driver + and these steps will put those sample .WAV files onto the USB flash: + + a. Format the USB flash storage into FAT. For example by next command + + $ mkfs.vfat /dev/sdb1 + + b. Create folder /music + + $ mkdir music + + c. Copy files from /audio_samples/ to /music folder of USB flash storage + + $ cp /audio_samples/* /mnt/media/music/ + + You should be able to use either Taras' .wav files like that or, if + you like, your own compatible .wav files. + + 2. Example usage CS43L22 Audio driver + + a. Power On or reset the STM32F4 Discovery board. We can see the NuttX + command line prompt: + + NuttShell (NSH) + nsh> + + b. Mount the usb flash device into our file system + + nsh> mount -t vfat /dev/sda/ /mnt/sda + + c. Start the NxPlayer program and Enter the help command to view the list + of commands + + nsh> nxplayer + NxPlayer version 1.04 + h for commands, q to exit + nxplayer> h + NxPlayer commands + ================ + balance d% : Set balance percentage (< 50% means more left) + device devfile : Specify a preferred audio device + h : Display help for commands + help : Display help for commands + mediadir path : Change the media directory + play filename : Play a media file + pause : Pause playback + resume : Resume playback + stop : Stop playback + tone freq secs : Produce a pure tone + q : Exit NxPlayer + quit : Exit NxPlayer + volume d% : Set volume to level specified + + d. Play the test sample track (cu44k.wav - 44100Hz, 16bit, stereo). + + nxplayer> play cu44k.wav + + e. Set the volume value to 50%. + + nxplayer> volume 50 + + f. Stop the current track and play another one + + nxplayer> stop + nxplayer> play hn.wav + + cxxtest: + ------- + + The C++ standard library test at apps/testing/cxxtest configuration. This + test is used to verify the uClibc++ port to NuttX. This configuration may + be selected as follows: + + tools/configure.sh sim:cxxtest + + NOTES: + + 1. Before you can use this example, you must first install the uClibc++ + C++ library. This is located outside of the NuttX source tree in the + NuttX uClibc++ GIT repository. See the README.txt file there for + instructions on how to install uClibc++ + + 2. Ideally, you should build with a toolchain based on GLIBC or + uClibc++. It you use a toolchain based on newlib, you may see + an error like the following: + + .../lib/libsupc++.a(vterminate.o): In function `__gnu_cxx::__verbose_terminate_handler()': + vterminate.cc:(....): undefined reference to `_impure_ptr' + + Here is a quick'n'dirty fix: + + 1. Get the directory where you can find libsupc++: + + arm-none-eabi-gcc -mcpu=cortex-m4 -mthumb -print-file-name=libsupc++.a + + 2. Go to that directory and save a copy of vterminate.o (in case you + want to restore it later: + + cd + arm-none-eabi-ar.exe -x libsupc++.a vterminate.o + + 3. Then remove vterminate.o from the library. At build time, the + uClibc++ package will provide a usable replacement vterminate.o. + + Steps 2 and 3 will require root privileges on most systems (not Cygwin). + + Now NuttX should link with no problem. If you want to restore the + vterminate.o that you removed from libsupc++, you can do that with: + + arm-none-eabi-ar.exe rcs libsupc++.a vterminate.o + + 3. Exceptions are enabled and workking (CONFIG_CXX_EXCEPTION=y) + + elf: + --- + + This configuration uses apps/examples/elf in order to test the ELF + loader. + + NOTES: + + 1. Default platform/toolchain: + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on Windows + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for Windows + + 2. By default, this project assumes that you are *NOT* using the DFU + bootloader. + + 3. It appears that you cannot execute from CCM RAM. This is why the + following definition appears in the defconfig file: + + CONFIG_STM32_CCMEXCLUDE=y + + 4. This configuration requires that you have the genromfs tool installed + on your system and that you have the full path to the installed genromfs + executable in PATH variable (see apps/examples/README.txt) + + 5. This configuration can be extended to use the hello++4 example and to + build uClibc with the following additions to the configuration file + (from Leo aloe3132): + + CONFIG_C99_BOOL8=y + CONFIG_HAVE_CXXINITIALIZE=y + + CONFIG_UCLIBCXX=y + CONFIG_CXX_EXCEPTION=y + CONFIG_CXX_LIBSUPCXX=y + CONFIG_UCLIBCXX_BUFSIZE=32 + + CONFIG_EXAMPLES_ELF_CXX=y + + 6. By default, this configuration uses the ROMFS file system. It can also + be modified to use the compressed CROMFS: + + -CONFIG_PATH_INITIAL="/mnt/romfs" + +CONFIG_PATH_INITIAL="/mnt/cromfs" + + -CONFIG_FS_ROMFS=y + +CONFIG_FS_CROMFS=y + + -CONFIG_EXAMPLES_ELF_ROMFS=y + +CONFIG_EXAMPLES_ELF_CROMFS=y + + 7. The network initialization thread is enabled in this configuration. + As a result, networking initialization is performed asynchronously with + NSH bring-up. + + The network monitor is not enabled in this configuration, however, so + the firmware will not know when the network is disconnected or + reconnected. The NSH Network Monitor cannot be used with the + STM32F4DIS-BB base board because the LAN8720 is configured in REF_CLK + OUT mode. In that mode, the PHY interrupt is not supported. The NINT + pin serves as REFLCK0 in that case. + + hciuart: + ------- + + This configuration was used for test the HCI UART driver. The HCI UART + is enabled on USART3 as well as the test application at + apps/wireless/bluetoot/btsak. + + NOTES: + + 1. This configuration assumes that that you are using the STM32F4AIIT-BB + base board with serial console on USART1. If you are not using the + STM32F4AIIT, then you will want to disable support for the base + board. + + -CONFIG_STM32F4AIIT=y + +# CONFIG_STM32F4AIIT is not set + + You may also want to reconfigure the serial console to USART1. + + 2. The HCI UART is assumed to connect to the UART3 on the following pins: + + USART3 TX : PB10 + USART3 RX : PB11 + USART3 CTS: PB13 + USART3 RTS: PB14 + + The HCI UART selection can be changed by re-configuring and assigning + the different U[S]ART to the HCI. The U[S]ART pin selections can be + changed by modifying the disambiguation definitions in + boards/arm/stm32/stm32f4discovery/include/board.h + + I have been testing with the DVK_BT960_SA board via J10 as follows: + + DVK_BT860-SA J10 STM32F4 Discovery P1 + pin 1 GND P1 pin 49 + pin 2 Module_RTS_O USART3_CTS PB13, P1 pin 37 + pin 3 N/C + pin 4 Module_RX_I USART3_TXD PB10, P1 pin 34 + pin 5 Module_TX_O USART3_RX PB11, P1 pin 35 + pin 6 Module_CTS_I USART3_RTS PB14, P1 pin 38 + + NOTICE that the BT860 uses BT860-centric naming, the Rx pin is for + BT860 receive and needs to connect with the STM32 Tx pin, the Tx pin + is for BT860 transmit an needs to be connected with the STM32 Rx pin, + etc. Other parts may use host-centric naming so that the HCI UART Rx + pin connects to the STM32 Rx pin, Tx to Tx pin, etc. + + 3. Due to conflicts, USART3 many not be used if Ethernet is enabled with + the STM32F4DIS-BB base board: + + PB-11 conflicts with Ethernet TXEN + PB-13 conflicts with Ethernet TXD1 + + If you need to use the HCI uart with Ethernet, then you will need to + configure a new U[S]ART and/or modify the pin selections in + include/board.h. + + 4. Stack sizes are large and non-optimal. Don't judge memory usage + without tuning. + + 5. I tested using the Laird DVK_BT860. The BT860 defaults to 115200 + BAUD but is capable of transfers up to 4M. The documentation says + that the part supports auto baudrate detection, but I have found no + documentation on how to use that. + + Currently the "generic" HCI UART upper half is used with the BT860 + and that upper half driver supports only a fixed (but configurable + BAUD) is used and this must be set to the BT860 default (115200). + + A custom BT860 upper half driver is needed that can use vendor + specific command: Baud rate can be set with such a vendor-specific + command. Ideally, the sequence would be: (1) start at default baud + rate, (2) get local version info, (3) send the vendor-specific baud + rate change command, (4) wait for response, and (5) set the local + UART to the matching, higher baud rate. + + The custom, vendor-specific BT860 command is: + + {0x18, 0xfc, 0x06, 0x00, 0x00, NN, NN, NN, NN} + + where {NN, NN, NN, NN} is the requested baud in little endian byte order. + + If an initialization script is used then (5) then send initialization + scripts script. After sending the last command from the + initialization script, (6) reset the local UART. Finally, (7) send + vendor-specific baud rate change command, (8) wait for response, and + (9) set local UART to high baud rate. + + The command to write the initialization script into NVRAM is another + story for another time and another place. + + If you use a different HCI UART, you will need to modify this setting: + + CONFIG_BLUETOOTH_UART_GENERIC=y + + and you may have to add some support in drivers/wireless/bluetooth. + + ipv6: + ---- + This is another version of the NuttShell configuration for the + STM32F4-Discovery with the STM32F4DIS-BB base board. It is very similar + to the netnsh configuration except that it has IPv6 enabled and IPv4 + disabled. Several network utilities that are not yet available when + IPv6 is disabled. + + NOTES: + + 1. As of 2015-02-05, this configuration was identical to the netnsh + configuration other than using IPv6. So all of the notes above + regarding the netnsh configuration apply. + + a. Telnet does work with IPv6 but is not enabled in this + configuration (but could be). + b. The network initialization thread was enabled in the netnsh + configuration on 2015-09-28, but not in the ipv6 configuration. + + 2. This configuration can be modified to that both IPv4 and IPv6 + are support. Here is a summary of the additional configuration + settings required to support both IPv4 and IPv6: + + CONFIG_NET_IPv4=y + CONFIG_NET_ARP=y + CONFIG_NET_ARP_SEND=y (optional) + CONFIG_NET_ICMP=y + CONFIG_NET_ICMP_SOCKET=y + + CONFIG_NETDB_DNSCLIENT=y + CONFIG_NETUTILS_TELNETD=y + + CONFIG_NSH_IPADDR=0x0a000002 + CONFIG_NSH_DRIPADDR=0x0a000001 + CONFIG_NSH_NETMASK=0xffffff00 + CONFIG_NSH_TELNET=y + + Then from NSH, you have both ping and ping6 commands: + + nsh> ping 10.0.0.1 + nsh> ping6 fc00::1 + + And from the host you can do similar: + + ping 10.0.0.2 + ping6 fc00::2 (Linux) + ping -6 fc00::2 (Windows cmd) + + and Telnet is now enabled and works from the host... but only using + IPv6 addressing: + + telnet fc00::2 + + That is because the Telnet daemon will default to IPv6 and there is + no Telnet option to let you select which if both IPv4 and IPv6 are + enabled. + + 3. I have used this configuration to serve up IP address prefixes + in a local network with these modifications to the configuration: + + +CONFIG_NET_ICMPv6_ROUTER=y + +CONFIG_NET_ICMPv6_PREFLEN=64 + +CONFIG_NET_ICMPv6_PREFIX_1=0xfc00 + +CONFIG_NET_ICMPv6_PREFIX_2=0x0000 + +CONFIG_NET_ICMPv6_PREFIX_3=0x0000 + +CONFIG_NET_ICMPv6_PREFIX_4=0x0000 + +CONFIG_NET_ICMPv6_PREFIX_5=0x0000 + +CONFIG_NET_ICMPv6_PREFIX_6=0x0000 + +CONFIG_NET_ICMPv6_PREFIX_7=0x0000 + +CONFIG_NET_ICMPv6_PREFIX_8=0x0000 + + +CONFIG_NSH_IPv6NETMASK_5=0x0000 + -CONFIG_NSH_IPv6NETMASK_5=0xffff + + +CONFIG_NSH_IPv6NETMASK_6=0x0000 + -CONFIG_NSH_IPv6NETMASK_6=0xffff + + +CONFIG_NSH_IPv6NETMASK_7=0x0000 + -CONFIG_NSH_IPv6NETMASK_7=0xffff + + +CONFIG_NSH_IPv6NETMASK_8=0x0000 + -CONFIG_NSH_IPv6NETMASK_8=0xff80 + + kostest: + ------- + This is identical to the ostest configuration below except that NuttX + is built as a kernel-mode, monolithic module and the user applications + are built separately. Is is recommended to use a special make command; + not just 'make' but make with the following two arguments: + + make pass1 pass2 + + In the normal case (just 'make'), make will attempt to build both user- + and kernel-mode blobs more or less interleaved. This actual works! + However, for me it is very confusing so I prefer the above make command: + Make the user-space binaries first (pass1), then make the kernel-space + binaries (pass2) + + NOTES: + + 1. This is the default platform/toolchain in the configuration: + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : Cygwin environment on Windows + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for Windows + + This is easily changed by modifying the configuration. + + 2. At the end of the build, there will be several files in the top-level + NuttX build directory: + + PASS1: + nuttx_user.elf - The pass1 user-space ELF file + nuttx_user.hex - The pass1 Intel HEX format file (selected in defconfig) + User.map - Symbols in the user-space ELF file + + PASS2: + nuttx - The pass2 kernel-space ELF file + nuttx.hex - The pass2 Intel HEX file (selected in defconfig) + System.map - Symbols in the kernel-space ELF file + + 3. Combining .hex files. If you plan to use the STM32 ST-Link Utility to + load the .hex files into FLASH, then you need to combine the two hex + files into a single .hex file. Here is how you can do that. + + a. The 'tail' of the nuttx.hex file should look something like this + (with my comments added): + + $ tail nuttx.hex + # 00, data records + ... + :10 9DC0 00 01000000000800006400020100001F0004 + :10 9DD0 00 3B005A0078009700B500D400F300110151 + :08 9DE0 00 30014E016D0100008D + # 05, Start Linear Address Record + :04 0000 05 0800 0419 D2 + # 01, End Of File record + :00 0000 01 FF + + Use an editor such as vi to remove the 05 and 01 records. + + b. The 'head' of the nuttx_user.hex file should look something like + this (again with my comments added): + + $ head nuttx_user.hex + # 04, Extended Linear Address Record + :02 0000 04 0801 F1 + # 00, data records + :10 8000 00 BD89 01084C800108C8110208D01102087E + :10 8010 00 0010 00201C1000201C1000203C16002026 + :10 8020 00 4D80 01085D80010869800108ED83010829 + ... + + Nothing needs to be done here. The nuttx_user.hex file should + be fine. + + c. Combine the edited nuttx.hex and un-edited nuttx_user.hex + file to produce a single combined hex file: + + $ cat nuttx.hex nuttx_user.hex >combined.hex + + Then use the combined.hex file with the STM32 ST-Link tool. If + you do this a lot, you will probably want to invest a little time + to develop a tool to automate these steps. + + module: + ------ + + A simple stripped down NSH configuration that was used for testing NuttX + OS modules using the test at apps/examples/module. Key difference from + other NSH configurations include these additions to the configuration file: + + CONFIG_BOARDCTL_OS_SYMTAB=y + CONFIG_EXAMPLES_MODULE=y + CONFIG_EXAMPLES_MODULE_BUILTINFS=y + CONFIG_EXAMPLES_MODULE_DEVMINOR=0 + CONFIG_EXAMPLES_MODULE_DEVPATH="/dev/ram0" + CONFIG_FS_ROMFS=y + CONFIG_LIBC_ARCH_ELF=y + CONFIG_MODULE=y + CONFIG_LIBC_MODLIB=y + CONFIG_MODLIB_MAXDEPEND=2 + CONFIG_MODLIB_ALIGN_LOG2=2 + CONFIG_MODLIB_BUFFERSIZE=128 + CONFIG_MODLIB_BUFFERINCR=32 + + The could be followed may be added for testing shared libraries in the + FLAT build using apps/examples/sotest (assuming that you also have SD + card support enabled and that the SD card is mount at /mnt/sdcard): + + CONFIG_LIBC_DLFCN=y + CONFIG_EXAMPLES_SOTEST=y + CONFIG_EXAMPLES_SOTEST_BINDIR="/mnt/sdcard" + + NOTE: You must always have: + + CONFIG_STM32_CCMEXCLUDE=y + + because code cannot be executed from CCM memory. + + STATUS: + 2018-06-02: Configuration added by Alan Carvalho de Assis. + + netnsh: + ------ + This is a special version of the NuttShell (nsh) configuration that is + tailored to work with the STM32F4DIS-BB base board. This version + derives from nsh configuration so all of the notes apply there except as + noted below. + + NOTES: + + 1. This example uses USART6 for the serial console. The STM32F4DIS-BB + provides RS-232 drivers for USART6 and allows access via the DB9 + connector on the base board. USART6 is, therefore, the more + convenient UART to use for the serial console. + + 2. Networking is enabled. The STM32F4DIS-BB has an SMC LAN2870 PHY + and RJ5 network connector. Support is enabled for ICMP, TCP/IP, + UDP, and ARP. + + 3. SD card support is enabled. The STM32F4DIS-BB has an on-board + microSD slot that should be automatically registered as the block + device /dev/mmcsd0 when an SD card is present. The SD card can + then be mounted by the NSH command: + + nsh> mount -t /dev/mmcsd0 /mnt/sdcard + + 4. CCM memory is not included in the heap in this configuration. That + is because the SD card uses DMA and if DMA memory is allocated from + the CCM memory, the DMA will failure. This is an STM32 hardware + limitation. + + If you want to get the CCM memory back in the heap, then you can + + a) Disable microSD support (and DMAC2 which is then no longer + needed). If you reduce the clocking by a huge amount, it might + be possible to use microSD without DMA. This, however, may + not be possible. + b) Develop a strategy to manage CCM memory and DMA memory. Look + at this discussion on the NuttX Wiki: + https://cwiki.apache.org/confluence/display/NUTTX/STM32+CCM+Allocator + + To put the CCM memory back into the heap you would need to change + the following in the NuttX configuration: + + CONFIG_STM32_CCMEXCLUDE=n : Don't exclude CCM memory from the heap + CONFIG_MM_REGIONS=2 : With CCM, there will be two memory regions + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. The + Configuration enables the serial interfaces on USART2. Support for + builtin applications is enabled, but in the base configuration no + builtin applications are selected (see NOTES below). + + NOTES: + + 1. By default, this configuration uses the ARM EABI toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for Windows + + 2. To use this configuration with the STM32F4DIS-BB baseboard you + should: + + - Select the STM32F4DIS-BB baseboard in the board configuration + menu + - Disable USART2 and select USART6 in the STM32 peripheral selection + menu + - Select USART6 as the serial console at 115200 8N1 in the + Drivers menus + + 3. This example supports the PWM test (apps/examples/pwm) but this must + be manually enabled by selecting: + + CONFIG_PWM=y : Enable the generic PWM infrastructure + CONFIG_STM32_TIM4=y : Enable TIM4 + CONFIG_STM32_TIM4_PWM=y : Use TIM4 to generate PWM output + + See also apps/examples/README.txt + + Special PWM-only debug options: + + CONFIG_DEBUG_PWM_INFO + + 4. This example supports the Quadrature Encode test (apps/examples/qencoder) + but this must be manually enabled by selecting: + + CONFIG_EXAMPLES_QENCODER=y : Enable the apps/examples/qencoder + CONFIG_SENSORS=y : Enable support for sensors + CONFIG_SENSORS_QENCODER=y : Enable the generic Quadrature Encoder infrastructure + CONFIG_STM32_TIM8=y : Enable TIM8 + CONFIG_STM32_TIM2=n : (Or optionally TIM2) + CONFIG_STM32_TIM8_QE=y : Use TIM8 as the quadrature encoder + CONFIG_STM32_TIM2_QE=y : (Or optionally TIM2) + + See also apps/examples/README.tx. Special debug options: + + CONFIG_DEBUG_SENSORS + + 5. This example supports the watchdog timer test (apps/examples/watchdog) + but this must be manually enabled by selecting: + + CONFIG_EXAMPLES_WATCHDOG=y : Enable the apps/examples/watchdog + CONFIG_WATCHDOG=y : Enables watchdog timer driver support + CONFIG_STM32_WWDG=y : Enables the WWDG timer facility, OR + CONFIG_STM32_IWDG=y : Enables the IWDG timer facility (but not both) + + The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result, + has a maximum timeout value of 49 milliseconds. For WWDG watchdog, you + should also add the following to the configuration file: + + CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20 + CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49 + + The IWDG timer has a range of about 35 seconds and should not be an issue. + + 6. USB Support (CDC/ACM device) + + CONFIG_STM32_OTGFS=y : STM32 OTG FS support + CONFIG_USBDEV=y : USB device support must be enabled + CONFIG_CDCACM=y : The CDC/ACM driver must be built + CONFIG_NSH_BUILTIN_APPS=y : NSH built-in application support must be enabled + CONFIG_NSH_ARCHINIT=y : To perform USB initialization + + 7. Using the USB console. + + The STM32F4Discovery NSH configuration can be set up to use a USB CDC/ACM + (or PL2303) USB console. The normal way that you would configure the + the USB console would be to change the .config file like this: + + CONFIG_STM32_OTGFS=y : STM32 OTG FS support + CONFIG_USART2_SERIAL_CONSOLE=n : Disable the USART2 console + CONFIG_DEV_CONSOLE=n : Inhibit use of /dev/console by other logic + CONFIG_USBDEV=y : USB device support must be enabled + CONFIG_CDCACM=y : The CDC/ACM driver must be built + CONFIG_CDCACM_CONSOLE=y : Enable the CDC/ACM USB console. + + NOTE: When you first start the USB console, you have hit ENTER a few + times before NSH starts. The logic does this to prevent sending USB data + before there is anything on the host side listening for USB serial input. + + 8. Here is an alternative USB console configuration. The following + configuration will also create a NSH USB console but this version + will use /dev/console. Instead, it will use the normal /dev/ttyACM0 + USB serial device for the console: + + CONFIG_STM32_OTGFS=y : STM32 OTG FS support + CONFIG_USART2_SERIAL_CONSOLE=y : Keep the USART2 console + CONFIG_DEV_CONSOLE=y : /dev/console exists (but NSH won't use it) + CONFIG_USBDEV=y : USB device support must be enabled + CONFIG_CDCACM=y : The CDC/ACM driver must be built + CONFIG_CDCACM_CONSOLE=n : Don't use the CDC/ACM USB console. + CONFIG_NSH_USBCONSOLE=y : Instead use some other USB device for the console + + The particular USB device that is used is: + + CONFIG_NSH_USBCONDEV="/dev/ttyACM0" + + The advantage of this configuration is only that it is easier to + bet working. This alternative does has some side effects: + + - When any other device other than /dev/console is used for a user + interface, linefeeds (\n) will not be expanded to carriage return / + linefeeds (\r\n). You will need to set your terminal program to account + for this. + + - /dev/console still exists and still refers to the serial port. So + you can still use certain kinds of debug output (see include/debug.h, all + of the debug output from interrupt handlers will be lost. + + - But don't enable USB debug output! Since USB is console is used for + USB debug output and you are using a USB console, there will be + infinite loops and deadlocks: Debug output generates USB debug + output which generatates USB debug output, etc. If you want USB + debug output, you should consider enabling USB trace + (CONFIG_USBDEV_TRACE) and perhaps the USB monitor (CONFIG_USBMONITOR). + + See the usbnsh configuration below for more information on configuring + USB trace output and the USB monitor. + + 9. USB OTG FS Host Support. The following changes will enable support for + a USB host on the STM32F4Discovery, including support for a mass storage + class driver: + + Device Drivers -> + CONFIG_USBDEV=n : Make sure the USB device support is disabled + CONFIG_USBHOST=y : Enable USB host support + CONFIG_USBHOST_ISOC_DISABLE=y + + Device Drivers -> USB Host Driver Support + CONFIG_USBHOST_MSC=y : Enable the mass storage class + + System Type -> STM32 Peripheral Support + CONFIG_STM32_OTGFS=y : Enable the STM32 USB OTG FS block + CONFIG_STM32_SYSCFG=y : Needed for all USB OTF FS support + + RTOS Features -> Work Queue Support + CONFIG_SCHED_WORKQUEUE=y : High priority worker thread support is required + CONFIG_SCHED_HPWORK=y : for the mass storage class driver. + + File Systems -> + CONFIG_FS_FAT=y : Needed by the USB host mass storage class. + + Board Selection -> + CONFIG_LIB_BOARDCTL=y : Needed for CONFIG_NSH_ARCHINIT + + Application Configuration -> NSH Library + CONFIG_NSH_ARCHINIT=y : Architecture specific USB initialization + : is needed for NSH + + With those changes, you can use NSH with a FLASH pen driver as shown + belong. Here NSH is started with nothing in the USB host slot: + + NuttShell (NSH) NuttX-x.yy + nsh> ls /dev + /dev: + console + null + ttyS0 + + After inserting the FLASH drive, the /dev/sda appears and can be + mounted like this: + + nsh> ls /dev + /dev: + console + null + sda + ttyS0 + nsh> mount -t vfat /dev/sda /mnt/stuff + nsh> ls /mnt/stuff + /mnt/stuff: + -rw-rw-rw- 16236 filea.c + + And files on the FLASH can be manipulated to standard interfaces: + + nsh> echo "This is a test" >/mnt/stuff/atest.txt + nsh> ls /mnt/stuff + /mnt/stuff: + -rw-rw-rw- 16236 filea.c + -rw-rw-rw- 16 atest.txt + nsh> cat /mnt/stuff/atest.txt + This is a test + nsh> cp /mnt/stuff/filea.c fileb.c + nsh> ls /mnt/stuff + /mnt/stuff: + -rw-rw-rw- 16236 filea.c + -rw-rw-rw- 16 atest.txt + -rw-rw-rw- 16236 fileb.c + + To prevent data loss, don't forget to un-mount the FLASH drive + before removing it: + + nsh> umount /mnt/stuff + + 10. I used this configuration to test the USB hub class. I did this + testing with the following changes to the configuration (in addition + to those listed above for base USB host/mass storage class support): + + Drivers -> USB Host Driver Support + CONFIG_USBHOST_HUB=y : Enable the hub class + CONFIG_USBHOST_ASYNCH=y : Asynchronous I/O supported needed for hubs + + System Type -> USB host configuration + To be determined + + Board Selection -> + CONFIG_STM32F4DISCO_USBHOST_STACKSIZE=2048 (bigger than it needs to be) + + RTOS Features -> Work Queue Support + CONFIG_SCHED_LPWORK=y : Low priority queue support is needed + CONFIG_SCHED_LPNTHREADS=1 + CONFIG_SCHED_LPWORKSTACKSIZE=1024 + + NOTES: + + 1. It is necessary to perform work on the low-priority work queue + (vs. the high priority work queue) because deferred hub-related + work requires some delays and waiting that is not appropriate on + the high priority work queue. + + 2. Stack usage make increase when USB hub support is enabled because + the nesting depth of certain USB host class logic can increase. + + STATUS: + 2015-04-30 + Appears to be fully functional. + + 11. Using USB Device as a Mass Storage for the host computer: + + System Type ---> + STM32 Peripheral Support ---> + [*] OTG FS + + Device Drivers ---> + [*] USB Device Driver Support ---> + [*] USB Mass storage class device ---> + [*] Mass storage removable + + [*] RAM Disk Support + + Board Selection ---> + [*] Enable boardctl() interface + [*] Enable USB device controls + + File Systems ---> + [*] FAT file system + [*] FAT upper/lower names + [*] FAT long file names + + [*] PROCFS File System + + Application Configuration ---> + System Libraries and NSH Add-Ons ---> + [*] USB Mass Storage Device Commands ---> + (/dev/ram0) LUN1 Device Path + + Compile and flash the firmware in the board as usual, then in the nsh: + + nsh> mkrd -m 0 -s 512 64 + + nsh> ls /dev + /dev: + console + null + ram0 + ttyS0 + + nsh> mkfatfs /dev/ram0 + + Connect a USB cable to STM32F4Discovery board (connector CN5) and run: + + nsh> msconn + mcsonn_main: Creating block drivers + mcsonn_main: Configuring with NLUNS=1 + mcsonn_main: handle=1000a550 + mcsonn_main: Bind LUN=0 to /dev/ram0 + mcsonn_main: Connected + + In this moment a 33KB disk should appear in your host computer. If you + saved some file on this small disk you can now run disconnect command: + + nsh> msdis + msdis: Disconnected + + Remove the USB cable from microUSB connector and run: + + nsh> mount -t vfat /dev/ram0 /mnt + + nsh> ls /mnt + /mnt: + TEST.TXT + + nsh> cat /mnt/TEST.TXT + Testing + + nxlines: + ------ + An example using the NuttX graphics system (NX). This example focuses on + placing lines on the background in various orientations. + + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for Windows + CONFIG_LCD_LANDSCAPE=y : 320x240 landscape orientation + + The STM32F4Discovery board does not have any graphics capability. This + configuration assumes that you have connected an SD1289-based LCD as + described above under "SSD1289". NOTE: At present, it has not been + proven that the STM32F4Discovery can actually drive an LCD. There are + some issues with how some of the dedicated FSMC pins are used on the + boards. This configuration may not be useful and may only serve as + an illustration of how to build for th SSD1289 LCD. + + NOTES: + + 1. As of this writing, I have not seen the LCD work! + + 2. This configured can be re-configured to use either the + UG-2864AMBAG01 or UG-2864HSWEG01 0.96 inch OLEDs by adding + or changing the following items in the configuration (using + 'make menuconfig'): + + +CONFIG_SPI_CMDDATA=y + + -CONFIG_LCD_MAXCONTRAST=1 + -CONFIG_LCD_MAXPOWER=255 + +CONFIG_LCD_MAXCONTRAST=255 + +CONFIG_LCD_MAXPOWER=1 + + -CONFIG_LCD_SSD1289=y + -CONFIG_SSD1289_PROFILE1=y + +CONFIG_LCD_UG2864AMBAG01=y : For the UG-2964AMBAG01 + +CONFIG_UG2864AMBAG01_SPIMODE=3 + +CONFIG_UG2864AMBAG01_FREQUENCY=3500000 + +CONFIG_UG2864AMBAG01_NINTERFACES=1 + + -CONFIG_NX_DISABLE_1BPP=y + +CONFIG_NX_DISABLE_16BPP=y + +CONFIG_NXSTART_EXTERNINIT=y + + -CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x0320 + -CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16 + -CONFIG_EXAMPLES_NXLINES_LINECOLOR=0xffe0 + -CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4 + -CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xffe0 + -CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0xf7bb + -CONFIG_EXAMPLES_NXLINES_BPP=16 + +CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x00 + +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=4 + +CONFIG_EXAMPLES_NXLINES_LINECOLOR=0x01 + +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=2 + +CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0x01 + +CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0x00 + +CONFIG_EXAMPLES_NXLINES_BPP=1 + +CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y + + There are some issues with the presentation... some tuning of the + configuration could fix that. Lower resolution displays are also more + subject to the "fat, flat line bug" that I need to fix someday. See + https://cwiki.apache.org/confluence/pages/viewpage.action?pageId=139629474 + for a description of the fat, flat line bug. + + pm: + -- + This is a configuration that is used to test STM32 power management, i.e., + to test that the board can go into lower and lower states of power usage + as a result of inactivity. This configuration is based on the nsh2 + configuration with modifications for testing power management. This + configuration should provide some guidelines for power management in your + STM32 application. + + NOTES: + + 1. Default configuration is Cygwin under windows using the AM EABI GCC + toolchain: + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_CYGWIN=y : Cygwin + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for Windows + + 2. CONFIG_ARCH_CUSTOM_PMINIT and CONFIG_ARCH_IDLE_CUSTOM are necessary + parts of the PM configuration: + + CONFIG_ARCH_CUSTOM_PMINIT=y + + CONFIG_ARCH_CUSTOM_PMINIT moves the PM initialization from + arch/arm/src/stm32/stm32_pminitialiaze.c to boards/arm/stm32/stm3210-eval/src/stm32_pm.c. + This allows us to support board-specific PM initialization. + + CONFIG_ARCH_IDLE_CUSTOM=y + + The bulk of the PM activities occur in the IDLE loop. The IDLE loop + is special because it is what runs when there is no other task running. + Therefore when the IDLE executes, we can be assure that nothing else + is going on; this is the ideal condition for doing reduced power + management. + + The configuration CONFIG_ARCH_IDLE_CUSTOM allows us to "steal" the + normal STM32 IDLE loop (of arch/arm/src/stm32/stm32_idle.c) and replace + this with our own custom IDLE loop (at boards/arm/stm32/stm3210-eval/src/up_idle.c). + + 3. Here are some additional things to note in the configuration: + + CONFIG_PM_BUTTONS=y + + CONFIG_PM_BUTTONS enables button support for PM testing. Buttons can + drive EXTI interrupts and EXTI interrupts can be used to wakeup for + certain reduced power modes (STOP mode). The use of the buttons here + is for PM testing purposes only; buttons would normally be part the + application code and CONFIG_PM_BUTTONS would not be defined. + + CONFIG_RTC_ALARM=y + + The RTC alarm is used to wake up from STOP mode and to transition to + STANDBY mode. This used of the RTC alarm could conflict with other + uses of the RTC alarm in your application. + + posix_spawn: + ------------ + This configuration directory, performs a simple test os the posix_spawn + interface using apps/examples/posix_spawn. + + NOTES: + + 1. Default toolchain: + + CONFIG_HOST_WINDOWS=y : Builds under windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin and + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : Generic ARM EABI toolchain for Windows + + 2. By default, this project assumes that you are *NOT* using the DFU + bootloader. + + pseudoterm: + ----------- + + This is a configuration to test the Pseudo Terminal support for NuttX. + + To test it you will need two USB/Serial dongles. The first dongle as + usual will be used to main NSH console port in USART2 (PA2 and PA3) and + the second dongle you will connect to UART3 (PB10 and PB11). + + In the main NSH console (in USART2) type: "pts_test &". It will create a + new console in UART3. Just press ENTER and start typing commands on it. + + sporadic + -------- + + This is an NSH configuration that includes apps/testing/ostest as a builtin. + The sporadic scheduler is enabled and the purpose of this configuration is + to investigate an error in that scheduler. See Issue 2035. The serial + console is on USART6. + + testlibcxx + ---------- + + This is a configuration for testing lib++. See the section above entitled + "Testing LLVM LIBC++ with NuttX" for detailed information about this + configuration. + + rgbled: + ------- + + Alan Carvalho de Assis has used the STM32F4-Discovery to drive an RGB LED + using PWM output. The external RGB connected this way: + + R = TIM1 CH1 on PE9 + G = TIM2 CH2 on PA1 + B = TIM3 CH3 on PB0 + + as described about in the section "RGB LED Driver". + + This configuration uses the example at apps/examples/rgbled to drive the + external RGB LED> + + rndis: + ------ + + This is a board configuration to demonstrate how to use Ethernet-over-USB, + in this case using the RNDIS protocol. Using it you can get access to your + board using Telnet or you can use transfer file to it. Both steps will be + explained below. + + Your board will be get IP address from a DHCP server. If you want to use a + fixed IP instead using DHCP, you need to disable the DHCP Client and set + up its IP. For more info watch: www.youtube.com/watch?v=8noH8v7xNgs + + You can access the board's NuttShell just typing in the Linux terminal: + + $ telnet 10.0.0.2 + + You should see something like this: + + Trying 10.0.0.2... + Connected to 10.0.0.2. + Escape character is '^]'. + + NuttShell (NSH) + nsh> + + This board configuration has support to RAMDISK because we need a writable + filesystem to get files from the computer. Then you need to create first a + RAMDISK and mount it using these steps: + + nsh> mkrd 64 + nsh> mkfatfs /dev/ram0 + nsh> mount -t vfat /dev/ram0 /mnt + + Open a new Linux terminal and start a webserver, Python one embedded: + + $ python -m SimpleHTTPServer + + It will create a webserver serving in the port 8000 and will share files + in the current directory where it was executed. + + Then in the NuttShell you can run these commands to download a small file: + + nsh> cd /mnt + nsh> wget http://10.0.0.1:8000/test.txt + nsh> ls -l + /mnt: + -rw-rw-rw- 23 test.txt + + This configuration also supports: + + 1. An NFS file system client. Relevant configuration options: + + CONFIG_NFS=y + CONFIG_NFS_STATISTICS=y + + 2. Loadable ELF modules + + CONFIG_SYMTAB_ORDEREDBYNAME=y + CONFIG_ELF=y + CONFIG_EXAMPLES_HELLO=m + CONFIG_LIBC_EXECFUNCS=y + CONFIG_NSH_FILE_APPS=y + CONFIG_SYSTEM_NSH_SYMTAB=y + CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab" + CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols" + + Further, the configuration assumes that executable files reside on the + remotely mounted file system: + + CONFIG_LIB_ENVPATH=y + CONFIG_PATH_INITIAL="/mnt/nfs/bin" + + 3 'ping' support + + CONFIG_NET_ICMP_SOCKET=y + CONFIG_SYSTEM_PING=y + + usbnsh: + ------- + + This is another NSH example. If differs from other 'nsh' configurations + in that this configurations uses a USB serial device for console I/O. + Such a configuration is useful on the stm32f4discovery which has no + builtin RS-232 drivers. + + NOTES: + + 1. By default, this configuration uses the ARM EABI toolchain + for Windows and builds under Cygwin (or probably MSYS). That + can easily be reconfigured, of course. + + CONFIG_HOST_WINDOWS=y : Builds under Windows + CONFIG_WINDOWS_CYGWIN=y : Using Cygwin + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for Windows + + 2. This configuration does have USART2 output enabled and set up as + the system logging device: + + CONFIG_SYSLOG_CHAR=y : Use a character device for system logging + CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : USART2 will be /dev/ttyS0 + + However, there is nothing to generate SYSLOG output in the default + configuration so nothing should appear on USART2 unless you enable + some debug output or enable the USB monitor. + + NOTE: Using the SYSLOG to get debug output has limitations. Among + those are that you cannot get debug output from interrupt handlers. + So, in particularly, debug output is not a useful way to debug the + USB device controller driver. Instead, use the USB monitor with + USB debug off and USB trace on (see below). + + 3. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB + device will save encoded trace output in in-memory buffer; if the + USB monitor is enabled, that trace buffer will be periodically + emptied and dumped to the system logging device (USART2 in this + configuration): + + CONFIG_USBDEV_TRACE=y : Enable USB trace feature + CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory + CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH + CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor + CONFIG_USBMONITOR=y : Enable the USB monitor daemon + CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size + CONFIG_USBMONITOR_PRIORITY=50 : USB monitor daemon priority + CONFIG_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds + + CONFIG_USBMONITOR_TRACEINIT=y : Enable TRACE output + CONFIG_USBMONITOR_TRACECLASS=y + CONFIG_USBMONITOR_TRACETRANSFERS=y + CONFIG_USBMONITOR_TRACECONTROLLER=y + CONFIG_USBMONITOR_TRACEINTERRUPTS=y + + 4. By default, this project assumes that you are *NOT* using the DFU + bootloader. + + Using the Prolifics PL2303 Emulation + ------------------------------------ + You could also use the non-standard PL2303 serial device instead of + the standard CDC/ACM serial device by changing: + + CONFIG_CDCACM=n : Disable the CDC/ACM serial device class + CONFIG_CDCACM_CONSOLE=n : The CDC/ACM serial device is NOT the console + CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled + CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console + + winbuild: + -------- + + This is a version of the apps/example/ostest, but configure to build natively + in the Windows CMD shell. + + NOTES: + + 1. The beginnings of a Windows native build are in place but still not full + usable as of this writing. The windows native build logic is currently + separate and must be started by: + + make -f Makefile.win + + This build: + + - Uses all Windows style paths + - Uses primarily Windows batch commands from cmd.exe, with + - A few extensions from GNUWin32 (or MSYS is you prefer) + + In this build, you cannot use a Cygwin or MSYS shell. Rather the build must + be performed in a Windows console. Here is a better shell than than the + standard issue, CMD.exe shell: ConEmu which can be downloaded from: + http://code.google.com/p/conemu-maximus5/ + + CONFIG_HOST_WINDOWS=y : Windows + CONFIG_WINDOWS_NATIVE=y : Native Windows environment + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for Windows + + Build Tools. The build still relies on some Unix-like commands. I use + the GNUWin32 tools that can be downloaded from http://gnuwin32.sourceforge.net/. + The MSYS tools are probably also a option but are likely lower performance + since they are based on Cygwin 1.3. + + Host Compiler: I use the MingGW compiler which can be downloaded from + http://www.mingw.org/. If you are using GNUWin32, then it is recommended + the you not install the optional MSYS components as there may be conflicts. diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/adb/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/adb/defconfig new file mode 100755 index 000000000..a10376acc --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/adb/defconfig @@ -0,0 +1,87 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ADBD_FILE_SERVICE=y +CONFIG_ADBD_SHELL_SERVICE=y +CONFIG_ADBD_USB_SERVER=y +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="aiit-arm32-board" +CONFIG_ARCH_BOARD_STM32F4_AIIT=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARDCTL_USBDEVCTRL=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_CLOCK_MONOTONIC=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEV_FIFO_SIZE=128 +CONFIG_DEV_PIPE_MAXSIZE=128 +CONFIG_DEV_PIPE_SIZE=128 +CONFIG_DEV_URANDOM=y +CONFIG_ELF=y +CONFIG_EXAMPLES_HELLO=m +CONFIG_FAT_LFN=y +CONFIG_FS_FAT=y +CONFIG_FS_FATTIME=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_EXECFUNCS=y +CONFIG_LIBUV=y +CONFIG_LIBUV_PIPE=y +CONFIG_LIBUV_STREAM=y +CONFIG_LIB_ENVPATH=y +CONFIG_MAX_TASKS=16 +CONFIG_MMCSD=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_FILE_APPS=y +CONFIG_NSH_LINELEN=128 +CONFIG_NSH_READLINE=y +CONFIG_PATH_INITIAL="/mnt/sd0/bin" +CONFIG_PIPES=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SENSORS=y +CONFIG_STACK_COLORATION=y +CONFIG_START_DAY=17 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2020 +CONFIG_STM32_DMA2=y +CONFIG_STM32_DMACAPABLE=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_OTGFS=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI2=y +CONFIG_STM32_USART2=y +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_SYSTEM_ADBD=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_NSH_SYMTAB=y +CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab" +CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols" +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USBADB=y +CONFIG_USBDEV=y +CONFIG_USERMAIN_STACKSIZE=3072 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/audio/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/audio/defconfig new file mode 100755 index 000000000..e2dbade93 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/audio/defconfig @@ -0,0 +1,79 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="aiit-arm32-board" +CONFIG_ARCH_BOARD_STM32F4_AIIT=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_AUDIO=y +CONFIG_AUDIO_CS43L22=y +CONFIG_AUDIO_CUSTOM_DEV_PATH=y +CONFIG_AUDIO_EXCLUDE_TONE=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_DRIVERS_AUDIO=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FS_FAT=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_I2C=y +CONFIG_I2C_DRIVER=y +CONFIG_I2C_POLLED=y +CONFIG_I2C_RESET=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/mnt/music" +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32_DMA1=y +CONFIG_STM32_DMACAPABLE=y +CONFIG_STM32_I2C1=y +CONFIG_STM32_I2S3=y +CONFIG_STM32_I2S3_TX=y +CONFIG_STM32_I2S_MCK=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_OTGFS=y +CONFIG_STM32_OTGFS_SOFINTR=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_SPI3=y +CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_USART2=y +CONFIG_STM32_USBHOST=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_NXPLAYER=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USBHOST_ISOC_DISABLE=y +CONFIG_USBHOST_MSC=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/canard/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/canard/defconfig new file mode 100755 index 000000000..174e9e209 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/canard/defconfig @@ -0,0 +1,57 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_CANUTILS_LIBCANARD=y +CONFIG_CAN_EXTID=y +CONFIG_CLOCK_MONOTONIC=y +CONFIG_EXAMPLES_LIBCANARD=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32_CAN1=y +CONFIG_STM32_CAN1_BAUD=500000 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_TIME64=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/cxxtest/Make.defs b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/cxxtest/Make.defs new file mode 100755 index 000000000..2038d5efa --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/cxxtest/Make.defs @@ -0,0 +1,66 @@ +############################################################################ +# boards/arm/stm32/stm32f4discovery/configs/cxxtest/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk +include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script +ifeq ($(CONFIG_CYGWIN_WINTOOL),y) + ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ifeq ($(CONFIG_CXX_EXCEPTION),y) + ARCHCPUFLAGSXX = -fno-builtin +else + ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new +endif +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +AFLAGS := $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/cxxtest/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/cxxtest/defconfig new file mode 100755 index 000000000..3cf7926a8 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/cxxtest/defconfig @@ -0,0 +1,45 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="aiit-arm32-board" +CONFIG_ARCH_BOARD_STM32F4_AIIT=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_C99_BOOL8=y +CONFIG_DISABLE_ENVIRON=y +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_HAVE_CXX=y +CONFIG_HOST_WINDOWS=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBM=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=4 +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=2 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2012 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_USART2=y +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_TESTING_CXXTEST=y +CONFIG_UCLIBCXX=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="cxxtest_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/elf/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/elf/defconfig new file mode 100755 index 000000000..fde912cf9 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/elf/defconfig @@ -0,0 +1,46 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_BINFMT_CONSTRUCTORS=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_CONSOLE_SYSLOG=y +CONFIG_ELF=y +CONFIG_ELF_STACKSIZE=4096 +CONFIG_EXAMPLES_ELF=y +CONFIG_FS_ROMFS=y +CONFIG_HAVE_CXX=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LIB_ENVPATH=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_PATH_INITIAL="/mnt/romfs" +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_STARTHOOK=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=26 +CONFIG_START_MONTH=10 +CONFIG_START_YEAR=2012 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_USART2=y +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_USER_ENTRYPOINT="elf_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/hciuart/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/hciuart/defconfig new file mode 100755 index 000000000..c2cb83585 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/hciuart/defconfig @@ -0,0 +1,79 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NET_ETHERNET is not set +# CONFIG_NET_IPv4 is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +# CONFIG_NSH_NETINIT is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="aiit-arm32-board" +CONFIG_ARCH_BOARD_STM32F4_AIIT=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_STACKDUMP=y +CONFIG_BLUETOOTH_MAX_CONN=2 +CONFIG_BLUETOOTH_MAX_PAIRED=2 +CONFIG_BLUETOOTH_UART=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BTSAK=y +CONFIG_BUILTIN=y +CONFIG_DRIVERS_BLUETOOTH=y +CONFIG_DRIVERS_WIRELESS=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INTELHEX_BINARY=y +CONFIG_IOB_BUFSIZE=80 +CONFIG_IOB_NBUFFERS=64 +CONFIG_IOB_NCHAINS=16 +CONFIG_IOB_THROTTLE=16 +CONFIG_LIB_HOSTNAME="STM32F4-Discovery" +CONFIG_MAX_TASKS=16 +CONFIG_NET=y +CONFIG_NETDEVICES=y +CONFIG_NETDEV_LATEINIT=y +CONFIG_NETDEV_PHY_IOCTL=y +CONFIG_NET_BLUETOOTH=y +CONFIG_NET_SOCKOPTS=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_MQ_MSGS=64 +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=13 +CONFIG_START_MONTH=9 +CONFIG_START_YEAR=2014 +CONFIG_STM32F4AIIT=y +CONFIG_STM32_DMA2=y +CONFIG_STM32_DMACAPABLE=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART3=y +CONFIG_STM32_USART3_HCIUART=y +CONFIG_STM32_USART6=y +CONFIG_SYSTEM_NSH=y +CONFIG_USART6_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_WIRELESS=y +CONFIG_WIRELESS_BLUETOOTH=y diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/ipv6/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/ipv6/defconfig new file mode 100755 index 000000000..ff51b8613 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/ipv6/defconfig @@ -0,0 +1,93 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_SPI is not set +# CONFIG_NET_IPv4 is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="aiit-arm32-board" +CONFIG_ARCH_BOARD_STM32F4_AIIT=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_ETH0_PHY_LAN8720=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FS_FAT=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_HOST_WINDOWS=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LIB_HOSTNAME="STM32F4-Discovery" +CONFIG_MAX_TASKS=16 +CONFIG_MMCSD=y +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +CONFIG_MMCSD_SDIO=y +CONFIG_NET=y +CONFIG_NETINIT_IPv6NETMASK_8=0xff80 +CONFIG_NETINIT_NOMAC=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMPv6=y +CONFIG_NET_ICMPv6_NEIGHBOR=y +CONFIG_NET_ICMPv6_SOCKET=y +CONFIG_NET_IPv6=y +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_SOLINGER=y +CONFIG_NET_TCP=y +CONFIG_NET_TCPBACKLOG=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_UDP=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=13 +CONFIG_START_MONTH=9 +CONFIG_START_YEAR=2014 +CONFIG_STM32F4AIIT=y +CONFIG_STM32_DMA2=y +CONFIG_STM32_DMACAPABLE=y +CONFIG_STM32_ETHMAC=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PHYADDR=0 +CONFIG_STM32_PHYSR=31 +CONFIG_STM32_PHYSR_100FD=0x0018 +CONFIG_STM32_PHYSR_100HD=0x0008 +CONFIG_STM32_PHYSR_10FD=0x0014 +CONFIG_STM32_PHYSR_10HD=0x0004 +CONFIG_STM32_PHYSR_ALTCONFIG=y +CONFIG_STM32_PHYSR_ALTMODE=0x001c +CONFIG_STM32_PWR=y +CONFIG_STM32_RMII_EXTCLK=y +CONFIG_STM32_SDIO=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART6=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_PING6=y +CONFIG_USART6_RXBUFSIZE=64 +CONFIG_USART6_SERIAL_CONSOLE=y +CONFIG_USART6_TXBUFSIZE=64 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/kostest/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/kostest/defconfig new file mode 100755 index 000000000..627462d8e --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/kostest/defconfig @@ -0,0 +1,49 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARM_MPU=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILD_PROTECTED=y +CONFIG_CONSOLE_SYSLOG=y +CONFIG_DISABLE_ENVIRON=y +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_HOST_WINDOWS=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NUTTX_USERSPACE=0x08020000 +CONFIG_PASS1_BUILDIR="boards/arm/stm32/stm32f4discovery/kernel" +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=22 +CONFIG_START_MONTH=3 +CONFIG_START_YEAR=2013 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_USART2=y +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_SYS_RESERVED=8 +CONFIG_TESTING_OSTEST=y +CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3 +CONFIG_TESTING_OSTEST_STACKSIZE=2048 +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="ostest_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/lcd1602/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/lcd1602/defconfig new file mode 100755 index 000000000..e9ba8a074 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/lcd1602/defconfig @@ -0,0 +1,58 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_EXAMPLES_SLCD=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_I2C=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LCD_BACKPACK=y +CONFIG_LCD_LCD1602=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SLCD=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32_I2C1=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/lwl/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/lwl/defconfig new file mode 100755 index 000000000..6eb7d6606 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/lwl/defconfig @@ -0,0 +1,50 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LWL_CONSOLE=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_STANDARD_SERIAL=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_SYSTEM_NSH=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/max31855/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/max31855/defconfig new file mode 100755 index 000000000..4c2bc69bf --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/max31855/defconfig @@ -0,0 +1,56 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_EXAMPLES_MAX31855=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_HOST_WINDOWS=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SENSORS=y +CONFIG_SENSORS_MAX31855=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_SPI2=y +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/max7219/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/max7219/defconfig new file mode 100755 index 000000000..daa86a751 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/max7219/defconfig @@ -0,0 +1,86 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_DISABLE_OS_API is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_NSH_DISABLEBG is not set +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +# CONFIG_NX_DISABLE_1BPP is not set +# CONFIG_NX_WRITEONLY is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_DEFAULT_SMALL=y +CONFIG_EXAMPLES_NXHELLO=y +CONFIG_EXAMPLES_NXHELLO_BPP=1 +CONFIG_EXAMPLES_NXHELLO_LISTENER_STACKSIZE=1536 +CONFIG_EXAMPLES_NXHELLO_STACKSIZE=1536 +CONFIG_FS_PROCFS=y +CONFIG_LCD=y +CONFIG_LCD_FRAMEBUFFER=y +CONFIG_LCD_MAX7219=y +CONFIG_LCD_NOGETRUN=y +CONFIG_LIBC_LONG_LONG=y +CONFIG_MAX7219_NHORIZONTALBLKS=4 +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_MQ_MAXMSGSIZE=64 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NX=y +CONFIG_NXFONT_MONO5X8=y +CONFIG_NXSTART_SERVERSTACK=1536 +CONFIG_NX_BLOCKING=y +CONFIG_NX_MXCLIENTMSGS=32 +CONFIG_PREALLOC_MQ_MSGS=16 +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SERIAL_TERMIOS=y +CONFIG_START_DAY=21 +CONFIG_START_MONTH=4 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/mmcsdspi/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/mmcsdspi/defconfig new file mode 100755 index 000000000..d524c8bb3 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/mmcsdspi/defconfig @@ -0,0 +1,74 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_MMCSD_HAVE_CARDDETECT is not set +# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_STM32_CCMEXCLUDE is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_CODECS_HASH_MD5=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_FAT_LFN=y +CONFIG_FS_FAT=y +CONFIG_FS_FATTIME=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_HEAP_COLORATION=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LIB_SENDFILE_BUFSIZE=1024 +CONFIG_MAX_TASKS=16 +CONFIG_MMCSD=y +CONFIG_MM_REGIONS=2 +CONFIG_NETUTILS_CODECS=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_LPWORKPRIORITY=30 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_STACK_COLORATION=y +CONFIG_START_DAY=17 +CONFIG_START_MONTH=10 +CONFIG_START_YEAR=2019 +CONFIG_STM32_DMA1=y +CONFIG_STM32_DMA2=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI2=y +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_OSTEST=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/modbus_slave/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/modbus_slave/defconfig new file mode 100755 index 000000000..ffc1a9756 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/modbus_slave/defconfig @@ -0,0 +1,65 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_MB_TCP_ENABLED is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MW is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_EXAMPLES_MODBUS=y +CONFIG_EXAMPLES_MODBUS_PORT=1 +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_MODBUS=y +CONFIG_MODBUS_SLAVE=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SERIAL_TERMIOS=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_USART1_BAUD=38400 +CONFIG_USART1_PARITY=2 +CONFIG_USART1_RS485=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/module/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/module/defconfig new file mode 100755 index 000000000..770a30665 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/module/defconfig @@ -0,0 +1,54 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_EXAMPLES_MODULE=y +CONFIG_FS_PROCFS=y +CONFIG_FS_ROMFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_MODULE=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/netnsh/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/netnsh/defconfig new file mode 100755 index 000000000..fc308c648 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/netnsh/defconfig @@ -0,0 +1,98 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_SPI is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="aiit-arm32-board" +CONFIG_ARCH_BOARD_STM32F4_AIIT=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_ETH0_PHY_LAN8720=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FS_FAT=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_HOST_WINDOWS=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LIB_HOSTNAME="STM32F4-Discovery" +CONFIG_MAX_TASKS=16 +CONFIG_MMCSD=y +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y +CONFIG_MMCSD_SDIO=y +CONFIG_NET=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSSERVER_NOADDR=y +CONFIG_NETDEV_PHY_IOCTL=y +CONFIG_NETINIT_NOMAC=y +CONFIG_NETINIT_THREAD=y +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_ARP_SEND=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_SOLINGER=y +CONFIG_NET_TCP=y +CONFIG_NET_TCPBACKLOG=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=13 +CONFIG_START_MONTH=9 +CONFIG_START_YEAR=2014 +CONFIG_STM32F4AIIT=y +CONFIG_STM32_DMA2=y +CONFIG_STM32_DMACAPABLE=y +CONFIG_STM32_ETHMAC=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PHYADDR=0 +CONFIG_STM32_PHYSR=31 +CONFIG_STM32_PHYSR_100FD=0x0018 +CONFIG_STM32_PHYSR_100HD=0x0008 +CONFIG_STM32_PHYSR_10FD=0x0014 +CONFIG_STM32_PHYSR_10HD=0x0004 +CONFIG_STM32_PHYSR_ALTCONFIG=y +CONFIG_STM32_PHYSR_ALTMODE=0x001c +CONFIG_STM32_PWR=y +CONFIG_STM32_RMII_EXTCLK=y +CONFIG_STM32_SDIO=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART6=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_PING=y +CONFIG_USART6_RXBUFSIZE=64 +CONFIG_USART6_SERIAL_CONSOLE=y +CONFIG_USART6_TXBUFSIZE=64 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/nsh/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/nsh/defconfig new file mode 100755 index 000000000..e2ad15234 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/nsh/defconfig @@ -0,0 +1,62 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="aiit-arm32-board" +CONFIG_ARCH_BOARD_STM32F4_AIIT=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_EXAMPLES_GPIO=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_HOST_WINDOWS=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART1=y +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_SERIAL_CONSOLE=y +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_LCD=y +CONFIG_LCD_P14201=y +CONFIG_SPI_CMDDATA=y +CONFIG_IOEXPANDER=y +CONFIG_DEV_GPIO=y diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/nxlines/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/nxlines/defconfig new file mode 100755 index 000000000..05c42e424 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/nxlines/defconfig @@ -0,0 +1,74 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS is not set +# CONFIG_NXFONTS_DISABLE_16BPP is not set +# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set +# CONFIG_NX_DISABLE_16BPP is not set +# CONFIG_NX_PACKEDMSFIRST is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_EXAMPLES_NXLINES=y +CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x0320 +CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xffe0 +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4 +CONFIG_EXAMPLES_NXLINES_BPP=16 +CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0xf7bb +CONFIG_EXAMPLES_NXLINES_LINECOLOR=0xffe0 +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_HOST_WINDOWS=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LCD=y +CONFIG_LCD_MAXCONTRAST=1 +CONFIG_LCD_MAXPOWER=255 +CONFIG_LCD_SSD1289=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_MQ_MAXMSGSIZE=64 +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_NX=y +CONFIG_NXFONT_SANS22X29B=y +CONFIG_NXFONT_SANS23X27=y +CONFIG_NXTK_BORDERCOLOR1=0x5cb7 +CONFIG_NXTK_BORDERCOLOR2=0x21c9 +CONFIG_NXTK_BORDERCOLOR3=0xffdf +CONFIG_NX_BLOCKING=y +CONFIG_NX_KBD=y +CONFIG_NX_XYINPUT_MOUSE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32_FSMC=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART2=y +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nxlines_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/pm/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/pm/defconfig new file mode 100755 index 000000000..208837688 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/pm/defconfig @@ -0,0 +1,57 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_LEDS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_CUSTOM_PMINIT=y +CONFIG_ARCH_IDLE_CUSTOM=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_HOST_WINDOWS=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PM=y +CONFIG_PM_BUTTONS=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_RTC_ALARM=y +CONFIG_RTC_DATETIME=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_RTC=y +CONFIG_STM32_TIM1=y +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/posix_spawn/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/posix_spawn/defconfig new file mode 100755 index 000000000..135bd39de --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/posix_spawn/defconfig @@ -0,0 +1,50 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BINFMT_CONSTRUCTORS=y +CONFIG_BOARDCTL_APP_SYMTAB=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_CONSOLE_SYSLOG=y +CONFIG_ELF=y +CONFIG_EXAMPLES_POSIXSPAWN=y +CONFIG_EXECFUNCS_HAVE_SYMTAB=y +CONFIG_EXECFUNCS_NSYMBOLS_VAR="g_spawn_nexports" +CONFIG_EXECFUNCS_SYMTAB_ARRAY="g_spawn_exports" +CONFIG_FS_ROMFS=y +CONFIG_HAVE_CXX=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_EXECFUNCS=y +CONFIG_LIB_BOARDCTL=y +CONFIG_LIB_ENVPATH=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_PATH_INITIAL="/mnt/romfs" +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_STARTHOOK=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=26 +CONFIG_START_MONTH=10 +CONFIG_START_YEAR=2012 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_USART2=y +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="posix_spawn_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/pseudoterm/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/pseudoterm/defconfig new file mode 100755 index 000000000..27c745b37 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/pseudoterm/defconfig @@ -0,0 +1,55 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_EXAMPLES_PTYTEST=y +CONFIG_EXAMPLES_PTYTEST_POLL=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_PSEUDOTERM=y +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SERIAL_TERMIOS=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART2=y +CONFIG_STM32_USART3=y +CONFIG_SYSTEM_NSH=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/rgbled/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/rgbled/defconfig new file mode 100755 index 000000000..a11f098ea --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/rgbled/defconfig @@ -0,0 +1,65 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_EXAMPLES_RGBLED=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_PWM=y +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RGBLED=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_OTGFS=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_TIM1=y +CONFIG_STM32_TIM1_PWM=y +CONFIG_STM32_TIM2=y +CONFIG_STM32_TIM2_CH2OUT=y +CONFIG_STM32_TIM2_CHANNEL=2 +CONFIG_STM32_TIM2_PWM=y +CONFIG_STM32_TIM3=y +CONFIG_STM32_TIM3_CH3OUT=y +CONFIG_STM32_TIM3_CHANNEL=3 +CONFIG_STM32_TIM3_PWM=y +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="rgbled_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/rndis/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/rndis/defconfig new file mode 100755 index 000000000..619d17f43 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/rndis/defconfig @@ -0,0 +1,100 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARDCTL_USBDEVCTRL=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_CLOCK_MONOTONIC=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ELF=y +CONFIG_EXAMPLES_HELLO=m +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FS_FAT=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_HOST_WINDOWS=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_EXECFUNCS=y +CONFIG_LIB_ENVPATH=y +CONFIG_MAX_TASKS=16 +CONFIG_NET=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0 +CONFIG_NETDEVICES=y +CONFIG_NETINIT_DHCPC=y +CONFIG_NETINIT_DRIPADDR=0x0 +CONFIG_NETINIT_MACADDR_1=0xdeadcafe +CONFIG_NETINIT_NETMASK=0x0 +CONFIG_NETINIT_NOMAC=y +CONFIG_NETINIT_THREAD=y +CONFIG_NETUTILS_DHCPC=y +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_ARP_SEND=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_LOOPBACK=y +CONFIG_NET_STATISTICS=y +CONFIG_NET_TCP=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_UDP=y +CONFIG_NFS=y +CONFIG_NFS_STATISTICS=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_FILE_APPS=y +CONFIG_NSH_LINELEN=128 +CONFIG_NSH_READLINE=y +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=3072 +CONFIG_PATH_INITIAL="/mnt/nfs/bin" +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RNDIS=y +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SENSORS=y +CONFIG_START_DAY=13 +CONFIG_START_MONTH=9 +CONFIG_START_YEAR=2014 +CONFIG_STM32_DMA2=y +CONFIG_STM32_DMACAPABLE=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_OTGFS=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART2=y +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_NSH_SYMTAB=y +CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab" +CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols" +CONFIG_SYSTEM_PING=y +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USBDEV=y +CONFIG_USERMAIN_STACKSIZE=3072 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/sporadic/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/sporadic/defconfig new file mode 100755 index 000000000..8011087cb --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/sporadic/defconfig @@ -0,0 +1,53 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_FS_PROCFS=y +CONFIG_HOST_WINDOWS=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_SCHED_SPORADIC=y +CONFIG_SCHED_SPORADIC_MAXREPL=5 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=3 +CONFIG_START_YEAR=2021 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART6=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_OSTEST=y +CONFIG_USART6_RXBUFSIZE=128 +CONFIG_USART6_SERIAL_CONSOLE=y +CONFIG_USART6_TXBUFSIZE=128 +CONFIG_USEC_PER_TICK=1000 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/st7789/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/st7789/defconfig new file mode 100755 index 000000000..dbe45f102 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/st7789/defconfig @@ -0,0 +1,68 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_DRIVERS_VIDEO=y +CONFIG_EXAMPLES_FB=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LCD=y +CONFIG_LCD_FRAMEBUFFER=y +CONFIG_LCD_NOGETRUN=y +CONFIG_LCD_PORTRAIT=y +CONFIG_LCD_ST7789=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_NXFONTS_DISABLE_1BPP=y +CONFIG_NXFONTS_DISABLE_24BPP=y +CONFIG_NXFONTS_DISABLE_2BPP=y +CONFIG_NXFONTS_DISABLE_32BPP=y +CONFIG_NXFONTS_DISABLE_4BPP=y +CONFIG_NXFONTS_DISABLE_8BPP=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SPI_CMDDATA=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_VIDEO_FB=y diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/testlibcxx/Make.defs b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/testlibcxx/Make.defs new file mode 100755 index 000000000..23416fff5 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/testlibcxx/Make.defs @@ -0,0 +1,89 @@ +############################################################################ +# boards/arm/stm32/stm32f4discovery/configs/testlibcxx/Make.defs +# +# Copyright (C) 2017 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Daniel Pereira Volpato +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk +include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script +ifeq ($(CONFIG_CYGWIN_WINTOOL),y) + ARCHSCRIPT = -T "${shell cygpath -w \ + $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing \ + -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ifeq ($(CONFIG_CXX_EXCEPTION),y) + ARCHCPUFLAGSXX = -fno-builtin +else + ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new +endif +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) \ + $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) +CXXFLAGS += $(ARCHDEFINES) $(EXTRAFLAGS) -pipe -std=c++11 +CXXFLAGS += -fno-builtin -fno-exceptions -fcheck-new -fno-rtti +CXXFLAGS += -pedantic -D_DEBUG -D_LIBCPP_BUILD_STATIC -D_LIBCPP_NO_EXCEPTIONS +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +AFLAGS := $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/testlibcxx/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/testlibcxx/defconfig new file mode 100755 index 000000000..f949ee717 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/testlibcxx/defconfig @@ -0,0 +1,52 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_C99_BOOL8=y +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_EXAMPLES_HELLOXX=y +CONFIG_HAVE_CXX=y +CONFIG_HOST_WINDOWS=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBCXX=y +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LOCALTIME=y +CONFIG_LIBM=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=4 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=2 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2012 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_USART2=y +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_SYSTEM_NSH=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/usbmsc/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/usbmsc/defconfig new file mode 100755 index 000000000..19faecbd0 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/usbmsc/defconfig @@ -0,0 +1,61 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FS_FAT=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=27 +CONFIG_START_YEAR=2013 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_OTGFS=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART2=y +CONFIG_SYSLOG_CHAR=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_USBMSC=y +CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/ram0" +CONFIG_TASK_NAME_SIZE=0 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USBDEV=y +CONFIG_USBMSC=y +CONFIG_USBMSC_REMOVABLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/usbnsh/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/usbnsh/defconfig new file mode 100755 index 000000000..78667024f --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/usbnsh/defconfig @@ -0,0 +1,60 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_DEV_CONSOLE is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_USBDEVCTRL=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_RXBUFSIZE=256 +CONFIG_CDCACM_TXBUFSIZE=256 +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAMLOG=y +CONFIG_RAMLOG_BUFSIZE=4096 +CONFIG_RAMLOG_SYSLOG=y +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_STACK_COLORATION=y +CONFIG_START_DAY=27 +CONFIG_START_YEAR=2013 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_OTGFS=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_USBDEV=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/wifi/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/wifi/defconfig new file mode 100755 index 000000000..a305d584e --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/wifi/defconfig @@ -0,0 +1,112 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_MMCSD_HAVE_CARDDETECT is not set +# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +# CONFIG_SPI_CALLBACK is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_LAZYFPU=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_CODECS_HASH_MD5=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_HARDFAULT_ALERT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DRIVERS_WIRELESS=y +CONFIG_ELF=y +CONFIG_EXAMPLES_HELLO=m +CONFIG_EXAMPLES_WEBSERVER=y +CONFIG_FAT_LFN=y +CONFIG_FS_FAT=y +CONFIG_FS_FATTIME=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_HEAP_COLORATION=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_EXECFUNCS=y +CONFIG_LIB_ENVPATH=y +CONFIG_LIB_SENDFILE_BUFSIZE=1024 +CONFIG_MAX_TASKS=16 +CONFIG_MMCSD=y +CONFIG_MM_REGIONS=2 +CONFIG_NET=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDEVICES=y +CONFIG_NETINIT_NETLOCAL=y +CONFIG_NETUTILS_CODECS=y +CONFIG_NETUTILS_FTPC=y +CONFIG_NETUTILS_HTTPD_DIRLIST=y +CONFIG_NETUTILS_HTTPD_SENDFILE=y +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NETUTILS_WEBSERVER=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP=y +CONFIG_NET_TCP_NO_STACK=y +CONFIG_NET_UDP_NO_STACK=y +CONFIG_NET_USRSOCK=y +CONFIG_NET_USRSOCK_CONNS=16 +CONFIG_NET_USRSOCK_UDP=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PATH_INITIAL="/mnt/sd0/bin" +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_LPWORKPRIORITY=30 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_STACK_COLORATION=y +CONFIG_START_DAY=22 +CONFIG_START_MONTH=10 +CONFIG_START_YEAR=2019 +CONFIG_STM32_DMA1=y +CONFIG_STM32_DMA2=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI2=y +CONFIG_STM32_SPI2_DMA=y +CONFIG_STM32_SPI3=y +CONFIG_STM32_SPI3_DMA=y +CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_USART2=y +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_SYSTEM_DHCPC_RENEW=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_NSH_SYMTAB=y +CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab" +CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols" +CONFIG_SYSTEM_NTPC=y +CONFIG_TESTING_OSTEST=y +CONFIG_TESTING_OSTEST_FPUSIZE=132 +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_WIRELESS_GS2200M=y +CONFIG_WL_GS2200M=y +CONFIG_WL_GS2200M_DISABLE_DHCPC=y +CONFIG_WL_GS2200M_SPI_FREQUENCY=10000000 diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/winbuild/Make.defs b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/winbuild/Make.defs new file mode 100755 index 000000000..771ad5982 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/winbuild/Make.defs @@ -0,0 +1,57 @@ +############################################################################ +# boards/arm/stm32/stm32f4discovery/configs/winbuild/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include $(TOPDIR)\.config +include $(TOPDIR)\tools\Config.mk +include $(TOPDIR)\arch\arm\src\armv7-m\Toolchain.defs + +LDSCRIPT = ld.script + +ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +AFLAGS := $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)\binfmt\libnxflat\gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +LDFLAGS += -nostartfiles -nodefaultlibs +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/winbuild/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/winbuild/defconfig new file mode 100755 index 000000000..1213b0981 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/winbuild/defconfig @@ -0,0 +1,44 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_CONSOLE_SYSLOG=y +CONFIG_DISABLE_ENVIRON=y +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_EXPERIMENTAL=y +CONFIG_HOST_WINDOWS=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=21 +CONFIG_START_MONTH=9 +CONFIG_START_YEAR=2009 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_USART2=y +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_TESTING_OSTEST=y +CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3 +CONFIG_TESTING_OSTEST_STACKSIZE=2048 +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="ostest_main" +CONFIG_WINDOWS_NATIVE=y diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/xen1210/defconfig b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/xen1210/defconfig new file mode 100755 index 000000000..bc201a4bc --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/configs/xen1210/defconfig @@ -0,0 +1,58 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f4discovery" +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F407VG=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INTELHEX_BINARY=y +CONFIG_MAX_TASKS=16 +CONFIG_MM_REGIONS=2 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_PWM=y +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SENSORS=y +CONFIG_SENSORS_XEN1210=y +CONFIG_START_DAY=17 +CONFIG_START_MONTH=8 +CONFIG_START_YEAR=2016 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +CONFIG_STM32_TIM1=y +CONFIG_STM32_TIM1_CH1OUT=y +CONFIG_STM32_TIM1_PWM=y +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/include/board.h b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/include/board.h new file mode 100755 index 000000000..a54274ebc --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/include/board.h @@ -0,0 +1,459 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/include/board.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_STM32_STM32F4DISCOVERY_INCLUDE_BOARD_H +#define __BOARDS_ARM_STM32_STM32F4DISCOVERY_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# include +#endif + +/* Do not include STM32-specific header files here */ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* The STM32F4 Discovery board features a single 8MHz crystal. + * Space is provided for a 32kHz RTC backup crystal, but it is not stuffed. + * + * This is the canonical configuration: + * System Clock source : PLL (HSE) + * SYSCLK(Hz) : 168000000 Determined by PLL + * configuration + * HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE) + * AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE) + * APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1) + * APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2) + * HSE Frequency(Hz) : 8000000 (STM32_BOARD_XTAL) + * PLLM : 8 (STM32_PLLCFG_PLLM) + * PLLN : 336 (STM32_PLLCFG_PLLN) + * PLLP : 2 (STM32_PLLCFG_PLLP) + * PLLQ : 7 (STM32_PLLCFG_PLLQ) + * Main regulator output voltage : Scale1 mode Needed for high speed + * SYSCLK + * Flash Latency(WS) : 5 + * Prefetch Buffer : OFF + * Instruction cache : ON + * Data cache : ON + * Require 48MHz for USB OTG FS, : Enabled + * SDIO and RNG clock + */ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC + * HSE - On-board crystal frequency is 8MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 8000000ul + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* Main PLL Configuration. + * + * PLL source is HSE + * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN + * = (8,000,000 / 8) * 336 + * = 336,000,000 + * SYSCLK = PLL_VCO / PLLP + * = 336,000,000 / 2 = 168,000,000 + * USB OTG FS, SDIO and RNG Clock + * = PLL_VCO / PLLQ + * = 48,000,000 + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7) + +#define STM32_SYSCLK_FREQUENCY 168000000ul + +/* AHB clock (HCLK) is SYSCLK (168MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY + +/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) + +/* Timers driven from APB1 will be twice PCLK1 */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 */ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ + +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY + +/* SDIO dividers. Note that slower clocking is required when DMA is disabled + * in order to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. These values have not been + * tuned!!! + * + * SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz + */ + +#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* LED definitions **********************************************************/ + +/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs + * in any way. The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_LED4 3 +#define BOARD_NLEDS 4 + +#define BOARD_LED_GREEN BOARD_LED1 +#define BOARD_LED_ORANGE BOARD_LED2 +#define BOARD_LED_RED BOARD_LED3 +#define BOARD_LED_BLUE BOARD_LED4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on + * board the stm32f4discovery. The following definitions describe how NuttX + * controls the LEDs: + */ + +#define LED_STARTED 0 /* LED1 */ +#define LED_HEAPALLOCATE 1 /* LED2 */ +#define LED_IRQSENABLED 2 /* LED1 + LED2 */ +#define LED_STACKCREATED 3 /* LED3 */ +#define LED_INIRQ 4 /* LED1 + LED3 */ +#define LED_SIGNAL 5 /* LED2 + LED3 */ +#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ +#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ + +/* Button definitions *******************************************************/ + +/* The STM32F4 Discovery supports one button: */ + +#define BUTTON_USER 0 +#define NUM_BUTTONS 1 +#define BUTTON_USER_BIT (1 << BUTTON_USER) + +/* Alternate function pin selections ****************************************/ + +/* CAN */ + +#ifndef CONFIG_STM32_FSMC +# define GPIO_CAN1_RX GPIO_CAN1_RX_3 +# define GPIO_CAN1_TX GPIO_CAN1_TX_3 +#endif + +#ifndef CONFIG_STM32_ETHMAC +# define GPIO_CAN2_RX GPIO_CAN2_RX_1 +# define GPIO_CAN2_TX GPIO_CAN2_TX_1 +#endif + + +/* USART1 */ +//#ifdef CONFIG_STM32F4AIIT +# define GPIO_USART1_TX GPIO_USART1_TX_1 +# define GPIO_USART1_RX GPIO_USART1_RX_1 +//#endif + +#ifdef CONFIG_USART1_RS485 + /* Lets use for RS485 on pins: PB6 and PB7 */ + +# define GPIO_USART1_TX GPIO_USART1_TX_2 +# define GPIO_USART1_RX GPIO_USART1_RX_2 + + /* RS485 DIR pin: PA15 */ + +# define GPIO_USART1_RS485_DIR (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz |\ + GPIO_OUTPUT_CLEAR | GPIO_PORTA | GPIO_PIN15) + +#endif + +/* USART2: + * + * The STM32F4 Discovery has no on-board serial devices, but the console is + * brought out to PA2 (TX) and PA3 (RX) for connection to an external serial + * device. (See the README.txt file for other options) + * + * These pins selections, however, conflict with pin usage on the + * STM32F4DIS-BB. + */ + +#ifndef CONFIG_STM32F4DISBB +# define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3, P1 pin 13 */ +# define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2, P1 pin 14 */ +# define GPIO_USART2_CTS GPIO_USART2_CTS_1 /* PA0, P1 pin 11 */ +# define GPIO_USART2_RTS GPIO_USART2_RTS_1 /* PA1, P1 pin 12 (conflict with USER button) */ +#endif + +/* USART3: + * + * Used in pseudoterm configuration and also with the BT860 HCI UART. + * RTS/CTS Flow control support is needed by the HCI UART. + * + * There are conflicts with the STM32F4DIS-BB Ethernet in this configuration + * when Ethernet is enabled: + * + * PB-11 conflicts with Ethernet TXEN + * PB-13 conflicts with Ethernet TXD1 + * + * UART3 TXD and RXD are available on CON4 PD8 and PD8 of the STM32F4DIS-BB, + * respectively, but not CTS or RTS. For now we assume that Ethernet is not + * enabled if USART3 is used in a configuration with the STM32F4DIS-BB. + */ + +#define GPIO_USART3_TX GPIO_USART3_TX_1 /* PB10, P1 pin 34 (also MP45DT02 CLK_IN) */ +#define GPIO_USART3_RX GPIO_USART3_RX_1 /* PB11, P1 pin 35 */ +#define GPIO_USART3_CTS GPIO_USART3_CTS_1 /* PB13, P1 pin 37 */ +#define GPIO_USART3_RTS GPIO_USART3_RTS_1 /* PB14, P1 pin 38 */ + +/* USART6: + * + * The STM32F4DIS-BB base board provides RS-232 drivers and a DB9 connector + * for USART6. This is the preferred serial console for use with the + * STM32F4DIS-BB. + * + * NOTE: CTS and RTS are not brought out to the RS-232 connector on the + * baseboard. + */ + +#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 (also I2S3_MCK and P2 pin 48) */ +#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 (also P2 pin 47) */ + +/* PWM + * + * The STM32F4 Discovery has no real on-board PWM devices, but the board + * can be configured to output a pulse train using TIM4 CH2 on PD13. + */ + +#define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2 + +/* RGB LED + * + * R = TIM1 CH1 on PE9 | G = TIM2 CH2 on PA1 | B = TIM3 CH3 on PB0 + */ + +#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2 +#define GPIO_TIM2_CH2OUT GPIO_TIM2_CH2OUT_1 +#define GPIO_TIM3_CH3OUT GPIO_TIM3_CH3OUT_1 + +/* SPI - There is a MEMS device on SPI1 using these pins: */ + +#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 +#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 +#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 + +/* SPI DMA -- As used for I2S DMA transfer with the audio configuration */ + +#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1 +#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 + +/* SPI2 - Test MAX31855 on SPI2 PB10 = SCK, PB14 = MISO */ + +#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1 +#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 +#define GPIO_SPI2_SCK GPIO_SPI2_SCK_1 + +/* SPI2 DMA -- As used for MMC/SD SPI */ + +#define DMACHAN_SPI2_RX DMAMAP_SPI2_RX +#define DMACHAN_SPI2_TX DMAMAP_SPI2_TX + +/* SPI3 DMA -- As used for I2S DMA transfer with the audio configuration */ + +#define GPIO_SPI3_MISO GPIO_SPI3_MISO_1 +#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_1 +#define GPIO_SPI3_SCK GPIO_SPI3_SCK_1 + +#define DMACHAN_SPI3_RX DMAMAP_SPI3_RX_1 +#define DMACHAN_SPI3_TX DMAMAP_SPI3_TX_1 + +/* I2S3 - CS43L22 configuration uses I2S3 */ + +#define GPIO_I2S3_SD GPIO_I2S3_SD_2 +#define GPIO_I2S3_CK GPIO_I2S3_CK_2 +#define GPIO_I2S3_WS GPIO_I2S3_WS_1 + +#define DMACHAN_I2S3_RX DMAMAP_SPI3_RX_2 +#define DMACHAN_I2S3_TX DMAMAP_SPI3_TX_2 + +/* I2C. Only I2C1 is available on the stm32f4discovery. I2C1_SCL and + * I2C1_SDA are available on the following pins: + * + * - PB6 is I2C1_SCL + * - PB9 is I2C1_SDA + */ + +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2 + +/* Timer Inputs/Outputs (see the README.txt file for options) */ + +#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_2 +#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1 + +#define GPIO_TIM8_CH1IN GPIO_TIM8_CH1IN_1 +#define GPIO_TIM8_CH2IN GPIO_TIM8_CH2IN_1 + +/* Ethernet *****************************************************************/ + +#if defined(CONFIG_STM32F4AIIT) && defined(CONFIG_STM32_ETHMAC) + /* RMII interface to the LAN8720 PHY */ + +# ifndef CONFIG_STM32_RMII +# error CONFIG_STM32_RMII must be defined +# endif + + /* Clocking is provided by an external 25Mhz XTAL */ + +# ifndef CONFIG_STM32_RMII_EXTCLK +# error CONFIG_STM32_RMII_EXTCLK must be defined +# endif + + /* Pin disambiguation */ + +# define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_1 +# define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_1 +# define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_1 +# define GPIO_ETH_PPS_OUT GPIO_ETH_PPS_OUT_1 + +#endif + +#ifdef CONFIG_MMCSD_SPI +#define GPIO_MMCSD_NSS (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | \ + GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN12) + +#define GPIO_MMCSD_NCD (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | \ + GPIO_PORTC | GPIO_PIN1) +#endif + +/* DMA Channel/Stream Selections ********************************************/ + +/* Stream selections are arbitrary for now but might become important in the + * future if we set aside more DMA channels/streams. + * + * SDIO DMA + * DMAMAP_SDIO_1 = Channel 4, Stream 3 + * DMAMAP_SDIO_2 = Channel 4, Stream 6 + */ + +#define DMAMAP_SDIO DMAMAP_SDIO_1 + +/* ZERO CROSS pin definition */ + +#define BOARD_ZEROCROSS_GPIO \ + (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN0) + +/* LIS3DSH */ + +#define GPIO_LIS3DSH_EXT0 \ + (GPIO_INPUT|GPIO_FLOAT|GPIO_AF0|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN0) + +#define BOARD_LIS3DSH_GPIO_EXT0 GPIO_LIS3DSH_EXT0 + +/* XEN1210 magnetic sensor */ + +#define GPIO_XEN1210_INT (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|\ + GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN5) + +#define GPIO_CS_XEN1210 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) + +#define BOARD_XEN1210_GPIO_INT GPIO_XEN1210_INT + +/* Define what timer to use as XEN1210 CLK (will use channel 1) */ + +#define BOARD_XEN1210_PWMTIMER 1 + +#endif /* __BOARDS_ARM_STM32_STM32F4DISCOVERY_INCLUDE_BOARD_H */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/kernel/Makefile b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/kernel/Makefile new file mode 100755 index 000000000..2a43089e5 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/kernel/Makefile @@ -0,0 +1,103 @@ +############################################################################ +# boards/arm/stm32/stm32f4discovery/kernel/Makefile +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include $(TOPDIR)/Make.defs + +# The entry point name (if none is provided in the .config file) + +CONFIG_USER_ENTRYPOINT ?= user_start +ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT)) + +# Get the paths to the libraries and the links script path in format that +# is appropriate for the host OS + +ifeq ($(CONFIG_CYGWIN_WINTOOL),y) + # Windows-native toolchains + USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done} + USER_LDSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld}" + USER_LDSCRIPT += -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld}" + USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}" + USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}" + USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}" +else + # Linux/Cygwin-native toolchain + USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS))) + USER_LDSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld + USER_LDSCRIPT += -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld + USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex" + USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec" + USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" +endif + +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) +USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) +USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" + +# Source files + +CSRCS = stm32_userspace.c +COBJS = $(CSRCS:.c=$(OBJEXT)) +OBJS = $(COBJS) + +# Targets: + +all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map +.PHONY: nuttx_user.elf depend clean distclean + +$(COBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +# Create the nuttx_user.elf file containing all of the user-mode code + +nuttx_user.elf: $(OBJS) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) $(USER_LIBGCC) --end-group + +$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf + @echo "LD: nuttx_user.elf" + $(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf +ifeq ($(CONFIG_INTELHEX_BINARY),y) + @echo "CP: nuttx_user.hex" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE) +endif +ifeq ($(CONFIG_MOTOROLA_SREC),y) + @echo "CP: nuttx_user.srec" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE) +endif +ifeq ($(CONFIG_RAW_BINARY),y) + @echo "CP: nuttx_user.bin" + $(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE) +endif + +$(TOPDIR)$(DELIM)User.map: nuttx_user.elf + @echo "MK: User.map" + $(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map + $(Q) $(CROSSDEV)size nuttx_user.elf + +.depend: + +depend: .depend + +clean: + $(call DELFILE, nuttx_user.elf) + $(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*") + $(call DELFILE, "$(TOPDIR)$(DELIM)User.map") + $(call CLEAN) + +distclean: clean diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/kernel/stm32_userspace.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/kernel/stm32_userspace.c new file mode 100755 index 000000000..1ec35a3ae --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/kernel/stm32_userspace.c @@ -0,0 +1,117 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/kernel/stm32_userspace.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_NUTTX_USERSPACE +# error "CONFIG_NUTTX_USERSPACE not defined" +#endif + +#if CONFIG_NUTTX_USERSPACE != 0x08020000 +# error "CONFIG_NUTTX_USERSPACE must be 0x08020000 to match memory.ld" +#endif + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* These 'addresses' of these values are setup by the linker script. They are + * not actual uint32_t storage locations! They are only used meaningfully in + * the following way: + * + * - The linker script defines, for example, the symbol_sdata. + * - The declaration extern uint32_t _sdata; makes C happy. C will believe + * that the value _sdata is the address of a uint32_t variable _data (it + * is not!). + * - We can recover the linker value then by simply taking the address of + * of _data. like: uint32_t *pdata = &_sdata; + */ + +extern uint32_t _stext; /* Start of .text */ +extern uint32_t _etext; /* End_1 of .text + .rodata */ +extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */ +extern uint32_t _sdata; /* Start of .data */ +extern uint32_t _edata; /* End+1 of .data */ +extern uint32_t _sbss; /* Start of .bss */ +extern uint32_t _ebss; /* End+1 of .bss */ + +/* This is the user space entry point */ + +int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); + +const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +{ + /* General memory map */ + + .us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT, + .us_textstart = (uintptr_t)&_stext, + .us_textend = (uintptr_t)&_etext, + .us_datasource = (uintptr_t)&_eronly, + .us_datastart = (uintptr_t)&_sdata, + .us_dataend = (uintptr_t)&_edata, + .us_bssstart = (uintptr_t)&_sbss, + .us_bssend = (uintptr_t)&_ebss, + + /* Memory manager heap structure */ + + .us_heap = &g_mmheap, + + /* Task/thread startup routines */ + + .task_startup = nxtask_startup, +#ifndef CONFIG_DISABLE_PTHREAD + .pthread_startup = pthread_startup, +#endif + + /* Signal handler trampoline */ + + .signal_handler = up_signal_handler, + + /* User-space work queue support (declared in include/nuttx/wqueue.h) */ + +#ifdef CONFIG_LIB_USRWORK + .work_usrstart = work_usrstart, +#endif +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/Make.defs b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/Make.defs new file mode 100755 index 000000000..9920ba167 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/Make.defs @@ -0,0 +1,99 @@ +############################################################################ +# boards/arm/stm32/stm32f4discovery/scripts/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk +include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(CONFIG_CYGWIN_WINTOOL),y) + ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +ifeq ($(CONFIG_ARMV7M_TOOLCHAIN_CLANGL),y) + ARCHCFLAGS += -nostdlib -ffreestanding + ARCHCXXFLAGS += -nostdlib -ffreestanding +else + ARCHCFLAGS += -funwind-tables + ARCHCXXFLAGS += -fno-rtti -funwind-tables + ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -fno-strength-reduce + endif + +endif + +CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +AFLAGS := $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# Loadable module definitions + +CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs + +LDMODULEFLAGS = -r -e module_initialize +ifeq ($(CONFIG_CYGWIN_WINTOOL),y) + LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libs/libc/modlib/gnu-elf.ld}" +else + LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld +endif + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(CONFIG_CYGWIN_WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld}" +else + LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld +endif + + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/gnu-elf.ld b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/gnu-elf.ld new file mode 100755 index 000000000..46ab302e9 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/gnu-elf.ld @@ -0,0 +1,126 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/scripts/gnu-elf.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +SECTIONS +{ + .text 0x00000000 : + { + _stext = . ; + *(.text) + *(.text.*) + *(.gnu.warning) + *(.stub) + *(.glue_7) + *(.glue_7t) + *(.jcr) + + /* C++ support: The .init and .fini sections contain specific logic + * to manage static constructors and destructors. + */ + + *(.gnu.linkonce.t.*) + *(.init) /* Old ABI */ + *(.fini) /* Old ABI */ + _etext = . ; + } + + .ARM.extab : + { + *(.ARM.extab*) + } + + .ARM.exidx : + { + *(.ARM.exidx*) + } + + .rodata : + { + _srodata = . ; + *(.rodata) + *(.rodata1) + *(.rodata.*) + *(.gnu.linkonce.r*) + _erodata = . ; + } + + .data : + { + _sdata = . ; + *(.data) + *(.data1) + *(.data.*) + *(.gnu.linkonce.d*) + . = ALIGN(4); + _edata = . ; + } + + /* C++ support. For each global and static local C++ object, + * GCC creates a small subroutine to construct the object. Pointers + * to these routines (not the routines themselves) are stored as + * simple, linear arrays in the .ctors section of the object file. + * Similarly, pointers to global/static destructor routines are + * stored in .dtors. + */ + + .ctors : + { + _sctors = . ; + *(.ctors) /* Old ABI: Unallocated */ + *(.init_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .dtors : + { + _sdtors = . ; + *(.dtors) /* Old ABI: Unallocated */ + *(.fini_array) /* New ABI: Allocated */ + _edtors = . ; + } + + .bss : + { + _sbss = . ; + *(.bss) + *(.bss.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.b*) + *(COMMON) + . = ALIGN(4); + _ebss = . ; + } + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/kernel-space.ld b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/kernel-space.ld new file mode 100755 index 000000000..7a6a61b11 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/kernel-space.ld @@ -0,0 +1,96 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/scripts/kernel-space.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > kflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > kflash + + .ARM.extab : { + *(.ARM.extab*) + } > kflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > kflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + . = ALIGN(4); + _edata = ABSOLUTE(.); + } > ksram AT > kflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + _ebss = ABSOLUTE(.); + } > ksram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/ld.script b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/ld.script new file mode 100755 index 000000000..a402fe6c1 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/ld.script @@ -0,0 +1,111 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/scripts/ld.script + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and + * 192Kb of SRAM. SRAM is split up into three blocks: + * + * 1) 112Kb of SRAM beginning at address 0x2000:0000 + * 2) 16Kb of SRAM beginning at address 0x2001:c000 + * 3) 64Kb of CCM SRAM beginning at address 0x1000:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +EXTERN(_vectors) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : ALIGN(4) { + _sinit = ABSOLUTE(.); + KEEP(*(.init_array .init_array.*)) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : ALIGN(4) { + *(.ARM.extab*) + } > flash + + .ARM.exidx : ALIGN(4) { + __exidx_start = ABSOLUTE(.); + *(.ARM.exidx*) + __exidx_end = ABSOLUTE(.); + } > flash + + _eronly = ABSOLUTE(.); + + .data : ALIGN(4) { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + . = ALIGN(4); + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : ALIGN(4) { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/memory.ld b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/memory.ld new file mode 100755 index 000000000..5e537b6fb --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/memory.ld @@ -0,0 +1,85 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/scripts/memory.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and + * 192Kb of SRAM. SRAM is split up into three blocks: + * + * 1) 112KB of SRAM beginning at address 0x2000:0000 + * 2) 16KB of SRAM beginning at address 0x2001:c000 + * 3) 64KB of CCM SRAM beginning at address 0x1000:0000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + * + * For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of + * FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which + * should fit into 64KB and, of course, can be optimized as needed (See + * also boards/arm/stm32/stm32f4discovery/scripts/kernel-space.ld). Allowing the + * additional does permit addition debug instrumentation to be added to the + * kernel space without overflowing the partition. + * + * Alignment of the user space FLASH partition is also a critical factor: + * The user space FLASH partition will be spanned with a single region of + * size 2**n bytes. The alignment of the user-space region must be the same. + * As a consequence, as the user-space increases in size, the alignment + * requirement also increases. + * + * This alignment requirement means that the largest user space FLASH region + * you can have will be 512KB at it would have to be positioned at + * 0x08800000. If you change this address, don't forget to change the + * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify + * the check in kernel/userspace.c. + * + * For the same reasons, the maximum size of the SRAM mapping is limited to + * 4KB. Both of these alignment limitations could be reduced by using + * multiple regions to map the FLASH/SDRAM range or perhaps with some + * clever use of subregions. + * + * A detailed memory map for the 112KB SRAM region is as follows: + * + * 0x20000 0000: Kernel .data region. Typical size: 0.1KB + * ------- ---- Kernel .bss region. Typical size: 1.8KB + * 0x20000 0800: Kernel IDLE thread stack (approximate). Size is + * determined by CONFIG_IDLETHREAD_STACKSIZE and + * adjustments for alignment. Typical is 1KB. + * ------- ---- Padded to 4KB + * 0x20000 1000: User .data region. Size is variable. + * ------- ---- User .bss region Size is variable. + * 0x20000 2000: Beginning of kernel heap. Size determined by + * CONFIG_MM_KERNEL_HEAPSIZE. + * ------- ---- Beginning of user heap. Can vary with other settings. + * 0x20001 c000: End+1 of CPU RAM + */ + +MEMORY +{ + /* 1024Kb FLASH */ + + kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K + uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K + xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K + + /* 112Kb of contiguous SRAM */ + + ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 4K + usram (rwx) : ORIGIN = 0x20001000, LENGTH = 4K + xsram (rwx) : ORIGIN = 0x20002000, LENGTH = 104K +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/user-space.ld b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/user-space.ld new file mode 100755 index 000000000..e647964b6 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/scripts/user-space.ld @@ -0,0 +1,98 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/scripts/user-space.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* NOTE: This depends on the memory.ld script having been included prior to + * this script. + */ + +OUTPUT_ARCH(arm) +SECTIONS +{ + .userspace : { + *(.userspace) + } > uflash + + .text : { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > uflash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > uflash + + .ARM.extab : { + *(.ARM.extab*) + } > uflash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > uflash + + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + . = ALIGN(4); + _edata = ABSOLUTE(.); + } > usram AT > uflash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + _ebss = ABSOLUTE(.); + } > usram + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/Make.defs b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/Make.defs new file mode 100755 index 000000000..6795855db --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/Make.defs @@ -0,0 +1,188 @@ +############################################################################ +# boards/arm/stm32/stm32f4discovery/src/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include $(TOPDIR)/Make.defs + +CSRCS = stm32_boot.c stm32_bringup.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_LEDS),y) +CSRCS += stm32_autoleds.c +else +CSRCS += stm32_userleds.c +endif + +ifeq ($(CONFIG_SCHED_CRITMONITOR),y) +CSRCS += stm32_critmon.c +endif + +ifeq ($(CONFIG_AUDIO_CS43L22),y) +CSRCS += stm32_cs43l22.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_CAN),y) +CSRCS += stm32_can.c +endif + +ifeq ($(CONFIG_STM32_OTGFS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_LCD_ST7567),y) +CSRCS += stm32_st7567.c +endif + +ifeq ($(CONFIG_ENC28J60),y) +CSRCS += stm32_enc28j60.c +endif + +ifeq ($(CONFIG_LPWAN_SX127X),y) +CSRCS += stm32_sx127x.c +endif + +ifeq ($(CONFIG_LCD_MAX7219),y) +CSRCS += stm32_max7219.c +endif + +ifeq ($(CONFIG_LCD_ST7032),y) +CSRCS += stm32_st7032.c +endif + +ifeq ($(CONFIG_PCA9635PW),y) +CSRCS += stm32_pca9635.c +endif + +ifeq ($(CONFIG_STM32_SDIO),y) +CSRCS += stm32_sdio.c +endif + +ifeq ($(CONFIG_STM32_ETHMAC),y) +CSRCS += stm32_ethernet.c +endif + +ifeq ($(CONFIG_LEDS_MAX7219),y) +CSRCS += stm32_max7219_leds.c +endif + +ifeq ($(CONFIG_RGBLED),y) +CSRCS += stm32_rgbled.c +endif + +ifeq ($(CONFIG_RTC_DS1307),y) +CSRCS += stm32_ds1307.c +endif + +ifeq ($(CONFIG_PWM),y) +CSRCS += stm32_pwm.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +ifeq ($(CONFIG_BOARDCTL_RESET),y) +CSRCS += stm32_reset.c +endif +endif + +ifeq ($(CONFIG_ARCH_CUSTOM_PMINIT),y) +CSRCS += stm32_pm.c +endif + +ifeq ($(CONFIG_PM_BUTTONS),y) +CSRCS += stm32_pmbuttons.c +endif + +ifeq ($(CONFIG_ARCH_IDLE_CUSTOM),y) +CSRCS += stm32_idle.c +endif + +ifeq ($(CONFIG_STM32_FSMC),y) +CSRCS += stm32_extmem.c + +ifeq ($(CONFIG_LCD_SSD1289),y) +CSRCS += stm32_ssd1289.c +endif +endif + +ifeq ($(CONFIG_LCD_SSD1351),y) +CSRCS += stm32_ssd1351.c +endif + +ifeq ($(CONFIG_LCD_UG2864AMBAG01),y) +CSRCS += stm32_ug2864ambag01.c +endif + +ifeq ($(CONFIG_LCD_UG2864HSWEG01),y) +CSRCS += stm32_ug2864hsweg01.c +endif + +ifeq ($(CONFIG_TESTING_OSTEST),y) +CSRCS += stm32_ostest.c +endif + +ifeq ($(CONFIG_TIMER),y) +CSRCS += stm32_timer.c +endif + +ifeq ($(CONFIG_STM32_HCIUART),y) +ifeq ($(CONFIG_BLUETOOTH_UART),y) +CSRCS += stm32_hciuart.c +endif +endif + +ifeq ($(CONFIG_STM32_ROMFS),y) +CSRCS += stm32_romfs_initialize.c +endif + +ifeq ($(CONFIG_BOARDCTL_UNIQUEID),y) +CSRCS += stm32_uid.c +endif + +ifeq ($(CONFIG_USBMSC),y) +CSRCS += stm32_usbmsc.c +endif + +ifneq ($(CONFIG_STM32_ETHMAC),y) +ifeq ($(CONFIG_NETDEVICES),y) +CSRCS += stm32_netinit.c +endif +endif + +ifeq ($(CONFIG_MMCSD_SPI),y) +CSRCS += stm32_mmcsd.c +endif + +ifeq ($(CONFIG_WL_GS2200M),y) +CSRCS += stm32_gs2200m.c +endif + +ifeq ($(CONFIG_LCD_ST7789),y) +CSRCS += stm32_st7789.c +endif + +ifeq ($(CONFIG_DEV_GPIO),y) + CSRCS += stm32_usergpio.c +endif + +DEPPATH += --dep-path board +VPATH += :board +CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board) diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_appinit.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_appinit.c new file mode 100755 index 000000000..22b13653e --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_appinit.c @@ -0,0 +1,79 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_appinit.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "stm32f4aiit.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef OK +# define OK 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initialization logic and the + * matching application logic. The value could be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_app_initialize(uintptr_t arg) +{ +#ifdef CONFIG_BOARD_LATE_INITIALIZE + /* Board initialization already performed by board_late_initialize() */ + + return OK; +#else + /* Perform board-specific initialization */ + + return stm32_bringup(); +#endif +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_autoleds.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_autoleds.c new file mode 100755 index 000000000..83afd3e43 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_autoleds.c @@ -0,0 +1,231 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_autoleds.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "arm_arch.h" +#include "arm_internal.h" +#include "stm32.h" +#include "stm32f4aiit.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The following definitions map the encoded LED setting to GPIO settings */ + +#define STM32F4_LED1 (1 << 0) +#define STM32F4_LED2 (1 << 1) +#define STM32F4_LED3 (1 << 2) +#define STM32F4_LED4 (1 << 3) + +#define ON_SETBITS_SHIFT (0) +#define ON_CLRBITS_SHIFT (4) +#define OFF_SETBITS_SHIFT (8) +#define OFF_CLRBITS_SHIFT (12) + +#define ON_BITS(v) ((v) & 0xff) +#define OFF_BITS(v) (((v) >> 8) & 0x0ff) +#define SETBITS(b) ((b) & 0x0f) +#define CLRBITS(b) (((b) >> 4) & 0x0f) + +#define ON_SETBITS(v) (SETBITS(ON_BITS(v)) +#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v)) +#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v)) +#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v)) + +#define LED_STARTED_ON_SETBITS ((STM32F4_LED1) << ON_SETBITS_SHIFT) +#define LED_STARTED_ON_CLRBITS ((STM32F4_LED2|STM32F4_LED3|STM32F4_LED4) << ON_CLRBITS_SHIFT) +#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT) +#define LED_STARTED_OFF_CLRBITS ((STM32F4_LED1|STM32F4_LED2|STM32F4_LED3|STM32F4_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_HEAPALLOCATE_ON_SETBITS ((STM32F4_LED2) << ON_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_ON_CLRBITS ((STM32F4_LED1|STM32F4_LED3|STM32F4_LED4) << ON_CLRBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_SETBITS ((STM32F4_LED1) << OFF_SETBITS_SHIFT) +#define LED_HEAPALLOCATE_OFF_CLRBITS ((STM32F4_LED2|STM32F4_LED3|STM32F4_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_IRQSENABLED_ON_SETBITS ((STM32F4_LED1|STM32F4_LED2) << ON_SETBITS_SHIFT) +#define LED_IRQSENABLED_ON_CLRBITS ((STM32F4_LED3|STM32F4_LED4) << ON_CLRBITS_SHIFT) +#define LED_IRQSENABLED_OFF_SETBITS ((STM32F4_LED2) << OFF_SETBITS_SHIFT) +#define LED_IRQSENABLED_OFF_CLRBITS ((STM32F4_LED1|STM32F4_LED3|STM32F4_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_STACKCREATED_ON_SETBITS ((STM32F4_LED3) << ON_SETBITS_SHIFT) +#define LED_STACKCREATED_ON_CLRBITS ((STM32F4_LED1|STM32F4_LED2|STM32F4_LED4) << ON_CLRBITS_SHIFT) +#define LED_STACKCREATED_OFF_SETBITS ((STM32F4_LED1|STM32F4_LED2) << OFF_SETBITS_SHIFT) +#define LED_STACKCREATED_OFF_CLRBITS ((STM32F4_LED3|STM32F4_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_INIRQ_ON_SETBITS ((STM32F4_LED1) << ON_SETBITS_SHIFT) +#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_INIRQ_OFF_CLRBITS ((STM32F4_LED1) << OFF_CLRBITS_SHIFT) + +#define LED_SIGNAL_ON_SETBITS ((STM32F4_LED2) << ON_SETBITS_SHIFT) +#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_SIGNAL_OFF_CLRBITS ((STM32F4_LED2) << OFF_CLRBITS_SHIFT) + +#define LED_ASSERTION_ON_SETBITS ((STM32F4_LED4) << ON_SETBITS_SHIFT) +#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_ASSERTION_OFF_CLRBITS ((STM32F4_LED4) << OFF_CLRBITS_SHIFT) + +#define LED_PANIC_ON_SETBITS ((STM32F4_LED4) << ON_SETBITS_SHIFT) +#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT) +#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT) +#define LED_PANIC_OFF_CLRBITS ((STM32F4_LED4) << OFF_CLRBITS_SHIFT) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const uint16_t g_ledbits[8] = +{ + (LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS | + LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS), + + (LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS | + LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS), + + (LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS | + LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS), + + (LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS | + LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS), + + (LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS | + LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS), + + (LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS | + LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS), + + (LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS | + LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS), + + (LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS | + LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS) +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static inline void led_clrbits(unsigned int clrbits) +{ + if ((clrbits & STM32F4_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, false); + } + + if ((clrbits & STM32F4_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, false); + } + + if ((clrbits & STM32F4_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, false); + } + + if ((clrbits & STM32F4_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, false); + } +} + +static inline void led_setbits(unsigned int setbits) +{ + if ((setbits & STM32F4_LED1) != 0) + { + stm32_gpiowrite(GPIO_LED1, true); + } + + if ((setbits & STM32F4_LED2) != 0) + { + stm32_gpiowrite(GPIO_LED2, true); + } + + if ((setbits & STM32F4_LED3) != 0) + { + stm32_gpiowrite(GPIO_LED3, true); + } + + if ((setbits & STM32F4_LED4) != 0) + { + stm32_gpiowrite(GPIO_LED4, true); + } +} + +static void led_setonoff(unsigned int bits) +{ + led_clrbits(CLRBITS(bits)); + led_setbits(SETBITS(bits)); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + led_setonoff(ON_BITS(g_ledbits[led])); +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + led_setonoff(OFF_BITS(g_ledbits[led])); +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_boot.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_boot.c new file mode 100755 index 000000000..bef3b6964 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_boot.c @@ -0,0 +1,129 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_boot.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "arm_arch.h" +#include "nvic.h" +#include "itm.h" + +#include "stm32.h" +#include "stm32f4aiit.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This + * entry point is called early in the initialization -- after all memory + * has been configured and mapped but before any devices have been + * initialized. + * + ****************************************************************************/ + +void stm32_boardinitialize(void) +{ +#ifdef CONFIG_SCHED_CRITMONITOR + /* Enable ITM and DWT resources, if not left enabled by debugger. */ + + modifyreg32(NVIC_DEMCR, 0, NVIC_DEMCR_TRCENA); + + /* Make sure the high speed cycle counter is running. It will be started + * automatically only if a debugger is connected. + */ + + putreg32(0xc5acce55, ITM_LAR); + modifyreg32(DWT_CTRL, 0, DWT_CTRL_CYCCNTENA_MASK); +#endif + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak + * function stm32_spidev_initialize() has been brought into the link. + */ + + if (stm32_spidev_initialize) + { + stm32_spidev_initialize(); + } +#endif + +#ifdef CONFIG_STM32_OTGFS + /* Initialize USB if the 1) OTG FS controller is in the configuration and + * 2) disabled, and 3) the weak function stm32_usbinitialize() has been + * brought into the build. Presumably either CONFIG_USBDEV or + * CONFIG_USBHOST is also selected. + */ + + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif + +#ifdef HAVE_NETMONITOR + /* Configure board resources to support networking. */ + + if (stm32_netinitialize) + { + stm32_netinitialize(); + } +#endif + +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_late_initialize + * + * Description: + * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_late_initialize(). board_late_initialize() will be + * called immediately after up_initialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_LATE_INITIALIZE +void board_late_initialize(void) +{ + /* Perform board-specific initialization */ + + stm32_bringup(); +} +#endif diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_bringup.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_bringup.c new file mode 100755 index 000000000..46a4e9a5d --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_bringup.c @@ -0,0 +1,555 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#ifdef CONFIG_USBMONITOR +# include +#endif + +#include "stm32.h" +#include "stm32_romfs.h" + +#ifdef CONFIG_STM32_OTGFS +# include "stm32_usbhost.h" +#endif + +#ifdef CONFIG_INPUT_BUTTONS +# include +#endif + +#ifdef CONFIG_USERLED +# include +#endif + +#ifdef CONFIG_RNDIS +# include +#endif + +#include "stm32f4aiit.h" + +/* Conditional logic in stm32f4aiit.h will determine if certain features + * are supported. Tests for these features need to be made after including + * stm32f4aiit.h. + */ + +#ifdef HAVE_RTC_DRIVER +# include +# include "stm32_rtc.h" +#endif + +/* The following are includes from board-common logic */ + +#ifdef CONFIG_SENSORS_BMP180 +#include "stm32_bmp180.h" +#endif + +#ifdef CONFIG_SENSORS_MAX6675 +#include "stm32_max6675.h" +#endif + +#ifdef CONFIG_INPUT_NUNCHUCK +#include "stm32_nunchuck.h" +#endif + +#ifdef CONFIG_SENSORS_ZEROCROSS +#include "stm32_zerocross.h" +#endif + +#ifdef CONFIG_SENSORS_QENCODER +#include "board_qencoder.h" +#endif + +#ifdef CONFIG_SENSORS_BH1750FVI +#include "stm32_bh1750.h" +#endif + +#ifdef CONFIG_LIS3DSH +#include "stm32_lis3dsh.h" +#endif + +#ifdef CONFIG_LCD_BACKPACK +#include "stm32_lcd_backpack.h" +#endif + +#ifdef CONFIG_SENSORS_MAX31855 +#include "stm32_max31855.h" +#endif + +#ifdef CONFIG_SENSORS_MLX90614 +#include "stm32_mlx90614.h" +#endif + +#ifdef CONFIG_SENSORS_XEN1210 +#include "stm32_xen1210.h" +#endif + +#ifdef CONFIG_USBADB +# include +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_i2c_register + * + * Description: + * Register one I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#if defined(CONFIG_I2C) && defined(CONFIG_SYSTEM_I2CTOOL) +static void stm32_i2c_register(int bus) +{ + FAR struct i2c_master_s *i2c; + int ret; + + i2c = stm32_i2cbus_initialize(bus); + if (i2c == NULL) + { + syslog(LOG_ERR, "ERROR: Failed to get I2C%d interface\n", bus); + } + else + { + ret = i2c_register(i2c, bus); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to register I2C%d driver: %d\n", + bus, ret); + stm32_i2cbus_uninitialize(i2c); + } + } +} +#endif + +/**************************************************************************** + * Name: stm32_i2ctool + * + * Description: + * Register I2C drivers for the I2C tool. + * + ****************************************************************************/ + +#if defined(CONFIG_I2C) && defined(CONFIG_SYSTEM_I2CTOOL) +static void stm32_i2ctool(void) +{ + stm32_i2c_register(1); +#if 0 + stm32_i2c_register(1); + stm32_i2c_register(2); +#endif +} +#else +# define stm32_i2ctool() +#endif + +/**************************************************************************** + * Name: stm32_bringup + * + * Description: + * Perform architecture-specific initialization + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + ****************************************************************************/ + +int stm32_bringup(void) +{ +#ifdef HAVE_RTC_DRIVER + FAR struct rtc_lowerhalf_s *lower; +#endif + int ret = OK; + +#ifdef CONFIG_DEV_GPIO + ret = stm32_gpio_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret); + return ret; + } +#endif + +#if defined(CONFIG_I2C) && defined(CONFIG_SYSTEM_I2CTOOL) + stm32_i2ctool(); +#endif + +#ifdef CONFIG_SENSORS_BMP180 + /* Initialize the BMP180 pressure sensor. */ + + ret = board_bmp180_initialize(0, 1); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize BMP180, error %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_SENSORS_BH1750FVI + ret = board_bh1750_initialize(0, 1); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: stm32_bh1750initialize() failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_SENSORS_ZEROCROSS + /* Configure the zero-crossing driver */ + + board_zerocross_initialize(0); +#endif + +#ifdef CONFIG_LEDS_MAX7219 + ret = stm32_max7219init("/dev/numdisp0"); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: max7219_leds_register failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_LCD_P14201 +//tst by wly +//sys_log(LOG_INFO, "hello lcd"); +printf("hello lcd 1"); +#endif + + +#ifdef CONFIG_LCD_ST7032 + ret = stm32_st7032init("/dev/slcd0"); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: st7032_register failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_RGBLED + /* Configure the RGB LED driver */ + + stm32_rgbled_setup(); +#endif + +#if defined(CONFIG_PCA9635PW) + /* Initialize the PCA9635 chip */ + + ret = stm32_pca9635_initialize(); + if (ret < 0) + { + serr("ERROR: stm32_pca9635_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_VIDEO_FB + /* Initialize and register the framebuffer driver */ + + ret = fb_register(0, 0); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: fb_register() failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_LCD_BACKPACK + /* slcd:0, i2c:1, rows=2, cols=16 */ + + ret = board_lcd_backpack_init(0, 1, 2, 16); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize PCF8574 LCD, error %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_SDIO + /* Initialize the SDIO block driver */ + + ret = stm32_sdio_initialize(); + if (ret != OK) + { + ferr("ERROR: Failed to initialize MMC/SD driver: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_MMCSD_SPI + /* Initialize the MMC/SD SPI driver (SPI2 is used) */ + + ret = stm32_mmcsd_initialize(2, CONFIG_NSH_MMCSDMINOR); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize SD slot %d: %d\n", + CONFIG_NSH_MMCSDMINOR, ret); + } +#endif + +#ifdef HAVE_USBHOST + /* Initialize USB host operation. stm32_usbhost_initialize() starts a + * thread will monitor for USB connection and disconnection events. + */ + + ret = stm32_usbhost_initialize(); + if (ret != OK) + { + uerr("ERROR: Failed to initialize USB host: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_USBMONITOR + /* Start the USB Monitor */ + + ret = usbmonitor_start(); + if (ret != OK) + { + uerr("ERROR: Failed to start USB monitor: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_PWM + /* Initialize PWM and register the PWM device. */ + + ret = stm32_pwm_setup(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_CAN + /* Initialize CAN and register the CAN driver. */ + + ret = stm32_can_setup(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_INPUT_BUTTONS + /* Register the BUTTON driver */ + + ret = btn_lower_initialize("/dev/buttons"); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: btn_lower_initialize() failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_INPUT_NUNCHUCK + /* Register the Nunchuck driver */ + + ret = board_nunchuck_initialize(0, 1); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: nunchuck_initialize() failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_SENSORS_MLX90614 + ret = board_mlx90614_initialize(0, 1); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize MLX90614, error %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_SENSORS_QENCODER + /* Initialize and register the qencoder driver */ + + ret = board_qencoder_initialize(0, CONFIG_STM32F4DISCO_QETIMER); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to register the qencoder: %d\n", + ret); + return ret; + } +#endif + +#ifdef CONFIG_USERLED + /* Register the LED driver */ + + ret = userled_lower_initialize("/dev/userleds"); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_RTC_DS1307 + ret = stm32_ds1307_init(); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize DS1307 RTC driver: %d\n", ret); + return ret; + } +#endif + +#ifdef HAVE_RTC_DRIVER + /* Instantiate the STM32 lower-half RTC driver */ + + lower = stm32_rtc_lowerhalf(); + if (!lower) + { + serr("ERROR: Failed to instantiate the RTC lower-half driver\n"); + return -ENOMEM; + } + else + { + /* Bind the lower half driver and register the combined RTC driver + * as /dev/rtc0 + */ + + ret = rtc_initialize(0, lower); + if (ret < 0) + { + serr("ERROR: Failed to bind/register the RTC driver: %d\n", ret); + return ret; + } + } +#endif + +#ifdef HAVE_CS43L22 + /* Configure CS43L22 audio */ + + ret = stm32_cs43l22_initialize(1); + if (ret != OK) + { + serr("Failed to initialize CS43L22 audio: %d\n", ret); + } +#endif + +#ifdef CONFIG_SENSORS_MAX31855 + /* Register device 0 on spi channel 2 */ + + ret = board_max31855_initialize(0, 2); + if (ret < 0) + { + serr("ERROR: stm32_max31855initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_SENSORS_MAX6675 + ret = board_max6675_initialize(0, 2); + if (ret < 0) + { + serr("ERROR: stm32_max6675initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = nx_mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + serr("ERROR: Failed to mount procfs at %s: %d\n", + STM32_PROCFS_MOUNTPOINT, ret); + } +#endif + +#ifdef CONFIG_STM32_ROMFS + ret = stm32_romfs_initialize(); + if (ret < 0) + { + serr("ERROR: Failed to mount romfs at %s: %d\n", + CONFIG_STM32_ROMFS_MOUNTPOINT, ret); + } +#endif + +#ifdef CONFIG_SENSORS_XEN1210 + ret = board_xen1210_initialize(0, 1); + if (ret < 0) + { + serr("ERROR: xen1210_archinitialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_LIS3DSH + /* Create a lis3dsh driver instance fitting the chip built into + * stm32f4discovery + */ + + ret = board_lis3dsh_initialize(0, 1); + if (ret < 0) + { + serr("ERROR: Failed to initialize LIS3DSH driver: %d\n", ret); + } +#endif + +#ifdef HAVE_HCIUART + ret = hciuart_dev_initialize(); + if (ret < 0) + { + serr("ERROR: Failed to initialize HCI UART driver: %d\n", ret); + } +#endif + +#if defined(CONFIG_RNDIS) + uint8_t mac[6]; + mac[0] = 0xa0; /* TODO */ + mac[1] = (CONFIG_NETINIT_MACADDR_2 >> (8 * 0)) & 0xff; + mac[2] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 3)) & 0xff; + mac[3] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 2)) & 0xff; + mac[4] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 1)) & 0xff; + mac[5] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 0)) & 0xff; + usbdev_rndis_initialize(mac); +#endif + +#ifdef CONFIG_WL_GS2200M + ret = stm32_gs2200m_initialize("/dev/gs2200m", 3); + if (ret < 0) + { + serr("ERROR: Failed to initialize GS2200M: %d \n", ret); + } +#endif + +#ifdef CONFIG_LPWAN_SX127X + ret = stm32_lpwaninitialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize wireless driver:" + " %d\n", ret); + } +#endif /* CONFIG_LPWAN_SX127X */ + +#ifdef CONFIG_USBADB + usbdev_adb_initialize(); +#endif + + return ret; +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_buttons.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_buttons.c new file mode 100755 index 000000000..8bbaaec66 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_buttons.c @@ -0,0 +1,149 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_buttons.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "stm32.h" +#include "stm32f4aiit.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Pin configuration for each STM32F4 Discovery button. This array is indexed + * by the BUTTON_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_USER +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +uint32_t board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32_configgpio(g_buttons[i]); + } + + return NUM_BUTTONS; +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint32_t board_buttons(void) +{ + uint32_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. */ + + bool released = stm32_gpioread(g_buttons[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/**************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 32-bit bit set with each bit associated with a button. See the + * BUTTON_*_BIT definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that + * will be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See + * the BUTTON_* definitions in board.h for the meaning of enumeration + * value. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) +{ + int ret = -EINVAL; + + /* The following should be atomic */ + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + ret = stm32_gpiosetevent(g_buttons[id], true, true, true, + irqhandler, arg); + } + + return ret; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_can.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_can.c new file mode 100755 index 000000000..643641ffa --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_can.c @@ -0,0 +1,101 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_can.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "arm_arch.h" + +#include "stm32.h" +#include "stm32_can.h" +#include "stm32f4aiit.h" + +#ifdef CONFIG_CAN + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2) +# warning "Both CAN1 and CAN2 are enabled. Assuming only CAN1." +# undef CONFIG_STM32_CAN2 +#endif + +#ifdef CONFIG_STM32_CAN1 +# define CAN_PORT 1 +#else +# define CAN_PORT 2 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_can_setup + * + * Description: + * Initialize CAN and register the CAN device + * + ****************************************************************************/ + +int stm32_can_setup(void) +{ +#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2) + struct can_dev_s *can; + int ret; + + /* Call stm32_caninitialize() to get an instance of the CAN interface */ + + can = stm32_caninitialize(CAN_PORT); + if (can == NULL) + { + canerr("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + if (ret < 0) + { + canerr("ERROR: can_register failed: %d\n", ret); + return ret; + } + + return OK; +#else + return -ENODEV; +#endif +} + +#endif /* CONFIG_CAN */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_critmon.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_critmon.c new file mode 100755 index 000000000..80aa58416 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_critmon.c @@ -0,0 +1,65 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_critmon.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "dwt.h" +#include "arm_arch.h" + +#include + +#include + +#ifdef CONFIG_SCHED_CRITMONITOR + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_critmon_gettime + ****************************************************************************/ + +uint32_t up_critmon_gettime(void) +{ + return getreg32(DWT_CYCCNT); +} + +/**************************************************************************** + * Name: up_critmon_gettime + ****************************************************************************/ + +void up_critmon_convert(uint32_t elapsed, FAR struct timespec *ts) +{ + b32_t b32elapsed; + + b32elapsed = itob32(elapsed) / STM32_SYSCLK_FREQUENCY; + ts->tv_sec = b32toi(b32elapsed); + ts->tv_nsec = NSEC_PER_SEC * b32frac(b32elapsed) / b32ONE; +} + +#endif /* CONFIG_SCHED_CRITMONITOR */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_cs43l22.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_cs43l22.c new file mode 100755 index 000000000..8524c29c1 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_cs43l22.c @@ -0,0 +1,400 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_cs43l22.c + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Taras Drozdovskiy + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +#include "stm32.h" +#include "stm32f4aiit.h" + +#ifdef HAVE_CS43L22 + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_mwinfo_s +{ + /* Standard CS43L22 interface */ + + struct cs43l22_lower_s lower; + + /* Extensions for the stm32f4discovery board */ + + cs43l22_handler_t handler; + FAR void *arg; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the CS43L22 driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the CS43L22 interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + */ + +static int cs43l22_attach(FAR const struct cs43l22_lower_s *lower, + cs43l22_handler_t isr, FAR void *arg); +static bool cs43l22_enable(FAR const struct cs43l22_lower_s *lower, + bool enable); +static void cs43l22_hw_reset(FAR const struct cs43l22_lower_s *lower); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the CS43L22 + * driver. This structure provides information about the configuration + * of the CS43L22 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. + */ + +#define CONFIG_STM32_CS43L22_I2CFREQUENCY 100000 +#define BOARD_MAINCK_FREQUENCY 8000000 + +static struct stm32_mwinfo_s g_cs43l22info = +{ + .lower = + { + .address = CS43L22_I2C_ADDRESS, + .frequency = CONFIG_STM32_CS43L22_I2CFREQUENCY, +#ifdef CONFIG_STM32_CS43L22_SRCSCK + .mclk = BOARD_SLOWCLK_FREQUENCY, +#else + .mclk = BOARD_MAINCK_FREQUENCY, +#endif + .attach = cs43l22_attach, + .enable = cs43l22_enable, + .reset = cs43l22_hw_reset, + }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the CS43L22 driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the CS43L22 interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + * clear - Acknowledge/clear any pending PIO interrupt + * + ****************************************************************************/ + +static int cs43l22_attach(FAR const struct cs43l22_lower_s *lower, + cs43l22_handler_t isr, FAR void *arg) +{ + if (isr) + { + /* Just save the address of the handler and its argument for now. The + * new handler will called via cs43l22_interrupt() when the interrupt + * occurs. + */ + + audinfo("Attaching %p\n", isr); + g_cs43l22info.handler = isr; + g_cs43l22info.arg = arg; + } + else + { + audinfo("Detaching %p\n", g_cs43l22info.handler); + cs43l22_enable(lower, false); + g_cs43l22info.handler = NULL; + g_cs43l22info.arg = NULL; + } + + return OK; +} + +static bool cs43l22_enable(FAR const struct cs43l22_lower_s *lower, + bool enable) +{ + static bool enabled; + irqstate_t flags; + bool ret; + + /* Has the interrupt state changed */ + + flags = enter_critical_section(); + if (enable != enabled) + { + /* Enable or disable interrupts */ + + if (enable && g_cs43l22info.handler) + { + audinfo("Enabling\n"); + + /* TODO: stm32_pioirqenable(IRQ_INT_CS43L22); */ + + enabled = true; + } + else + { + audinfo("Disabling\n"); + + /* TODO: stm32_pioirqdisable(IRQ_INT_CS43L22); */ + + enabled = false; + } + } + + ret = enabled; + leave_critical_section(flags); + return ret; +} + +#if 0 +static int cs43l22_interrupt(int irq, FAR void *context) +{ + /* Just forward the interrupt to the CS43L22 driver */ + + audinfo("handler %p\n", g_cs43l22info.handler); + if (g_cs43l22info.handler) + { + return g_cs43l22info.handler(&g_cs43l22info.lower, g_cs43l22info.arg); + } + + /* We got an interrupt with no handler. This should not + * happen. + */ + + /* TODO: stm32_pioirqdisable(IRQ_INT_CS43L22); */ + + return OK; +} +#endif + +static void cs43l22_hw_reset(FAR const struct cs43l22_lower_s *lower) +{ + int i; + + /* Reset the codec */ + + stm32_gpiowrite(GPIO_CS43L22_RESET, false); + for (i = 0; i < 0x4fff; i++) + { + __asm__ volatile("nop"); + } + + stm32_gpiowrite(GPIO_CS43L22_RESET, true); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_cs43l22_initialize + * + * Description: + * This function is called by platform-specific, setup logic to configure + * and register the CS43L22 device. This function will register the driver + * as /dev/audio/pcm[x] where x is determined by the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int stm32_cs43l22_initialize(int minor) +{ + FAR struct audio_lowerhalf_s *cs43l22; + FAR struct audio_lowerhalf_s *pcm; + FAR struct i2c_master_s *i2c; + FAR struct i2s_dev_s *i2s; + static bool initialized = false; + char devname[12]; + int ret; + + audinfo("minor %d\n", minor); + DEBUGASSERT(minor >= 0 && minor <= 25); + + /* Have we already initialized? Since we never uninitialize we must + * prevent multiple initializations. This is necessary, for example, + * when the touchscreen example is used as a built-in application in + * NSH and can be called numerous time. It will attempt to initialize + * each time. + */ + + if (!initialized) + { + stm32_configgpio(GPIO_CS43L22_RESET); + + /* Configure the CS43L22 interrupt pin */ + + /* TODO: (void)stm32_configgpio(PIO_INT_CS43L22); */ + + /* Get an instance of the I2C interface for the CS43L22 chip select */ + + i2c = stm32_i2cbus_initialize(CS43L22_I2C_BUS); + if (!i2c) + { + auderr("ERROR: Failed to initialize TWI%d\n", CS43L22_I2C_BUS); + ret = -ENODEV; + goto errout; + } + + /* Get an instance of the I2S interface for the CS43L22 data channel */ + + i2s = stm32_i2sbus_initialize(CS43L22_I2S_BUS); + if (!i2s) + { + auderr("ERROR: Failed to initialize I2S%d\n", CS43L22_I2S_BUS); + ret = -ENODEV; + goto errout_with_i2c; + } + + /* Configure the DAC master clock. This clock is provided by + * PCK2 (PB10) that is connected to the CS43L22 MCLK. + */ + + /* Configure CS43L22 interrupts */ + +#if 0 /* TODO: */ + stm32_pioirq(PIO_INT_CS43L22); + ret = irq_attach(IRQ_INT_CS43L22, cs43l22_interrupt); + if (ret < 0) + { + auderr("ERROR: Failed to attach CS43L22 interrupt: %d\n", ret); + goto errout_with_i2s; + } +#endif + + /* Now we can use these I2C and I2S interfaces to initialize the + * CS43L22 which will return an audio interface. + */ + + cs43l22 = cs43l22_initialize(i2c, i2s, &g_cs43l22info.lower); + if (!cs43l22) + { + auderr("ERROR: Failed to initialize the CS43L22\n"); + ret = -ENODEV; + goto errout_with_irq; + } + + /* No we can embed the CS43L22/I2C/I2S conglomerate into a PCM decoder + * instance so that we will have a PCM front end for the the CS43L22 + * driver. + */ + + pcm = pcm_decode_initialize(cs43l22); + if (!pcm) + { + auderr("ERROR: Failed create the PCM decoder\n"); + ret = -ENODEV; + goto errout_with_cs43l22; + } + + /* Create a device name */ + + snprintf(devname, 12, "pcm%d", minor); + + /* Finally, we can register the PCM/CS43L22/I2C/I2S audio device. + * + * Is anyone young enough to remember Rube Goldberg? + */ + + ret = audio_register(devname, pcm); + if (ret < 0) + { + auderr("ERROR: Failed to register /dev/%s device: %d\n", + devname, ret); + goto errout_with_pcm; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; + + /* Error exits. Unfortunately there is no mechanism in place now to + * recover resources from most errors on initialization failures. + */ + +errout_with_pcm: +errout_with_cs43l22: +errout_with_irq: + +#if 0 + irq_detach(IRQ_INT_CS43L22); +errout_with_i2s: +#endif + +errout_with_i2c: +errout: + return ret; +} + +#endif /* HAVE_CS43L22 */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ds1307.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ds1307.c new file mode 100755 index 000000000..5e555e07a --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ds1307.c @@ -0,0 +1,113 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_ds1307.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "stm32.h" +#include "stm32_i2c.h" +#include "stm32f4aiit.h" + +#if defined(CONFIG_I2C) && defined(CONFIG_RTC_DS1307) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define DS1307_I2C_ADDR 0x6f /* DS1307 I2C Address */ +#define DS1307_I2C_BUS 1 /* DS1307 is on I2C1 */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_ds1307_init + * + * Description: + * Initialize and configure the DS1307 RTC + * + ****************************************************************************/ + +int stm32_ds1307_init(void) +{ + FAR struct i2c_master_s *i2c; + static bool initialized = false; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* No.. Get the I2C bus driver */ + + rtcinfo("Initialize I2C%d\n", DS1307_I2C_BUS); + i2c = stm32_i2cbus_initialize(DS1307_I2C_BUS); + if (!i2c) + { + rtcerr("ERROR: Failed to initialize I2C%d\n", DS1307_I2C_BUS); + return -ENODEV; + } + + /* Now bind the I2C interface to the DS1307 RTC driver */ + + rtcinfo("Bind the DS1307 RTC driver to I2C%d\n", DS1307_I2C_BUS); + ret = dsxxxx_rtc_initialize(i2c); + if (ret < 0) + { + rtcerr("ERROR: Failed to bind I2C%d to the DS1307 RTC driver\n", + DS1307_I2C_BUS); + return -ENODEV; + } + +#ifdef CONFIG_I2C_DRIVER + /* Register the I2C to get the "nsh> i2c bus" command working */ + + ret = i2c_register(i2c, DS1307_I2C_BUS); + if (ret < 0) + { + rtcerr("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); + return -ENODEV; + } +#endif + + /* Synchronize the system time to the RTC time */ + + clock_synchronize(); + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_I2C && CONFIG_RTC_DS1307 */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_enc28j60.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_enc28j60.c new file mode 100755 index 000000000..dae273231 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_enc28j60.c @@ -0,0 +1,217 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_enc28j60.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* 2MBit SPI FLASH OR ENC28J60 + * + * -- ---- ------------ ----------------------------------------------------- + * PIN NAME SIGNAL NOTES + * -- ---- ------------ ----------------------------------------------------- + * + * 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH + * 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + * 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "arm_arch.h" +#include "arm_internal.h" +#include "stm32_spi.h" + +#include "stm32f4aiit.h" + +#ifdef CONFIG_ENC28J60 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* ENC28J60 + * + * --- ------ -------------- ------------------------------------------------ + * PIN NAME SIGNAL NOTES + * --- ------ -------------- ------------------------------------------------ + * + * 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH + * 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, + * 10Mbit ENC28J60, SPI 2M FLASH + * 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, + * 10Mbit ENC28J60, SPI 2M FLASH + * 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, + * 10Mbit ENC28J60, SPI 2M FLASH + * 98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen, + * 10Mbit EN28J60 Reset + * 4 PE5 (no name) 10Mbps ENC28J60 Interrupt + */ + +/* ENC28J60 is on SPI1 */ + +#ifndef CONFIG_STM32_SPI1 +# error "Need CONFIG_STM32_SPI1 in the configuration" +#endif + +/* SPI Assumptions **********************************************************/ + +#define ENC28J60_SPI_PORTNO 1 /* On SPI1 */ +#define ENC28J60_DEVNO 0 /* Only one ENC28J60 */ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_lower_s +{ + const struct enc_lower_s lower; /* Low-level MCU interface */ + xcpt_t handler; /* ENC28J60 interrupt handler */ + FAR void *arg; /* Argument that accompanies the interrupt */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler, + FAR void *arg); +static void up_enable(FAR const struct enc_lower_s *lower); +static void up_disable(FAR const struct enc_lower_s *lower); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* The ENC28J60 normal provides interrupts to the MCU via a GPIO pin. The + * following structure provides an MCU-independent mechanixm for controlling + * the ENC28J60 GPIO interrupt. + */ + +static struct stm32_lower_s g_enclower = +{ + .lower = + { + .attach = up_attach, + .enable = up_enable, + .disable = up_disable + }, + .handler = NULL, + .arg = NULL +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: struct enc_lower_s methods + ****************************************************************************/ + +static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler, + FAR void *arg) +{ + FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower; + + /* Just save the handler for use when the interrupt is enabled */ + + priv->handler = handler; + priv->arg = arg; + return OK; +} + +static void up_enable(FAR const struct enc_lower_s *lower) +{ + FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower; + + DEBUGASSERT(priv->handler); + stm32_gpiosetevent(GPIO_ENC28J60_INTR, false, true, true, + priv->handler, priv->arg); +} + +/* REVISIT: Since the interrupt is completely torn down, not just disabled, + * in interrupt requests that occurs while the interrupt is disabled will be + * lost. + */ + +static void up_disable(FAR const struct enc_lower_s *lower) +{ + stm32_gpiosetevent(GPIO_ENC28J60_INTR, false, true, true, + NULL, NULL); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arm_netinitialize + ****************************************************************************/ + +void arm_netinitialize(void) +{ + FAR struct spi_dev_s *spi; + int ret; + + /* Assumptions: + * 1) ENC28J60 pins were configured in up_spi.c early in the boot-up phase. + * 2) Clocking for the SPI1 peripheral was also provided earlier in + * boot-up. + */ + + spi = stm32_spibus_initialize(ENC28J60_SPI_PORTNO); + if (!spi) + { + nerr("ERROR: Failed to initialize SPI port %d\n", ENC28J60_SPI_PORTNO); + return; + } + + /* Take ENC28J60 out of reset (active low) */ + + stm32_gpiowrite(GPIO_ENC28J60_RESET, true); + + /* Bind the SPI port to the ENC28J60 driver */ + + ret = enc_initialize(spi, &g_enclower.lower, ENC28J60_DEVNO); + if (ret < 0) + { + nerr("ERROR: Failed to bind SPI port %d ENC28J60 device %d: %d\n", + ENC28J60_SPI_PORTNO, ENC28J60_DEVNO, ret); + return; + } + + ninfo("Bound SPI port %d to ENC28J60 device %d\n", + ENC28J60_SPI_PORTNO, ENC28J60_DEVNO); +} + +#endif /* CONFIG_ENC28J60 */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ethernet.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ethernet.c new file mode 100755 index 000000000..7db0ce199 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ethernet.c @@ -0,0 +1,240 @@ +/**************************************************************************** + * boards/arm/stm32/aiit-arm32-board/src/stm32_ethernet.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/* Force verbose debug on in this file only to support unit-level testing. */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# undef CONFIG_DEBUG_INFO +# define CONFIG_DEBUG_INFO 1 +# undef CONFIG_DEBUG_NET +# define CONFIG_DEBUG_NET 1 +#endif + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32_eth.h" + +#include "stm32f4aiit.h" + +#if (defined(CONFIG_STM32F4DISBB) || defined(CONFIG_STM32F4AIIT)) && defined(CONFIG_STM32_ETHMAC) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define STM32_ETHMAC_DEVNAME "eth0" + +#define AT24XX_MACADDR_OFFSET 0x9a + +/* Debug ********************************************************************/ + +/* Extra, in-depth debug output that is only available if + * CONFIG_NETDEV_PHY_DEBUG us defined. + */ + +#ifdef CONFIG_NETDEV_PHY_DEBUG +# define phyerr _err +# define phywarn _warn +# define phyinfo _info +#else +# define phyerr(x...) +# define phywarn(x...) +# define phyinfo(x...) +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef HAVE_NETMONITOR +static xcpt_t g_ethmac_handler; +static void *g_ethmac_arg; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_emac0_phy_enable + ****************************************************************************/ + +#ifdef HAVE_NETMONITOR +static void stm32_emac0_phy_enable(bool enable) +{ + phyinfo("enable=%d\n", enable); + if (enable && g_ethmac_handler != NULL) + { + /* Attach and enable GPIO interrupt (and event) on the falling edge */ + + stm32_gpiosetevent(GPIO_EMAC_NINT, false, true, true, + g_ethmac_handler, g_ethmac_arg); + } + else + { + /* Detach and disable GPIO interrupt */ + + stm32_gpiosetevent(GPIO_EMAC_NINT, false, false, false, + NULL, NULL); + } +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ****************************************************************************/ + +void weak_function stm32_netinitialize(void) +{ +#ifdef HAVE_NETMONITOR + /* Configure the PHY interrupt GPIO */ + + phyinfo("Configuring %08x\n", GPIO_EMAC_NINT); + stm32_configgpio(GPIO_EMAC_NINT); +#endif + + /* Configure PHY /RESET output */ + + stm32_configgpio(GPIO_EMAC_NRST); +} + +/**************************************************************************** + * Name: arch_phy_irq + * + * Description: + * This function may be called to register an interrupt handler that will + * be called when a PHY interrupt occurs. This function both attaches + * the interrupt handler and enables the interrupt if 'handler' is non- + * NULL. If handler is NULL, then the interrupt is detached and disabled + * instead. + * + * The PHY interrupt is always disabled upon return. The caller must + * call back through the enable function point to control the state of + * the interrupt. + * + * This interrupt may or may not be available on a given platform depending + * on how the network hardware architecture is implemented. In a typical + * case, the PHY interrupt is provided to board-level logic as a GPIO + * interrupt (in which case this is a board-specific interface and really + * should be called board_phy_irq()); In other cases, the PHY interrupt + * may be cause by the chip's MAC logic (in which case arch_phy_irq()) is + * an appropriate name. Other other boards, there may be no PHY interrupts + * available at all. If client attachable PHY interrupts are available + * from the board or from the chip, then CONFIG_ARCH_PHY_INTERRUPT should + * be defined to indicate that fact. + * + * Typical usage: + * a. OS service logic (not application logic*) attaches to the PHY + * PHY interrupt and enables the PHY interrupt. + * b. When the PHY interrupt occurs: (1) the interrupt should be + * disabled and () work should be scheduled on the worker thread (or + * perhaps a dedicated application thread). + * c. That worker thread should use the SIOCGMIIPHY, SIOCGMIIREG, + * and SIOCSMIIREG ioctl calls** to communicate with the PHY, + * determine what network event took place (Link Up/Down?), and + * take the appropriate actions. + * d. It should then interact the PHY to clear any pending + * interrupts, then re-enable the PHY interrupt. + * + * * This is an OS internal interface and should not be used from + * application space. Rather applications should use the SIOCMIISIG + * ioctl to receive a signal when a PHY event occurs. + * ** This interrupt is really of no use if the Ethernet MAC driver + * does not support these ioctl calls. + * + * Input Parameters: + * intf - Identifies the network interface. For example "eth0". Only + * useful on platforms that support multiple Ethernet interfaces + * and, hence, multiple PHYs and PHY interrupts. + * handler - The client interrupt handler to be invoked when the PHY + * asserts an interrupt. Must reside in OS space, but can + * signal tasks in user space. A value of NULL can be passed + * in order to detach and disable the PHY interrupt. + * arg - The argument that will accompany the interrupt + * enable - A function pointer that be unused to enable or disable the + * PHY interrupt. + * + * Returned Value: + * Zero (OK) returned on success; a negated errno value is returned on + * failure. + * + ****************************************************************************/ + +#ifdef HAVE_NETMONITOR +int arch_phy_irq(FAR const char *intf, xcpt_t handler, void *arg, + phy_enable_t *enable) +{ + phy_enable_t enabler; + irqstate_t flags; + + ninfo("%s: handler=%p\n", intf, handler); + phyinfo("ETHMAC: devname=%s\n", STM32_ETHMAC_DEVNAME); + + DEBUGASSERT(intf); + + flags = enter_critical_section(); + + if (strcmp(intf, STM32_ETHMAC_DEVNAME) == 0) + { + phyinfo("Select ETHMAC\n"); + g_ethmac_handler = handler; + g_ethmac_arg = arg; + enabler = stm32_emac0_phy_enable; + } + else + { + nerr("ERROR: Unsupported interface: %s\n", intf); + enabler = NULL; + } + + if (enable) + { + *enable = enabler; + } + + leave_critical_section(flags); + return OK; +} +#endif + +#endif /* CONFIG_STM32F4DISBB && CONFIG_STM32_ETHMAC */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_extmem.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_extmem.c new file mode 100755 index 000000000..c3c38d5f6 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_extmem.c @@ -0,0 +1,139 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_extmem.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "arm_arch.h" + +#include "stm32.h" +#include "stm32f4aiit.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# warning "FSMC is not enabled" +#endif + +#if STM32_NGPIO_PORTS < 6 +# error "Required GPIO ports not enabled" +#endif + +#define STM32_FSMC_NADDRCONFIGS 26 +#define STM32_FSMC_NDATACONFIGS 16 + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* GPIO configurations common to most external memories */ + +static const uint32_t g_addressconfig[STM32_FSMC_NADDRCONFIGS] = +{ + GPIO_FSMC_A0, GPIO_FSMC_A1, GPIO_FSMC_A2, + GPIO_FSMC_A3, GPIO_FSMC_A4, GPIO_FSMC_A5, + GPIO_FSMC_A6, GPIO_FSMC_A7, GPIO_FSMC_A8, + GPIO_FSMC_A9, GPIO_FSMC_A10, GPIO_FSMC_A11, + GPIO_FSMC_A12, GPIO_FSMC_A13, GPIO_FSMC_A14, + GPIO_FSMC_A15, GPIO_FSMC_A16, GPIO_FSMC_A17, + GPIO_FSMC_A18, GPIO_FSMC_A19, GPIO_FSMC_A20, + GPIO_FSMC_A21, GPIO_FSMC_A22, GPIO_FSMC_A23, + GPIO_FSMC_A24, GPIO_FSMC_A25 +}; + +static const uint32_t g_dataconfig[STM32_FSMC_NDATACONFIGS] = +{ + GPIO_FSMC_D0, GPIO_FSMC_D1, GPIO_FSMC_D2, + GPIO_FSMC_D3, GPIO_FSMC_D4, GPIO_FSMC_D5, + GPIO_FSMC_D6, GPIO_FSMC_D7, GPIO_FSMC_D8, + GPIO_FSMC_D9, GPIO_FSMC_D10, GPIO_FSMC_D11, + GPIO_FSMC_D12, GPIO_FSMC_D13, GPIO_FSMC_D14, + GPIO_FSMC_D15 +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for external memory usage + * + ****************************************************************************/ + +void stm32_extmemgpios(const uint32_t *gpios, int ngpios) +{ + int i; + + /* Configure GPIOs */ + + for (i = 0; i < ngpios; i++) + { + stm32_configgpio(gpios[i]); + } +} + +/**************************************************************************** + * Name: stm32_extmemaddr + * + * Description: + * Initialize address line GPIOs for external memory access + * + ****************************************************************************/ + +void stm32_extmemaddr(int naddrs) +{ + stm32_extmemgpios(g_addressconfig, naddrs); +} + +/**************************************************************************** + * Name: stm32_extmemdata + * + * Description: + * Initialize data line GPIOs for external memory access + * + ****************************************************************************/ + +void stm32_extmemdata(int ndata) +{ + stm32_extmemgpios(g_dataconfig, ndata); +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_font.h b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_font.h new file mode 100644 index 000000000..a98713e18 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_font.h @@ -0,0 +1,423 @@ +/**************************************************************************** + * boards/arm/stm32/aiit-arm32-board/src/stm32_font.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_STM32_AIIT_ARM32_BOARD_SRC_STM32_FONT_H +#define __BOARDS_ARM_STM32_AIIT_ARM32_BOARD_SRC_STM32_FONT_H +//³£ÓÃASCII±í +//Æ«ÒÆÁ¿32 +//ASCII×Ö·û¼¯: !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ +//PC2LCD2002È¡Ä£·½Ê½ÉèÖãºÒõÂë+ÖðÁÐʽ+˳Ïò+C51¸ñʽ +//×ܹ²£º3¸ö×Ö·û¼¯£¨12*12¡¢16*16¡¢24*24ºÍ32*32£©£¬Óû§¿ÉÒÔ×ÔÐÐÐÂÔöÆäËû·Ö±æÂʵÄ×Ö·û¼¯¡£ +//ÿ¸ö×Ö·ûËùÕ¼ÓõÄ×Ö½ÚÊýΪ:(size/8+((size%8)?1:0))*(size/2),ÆäÖÐsize:ÊÇ×Ö¿âÉú³ÉʱµÄµãÕó´óС(12/16/24/32...) + +//12*12 ASCII×Ö·û¼¯µãÕó +const unsigned char asc2_1206[95][12]={ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/ +{0x00,0x00,0x00,0x00,0x3F,0x40,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/ +{0x00,0x00,0x30,0x00,0x40,0x00,0x30,0x00,0x40,0x00,0x00,0x00},/*""",2*/ +{0x09,0x00,0x0B,0xC0,0x3D,0x00,0x0B,0xC0,0x3D,0x00,0x09,0x00},/*"#",3*/ +{0x18,0xC0,0x24,0x40,0x7F,0xE0,0x22,0x40,0x31,0x80,0x00,0x00},/*"$",4*/ +{0x18,0x00,0x24,0xC0,0x1B,0x00,0x0D,0x80,0x32,0x40,0x01,0x80},/*"%",5*/ +{0x03,0x80,0x1C,0x40,0x27,0x40,0x1C,0x80,0x07,0x40,0x00,0x40},/*"&",6*/ +{0x10,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x80,0x20,0x40,0x40,0x20},/*"(",8*/ +{0x00,0x00,0x40,0x20,0x20,0x40,0x1F,0x80,0x00,0x00,0x00,0x00},/*")",9*/ +{0x09,0x00,0x06,0x00,0x1F,0x80,0x06,0x00,0x09,0x00,0x00,0x00},/*"*",10*/ +{0x04,0x00,0x04,0x00,0x3F,0x80,0x04,0x00,0x04,0x00,0x00,0x00},/*"+",11*/ +{0x00,0x10,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/ +{0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x00,0x00},/*"-",13*/ +{0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/ +{0x00,0x20,0x01,0xC0,0x06,0x00,0x38,0x00,0x40,0x00,0x00,0x00},/*"/",15*/ +{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"0",16*/ +{0x00,0x00,0x10,0x40,0x3F,0xC0,0x00,0x40,0x00,0x00,0x00,0x00},/*"1",17*/ +{0x18,0xC0,0x21,0x40,0x22,0x40,0x24,0x40,0x18,0x40,0x00,0x00},/*"2",18*/ +{0x10,0x80,0x20,0x40,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"3",19*/ +{0x02,0x00,0x0D,0x00,0x11,0x00,0x3F,0xC0,0x01,0x40,0x00,0x00},/*"4",20*/ +{0x3C,0x80,0x24,0x40,0x24,0x40,0x24,0x40,0x23,0x80,0x00,0x00},/*"5",21*/ +{0x1F,0x80,0x24,0x40,0x24,0x40,0x34,0x40,0x03,0x80,0x00,0x00},/*"6",22*/ +{0x30,0x00,0x20,0x00,0x27,0xC0,0x38,0x00,0x20,0x00,0x00,0x00},/*"7",23*/ +{0x1B,0x80,0x24,0x40,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"8",24*/ +{0x1C,0x00,0x22,0xC0,0x22,0x40,0x22,0x40,0x1F,0x80,0x00,0x00},/*"9",25*/ +{0x00,0x00,0x00,0x00,0x08,0x40,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/ +{0x00,0x00,0x00,0x00,0x04,0x60,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/ +{0x00,0x00,0x04,0x00,0x0A,0x00,0x11,0x00,0x20,0x80,0x40,0x40},/*"<",28*/ +{0x09,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x00,0x00},/*"=",29*/ +{0x00,0x00,0x40,0x40,0x20,0x80,0x11,0x00,0x0A,0x00,0x04,0x00},/*">",30*/ +{0x18,0x00,0x20,0x00,0x23,0x40,0x24,0x00,0x18,0x00,0x00,0x00},/*"?",31*/ +{0x1F,0x80,0x20,0x40,0x27,0x40,0x29,0x40,0x1F,0x40,0x00,0x00},/*"@",32*/ +{0x00,0x40,0x07,0xC0,0x39,0x00,0x0F,0x00,0x01,0xC0,0x00,0x40},/*"A",33*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"B",34*/ +{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x30,0x80,0x00,0x00},/*"C",35*/ +{0x20,0x40,0x3F,0xC0,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"D",36*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x2E,0x40,0x30,0xC0,0x00,0x00},/*"E",37*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x2E,0x00,0x30,0x00,0x00,0x00},/*"F",38*/ +{0x0F,0x00,0x10,0x80,0x20,0x40,0x22,0x40,0x33,0x80,0x02,0x00},/*"G",39*/ +{0x20,0x40,0x3F,0xC0,0x04,0x00,0x04,0x00,0x3F,0xC0,0x20,0x40},/*"H",40*/ +{0x20,0x40,0x20,0x40,0x3F,0xC0,0x20,0x40,0x20,0x40,0x00,0x00},/*"I",41*/ +{0x00,0x60,0x20,0x20,0x20,0x20,0x3F,0xC0,0x20,0x00,0x20,0x00},/*"J",42*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x0B,0x00,0x30,0xC0,0x20,0x40},/*"K",43*/ +{0x20,0x40,0x3F,0xC0,0x20,0x40,0x00,0x40,0x00,0x40,0x00,0xC0},/*"L",44*/ +{0x3F,0xC0,0x3C,0x00,0x03,0xC0,0x3C,0x00,0x3F,0xC0,0x00,0x00},/*"M",45*/ +{0x20,0x40,0x3F,0xC0,0x0C,0x40,0x23,0x00,0x3F,0xC0,0x20,0x00},/*"N",46*/ +{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"O",47*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x24,0x00,0x18,0x00,0x00,0x00},/*"P",48*/ +{0x1F,0x80,0x21,0x40,0x21,0x40,0x20,0xE0,0x1F,0xA0,0x00,0x00},/*"Q",49*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x26,0x00,0x19,0xC0,0x00,0x40},/*"R",50*/ +{0x18,0xC0,0x24,0x40,0x24,0x40,0x22,0x40,0x31,0x80,0x00,0x00},/*"S",51*/ +{0x30,0x00,0x20,0x40,0x3F,0xC0,0x20,0x40,0x30,0x00,0x00,0x00},/*"T",52*/ +{0x20,0x00,0x3F,0x80,0x00,0x40,0x00,0x40,0x3F,0x80,0x20,0x00},/*"U",53*/ +{0x20,0x00,0x3E,0x00,0x01,0xC0,0x07,0x00,0x38,0x00,0x20,0x00},/*"V",54*/ +{0x38,0x00,0x07,0xC0,0x3C,0x00,0x07,0xC0,0x38,0x00,0x00,0x00},/*"W",55*/ +{0x20,0x40,0x39,0xC0,0x06,0x00,0x39,0xC0,0x20,0x40,0x00,0x00},/*"X",56*/ +{0x20,0x00,0x38,0x40,0x07,0xC0,0x38,0x40,0x20,0x00,0x00,0x00},/*"Y",57*/ +{0x30,0x40,0x21,0xC0,0x26,0x40,0x38,0x40,0x20,0xC0,0x00,0x00},/*"Z",58*/ +{0x00,0x00,0x00,0x00,0x7F,0xE0,0x40,0x20,0x40,0x20,0x00,0x00},/*"[",59*/ +{0x00,0x00,0x70,0x00,0x0C,0x00,0x03,0x80,0x00,0x40,0x00,0x00},/*"\",60*/ +{0x00,0x00,0x40,0x20,0x40,0x20,0x7F,0xE0,0x00,0x00,0x00,0x00},/*"]",61*/ +{0x00,0x00,0x20,0x00,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x00},/*"^",62*/ +{0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10},/*"_",63*/ +{0x00,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/ +{0x00,0x00,0x02,0x80,0x05,0x40,0x05,0x40,0x03,0xC0,0x00,0x40},/*"a",65*/ +{0x20,0x00,0x3F,0xC0,0x04,0x40,0x04,0x40,0x03,0x80,0x00,0x00},/*"b",66*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x40,0x06,0x40,0x00,0x00},/*"c",67*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x24,0x40,0x3F,0xC0,0x00,0x40},/*"d",68*/ +{0x00,0x00,0x03,0x80,0x05,0x40,0x05,0x40,0x03,0x40,0x00,0x00},/*"e",69*/ +{0x00,0x00,0x04,0x40,0x1F,0xC0,0x24,0x40,0x24,0x40,0x20,0x00},/*"f",70*/ +{0x00,0x00,0x02,0xE0,0x05,0x50,0x05,0x50,0x06,0x50,0x04,0x20},/*"g",71*/ +{0x20,0x40,0x3F,0xC0,0x04,0x40,0x04,0x00,0x03,0xC0,0x00,0x40},/*"h",72*/ +{0x00,0x00,0x04,0x40,0x27,0xC0,0x00,0x40,0x00,0x00,0x00,0x00},/*"i",73*/ +{0x00,0x10,0x00,0x10,0x04,0x10,0x27,0xE0,0x00,0x00,0x00,0x00},/*"j",74*/ +{0x20,0x40,0x3F,0xC0,0x01,0x40,0x07,0x00,0x04,0xC0,0x04,0x40},/*"k",75*/ +{0x20,0x40,0x20,0x40,0x3F,0xC0,0x00,0x40,0x00,0x40,0x00,0x00},/*"l",76*/ +{0x07,0xC0,0x04,0x00,0x07,0xC0,0x04,0x00,0x03,0xC0,0x00,0x00},/*"m",77*/ +{0x04,0x40,0x07,0xC0,0x04,0x40,0x04,0x00,0x03,0xC0,0x00,0x40},/*"n",78*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x40,0x03,0x80,0x00,0x00},/*"o",79*/ +{0x04,0x10,0x07,0xF0,0x04,0x50,0x04,0x40,0x03,0x80,0x00,0x00},/*"p",80*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x50,0x07,0xF0,0x00,0x10},/*"q",81*/ +{0x04,0x40,0x07,0xC0,0x02,0x40,0x04,0x00,0x04,0x00,0x00,0x00},/*"r",82*/ +{0x00,0x00,0x06,0x40,0x05,0x40,0x05,0x40,0x04,0xC0,0x00,0x00},/*"s",83*/ +{0x00,0x00,0x04,0x00,0x1F,0x80,0x04,0x40,0x00,0x40,0x00,0x00},/*"t",84*/ +{0x04,0x00,0x07,0x80,0x00,0x40,0x04,0x40,0x07,0xC0,0x00,0x40},/*"u",85*/ +{0x04,0x00,0x07,0x00,0x04,0xC0,0x01,0x80,0x06,0x00,0x04,0x00},/*"v",86*/ +{0x06,0x00,0x01,0xC0,0x07,0x00,0x01,0xC0,0x06,0x00,0x00,0x00},/*"w",87*/ +{0x04,0x40,0x06,0xC0,0x01,0x00,0x06,0xC0,0x04,0x40,0x00,0x00},/*"x",88*/ +{0x04,0x10,0x07,0x10,0x04,0xE0,0x01,0x80,0x06,0x00,0x04,0x00},/*"y",89*/ +{0x00,0x00,0x04,0x40,0x05,0xC0,0x06,0x40,0x04,0x40,0x00,0x00},/*"z",90*/ +{0x00,0x00,0x00,0x00,0x04,0x00,0x7B,0xE0,0x40,0x20,0x00,0x00},/*"{",91*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x00},/*"|",92*/ +{0x00,0x00,0x40,0x20,0x7B,0xE0,0x04,0x00,0x00,0x00,0x00,0x00},/*"}",93*/ +{0x40,0x00,0x80,0x00,0x40,0x00,0x20,0x00,0x20,0x00,0x40,0x00},/*"~",94*/ +}; +//16*16 ASCII×Ö·û¼¯µãÕó +const unsigned char asc2_1608[95][16]={ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xCC,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/ +{0x00,0x00,0x08,0x00,0x30,0x00,0x60,0x00,0x08,0x00,0x30,0x00,0x60,0x00,0x00,0x00},/*""",2*/ +{0x02,0x20,0x03,0xFC,0x1E,0x20,0x02,0x20,0x03,0xFC,0x1E,0x20,0x02,0x20,0x00,0x00},/*"#",3*/ +{0x00,0x00,0x0E,0x18,0x11,0x04,0x3F,0xFF,0x10,0x84,0x0C,0x78,0x00,0x00,0x00,0x00},/*"$",4*/ +{0x0F,0x00,0x10,0x84,0x0F,0x38,0x00,0xC0,0x07,0x78,0x18,0x84,0x00,0x78,0x00,0x00},/*"%",5*/ +{0x00,0x78,0x0F,0x84,0x10,0xC4,0x11,0x24,0x0E,0x98,0x00,0xE4,0x00,0x84,0x00,0x08},/*"&",6*/ +{0x08,0x00,0x68,0x00,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x18,0x18,0x20,0x04,0x40,0x02,0x00,0x00},/*"(",8*/ +{0x00,0x00,0x40,0x02,0x20,0x04,0x18,0x18,0x07,0xE0,0x00,0x00,0x00,0x00,0x00,0x00},/*")",9*/ +{0x02,0x40,0x02,0x40,0x01,0x80,0x0F,0xF0,0x01,0x80,0x02,0x40,0x02,0x40,0x00,0x00},/*"*",10*/ +{0x00,0x80,0x00,0x80,0x00,0x80,0x0F,0xF8,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x00},/*"+",11*/ +{0x00,0x01,0x00,0x0D,0x00,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/ +{0x00,0x00,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80},/*"-",13*/ +{0x00,0x00,0x00,0x0C,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/ +{0x00,0x00,0x00,0x06,0x00,0x18,0x00,0x60,0x01,0x80,0x06,0x00,0x18,0x00,0x20,0x00},/*"/",15*/ +{0x00,0x00,0x07,0xF0,0x08,0x08,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"0",16*/ +{0x00,0x00,0x08,0x04,0x08,0x04,0x1F,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"1",17*/ +{0x00,0x00,0x0E,0x0C,0x10,0x14,0x10,0x24,0x10,0x44,0x11,0x84,0x0E,0x0C,0x00,0x00},/*"2",18*/ +{0x00,0x00,0x0C,0x18,0x10,0x04,0x11,0x04,0x11,0x04,0x12,0x88,0x0C,0x70,0x00,0x00},/*"3",19*/ +{0x00,0x00,0x00,0xE0,0x03,0x20,0x04,0x24,0x08,0x24,0x1F,0xFC,0x00,0x24,0x00,0x00},/*"4",20*/ +{0x00,0x00,0x1F,0x98,0x10,0x84,0x11,0x04,0x11,0x04,0x10,0x88,0x10,0x70,0x00,0x00},/*"5",21*/ +{0x00,0x00,0x07,0xF0,0x08,0x88,0x11,0x04,0x11,0x04,0x18,0x88,0x00,0x70,0x00,0x00},/*"6",22*/ +{0x00,0x00,0x1C,0x00,0x10,0x00,0x10,0xFC,0x13,0x00,0x1C,0x00,0x10,0x00,0x00,0x00},/*"7",23*/ +{0x00,0x00,0x0E,0x38,0x11,0x44,0x10,0x84,0x10,0x84,0x11,0x44,0x0E,0x38,0x00,0x00},/*"8",24*/ +{0x00,0x00,0x07,0x00,0x08,0x8C,0x10,0x44,0x10,0x44,0x08,0x88,0x07,0xF0,0x00,0x00},/*"9",25*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x0C,0x03,0x0C,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/ +{0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/ +{0x00,0x00,0x00,0x80,0x01,0x40,0x02,0x20,0x04,0x10,0x08,0x08,0x10,0x04,0x00,0x00},/*"<",28*/ +{0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x00,0x00},/*"=",29*/ +{0x00,0x00,0x10,0x04,0x08,0x08,0x04,0x10,0x02,0x20,0x01,0x40,0x00,0x80,0x00,0x00},/*">",30*/ +{0x00,0x00,0x0E,0x00,0x12,0x00,0x10,0x0C,0x10,0x6C,0x10,0x80,0x0F,0x00,0x00,0x00},/*"?",31*/ +{0x03,0xE0,0x0C,0x18,0x13,0xE4,0x14,0x24,0x17,0xC4,0x08,0x28,0x07,0xD0,0x00,0x00},/*"@",32*/ +{0x00,0x04,0x00,0x3C,0x03,0xC4,0x1C,0x40,0x07,0x40,0x00,0xE4,0x00,0x1C,0x00,0x04},/*"A",33*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x04,0x11,0x04,0x0E,0x88,0x00,0x70,0x00,0x00},/*"B",34*/ +{0x03,0xE0,0x0C,0x18,0x10,0x04,0x10,0x04,0x10,0x04,0x10,0x08,0x1C,0x10,0x00,0x00},/*"C",35*/ +{0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"D",36*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x04,0x17,0xC4,0x10,0x04,0x08,0x18,0x00,0x00},/*"E",37*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x00,0x17,0xC0,0x10,0x00,0x08,0x00,0x00,0x00},/*"F",38*/ +{0x03,0xE0,0x0C,0x18,0x10,0x04,0x10,0x04,0x10,0x44,0x1C,0x78,0x00,0x40,0x00,0x00},/*"G",39*/ +{0x10,0x04,0x1F,0xFC,0x10,0x84,0x00,0x80,0x00,0x80,0x10,0x84,0x1F,0xFC,0x10,0x04},/*"H",40*/ +{0x00,0x00,0x10,0x04,0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x04,0x00,0x00,0x00,0x00},/*"I",41*/ +{0x00,0x03,0x00,0x01,0x10,0x01,0x10,0x01,0x1F,0xFE,0x10,0x00,0x10,0x00,0x00,0x00},/*"J",42*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x03,0x80,0x14,0x64,0x18,0x1C,0x10,0x04,0x00,0x00},/*"K",43*/ +{0x10,0x04,0x1F,0xFC,0x10,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x0C,0x00,0x00},/*"L",44*/ +{0x10,0x04,0x1F,0xFC,0x1F,0x00,0x00,0xFC,0x1F,0x00,0x1F,0xFC,0x10,0x04,0x00,0x00},/*"M",45*/ +{0x10,0x04,0x1F,0xFC,0x0C,0x04,0x03,0x00,0x00,0xE0,0x10,0x18,0x1F,0xFC,0x10,0x00},/*"N",46*/ +{0x07,0xF0,0x08,0x08,0x10,0x04,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"O",47*/ +{0x10,0x04,0x1F,0xFC,0x10,0x84,0x10,0x80,0x10,0x80,0x10,0x80,0x0F,0x00,0x00,0x00},/*"P",48*/ +{0x07,0xF0,0x08,0x18,0x10,0x24,0x10,0x24,0x10,0x1C,0x08,0x0A,0x07,0xF2,0x00,0x00},/*"Q",49*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x00,0x11,0xC0,0x11,0x30,0x0E,0x0C,0x00,0x04},/*"R",50*/ +{0x00,0x00,0x0E,0x1C,0x11,0x04,0x10,0x84,0x10,0x84,0x10,0x44,0x1C,0x38,0x00,0x00},/*"S",51*/ +{0x18,0x00,0x10,0x00,0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x00,0x18,0x00,0x00,0x00},/*"T",52*/ +{0x10,0x00,0x1F,0xF8,0x10,0x04,0x00,0x04,0x00,0x04,0x10,0x04,0x1F,0xF8,0x10,0x00},/*"U",53*/ +{0x10,0x00,0x1E,0x00,0x11,0xE0,0x00,0x1C,0x00,0x70,0x13,0x80,0x1C,0x00,0x10,0x00},/*"V",54*/ +{0x1F,0xC0,0x10,0x3C,0x00,0xE0,0x1F,0x00,0x00,0xE0,0x10,0x3C,0x1F,0xC0,0x00,0x00},/*"W",55*/ +{0x10,0x04,0x18,0x0C,0x16,0x34,0x01,0xC0,0x01,0xC0,0x16,0x34,0x18,0x0C,0x10,0x04},/*"X",56*/ +{0x10,0x00,0x1C,0x00,0x13,0x04,0x00,0xFC,0x13,0x04,0x1C,0x00,0x10,0x00,0x00,0x00},/*"Y",57*/ +{0x08,0x04,0x10,0x1C,0x10,0x64,0x10,0x84,0x13,0x04,0x1C,0x04,0x10,0x18,0x00,0x00},/*"Z",58*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFE,0x40,0x02,0x40,0x02,0x40,0x02,0x00,0x00},/*"[",59*/ +{0x00,0x00,0x30,0x00,0x0C,0x00,0x03,0x80,0x00,0x60,0x00,0x1C,0x00,0x03,0x00,0x00},/*"\",60*/ +{0x00,0x00,0x40,0x02,0x40,0x02,0x40,0x02,0x7F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00},/*"]",61*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x00,0x00},/*"^",62*/ +{0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01},/*"_",63*/ +{0x00,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/ +{0x00,0x00,0x00,0x98,0x01,0x24,0x01,0x44,0x01,0x44,0x01,0x44,0x00,0xFC,0x00,0x04},/*"a",65*/ +{0x10,0x00,0x1F,0xFC,0x00,0x88,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x70,0x00,0x00},/*"b",66*/ +{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x00},/*"c",67*/ +{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x11,0x08,0x1F,0xFC,0x00,0x04},/*"d",68*/ +{0x00,0x00,0x00,0xF8,0x01,0x44,0x01,0x44,0x01,0x44,0x01,0x44,0x00,0xC8,0x00,0x00},/*"e",69*/ +{0x00,0x00,0x01,0x04,0x01,0x04,0x0F,0xFC,0x11,0x04,0x11,0x04,0x11,0x00,0x18,0x00},/*"f",70*/ +{0x00,0x00,0x00,0xD6,0x01,0x29,0x01,0x29,0x01,0x29,0x01,0xC9,0x01,0x06,0x00,0x00},/*"g",71*/ +{0x10,0x04,0x1F,0xFC,0x00,0x84,0x01,0x00,0x01,0x00,0x01,0x04,0x00,0xFC,0x00,0x04},/*"h",72*/ +{0x00,0x00,0x01,0x04,0x19,0x04,0x19,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"i",73*/ +{0x00,0x00,0x00,0x03,0x00,0x01,0x01,0x01,0x19,0x01,0x19,0xFE,0x00,0x00,0x00,0x00},/*"j",74*/ +{0x10,0x04,0x1F,0xFC,0x00,0x24,0x00,0x40,0x01,0xB4,0x01,0x0C,0x01,0x04,0x00,0x00},/*"k",75*/ +{0x00,0x00,0x10,0x04,0x10,0x04,0x1F,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"l",76*/ +{0x01,0x04,0x01,0xFC,0x01,0x04,0x01,0x00,0x01,0xFC,0x01,0x04,0x01,0x00,0x00,0xFC},/*"m",77*/ +{0x01,0x04,0x01,0xFC,0x00,0x84,0x01,0x00,0x01,0x00,0x01,0x04,0x00,0xFC,0x00,0x04},/*"n",78*/ +{0x00,0x00,0x00,0xF8,0x01,0x04,0x01,0x04,0x01,0x04,0x01,0x04,0x00,0xF8,0x00,0x00},/*"o",79*/ +{0x01,0x01,0x01,0xFF,0x00,0x85,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x70,0x00,0x00},/*"p",80*/ +{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x01,0x05,0x01,0xFF,0x00,0x01},/*"q",81*/ +{0x01,0x04,0x01,0x04,0x01,0xFC,0x00,0x84,0x01,0x04,0x01,0x00,0x01,0x80,0x00,0x00},/*"r",82*/ +{0x00,0x00,0x00,0xCC,0x01,0x24,0x01,0x24,0x01,0x24,0x01,0x24,0x01,0x98,0x00,0x00},/*"s",83*/ +{0x00,0x00,0x01,0x00,0x01,0x00,0x07,0xF8,0x01,0x04,0x01,0x04,0x00,0x00,0x00,0x00},/*"t",84*/ +{0x01,0x00,0x01,0xF8,0x00,0x04,0x00,0x04,0x00,0x04,0x01,0x08,0x01,0xFC,0x00,0x04},/*"u",85*/ +{0x01,0x00,0x01,0x80,0x01,0x70,0x00,0x0C,0x00,0x10,0x01,0x60,0x01,0x80,0x01,0x00},/*"v",86*/ +{0x01,0xF0,0x01,0x0C,0x00,0x30,0x01,0xC0,0x00,0x30,0x01,0x0C,0x01,0xF0,0x01,0x00},/*"w",87*/ +{0x00,0x00,0x01,0x04,0x01,0x8C,0x00,0x74,0x01,0x70,0x01,0x8C,0x01,0x04,0x00,0x00},/*"x",88*/ +{0x01,0x01,0x01,0x81,0x01,0x71,0x00,0x0E,0x00,0x18,0x01,0x60,0x01,0x80,0x01,0x00},/*"y",89*/ +{0x00,0x00,0x01,0x84,0x01,0x0C,0x01,0x34,0x01,0x44,0x01,0x84,0x01,0x0C,0x00,0x00},/*"z",90*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x3E,0xFC,0x40,0x02,0x40,0x02},/*"{",91*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00},/*"|",92*/ +{0x00,0x00,0x40,0x02,0x40,0x02,0x3E,0xFC,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"}",93*/ +{0x00,0x00,0x60,0x00,0x80,0x00,0x80,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x20,0x00},/*"~",94*/ +}; +//24*24 ASICII×Ö·û¼¯µãÕó +const unsigned char asc2_2412[95][36]={ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x80,0x38,0x0F,0xFE,0x38,0x0F,0x80,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x06,0x00,0x00,0x0C,0x00,0x00,0x38,0x00,0x00,0x31,0x00,0x00,0x06,0x00,0x00,0x0C,0x00,0x00,0x38,0x00,0x00,0x30,0x00,0x00,0x00,0x00,0x00},/*""",2*/ +{0x00,0x00,0x00,0x00,0x61,0x80,0x00,0x67,0xF8,0x07,0xF9,0x80,0x00,0x61,0x80,0x00,0x61,0x80,0x00,0x61,0x80,0x00,0x61,0x80,0x00,0x67,0xF8,0x07,0xF9,0x80,0x00,0x61,0x80,0x00,0x00,0x00},/*"#",3*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xC0,0xE0,0x03,0xE0,0xF0,0x06,0x30,0x08,0x04,0x18,0x08,0x1F,0xFF,0xFE,0x04,0x0E,0x08,0x07,0x87,0xF0,0x03,0x81,0xE0,0x00,0x00,0x00,0x00,0x00,0x00},/*"$",4*/ +{0x01,0xF0,0x00,0x06,0x0C,0x00,0x04,0x04,0x08,0x06,0x0C,0x70,0x01,0xF9,0xC0,0x00,0x0E,0x00,0x00,0x3B,0xE0,0x00,0xEC,0x18,0x07,0x08,0x08,0x04,0x0C,0x18,0x00,0x03,0xE0,0x00,0x00,0x00},/*"%",5*/ +{0x00,0x01,0xE0,0x00,0x07,0xF0,0x03,0xF8,0x18,0x04,0x1C,0x08,0x04,0x17,0x08,0x07,0xE1,0xD0,0x03,0xC0,0xE0,0x00,0x23,0xB0,0x00,0x3C,0x08,0x00,0x20,0x08,0x00,0x00,0x10,0x00,0x00,0x00},/*"&",6*/ +{0x00,0x00,0x00,0x01,0x00,0x00,0x31,0x00,0x00,0x32,0x00,0x00,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0x00,0x01,0xFF,0xC0,0x07,0x80,0xF0,0x0C,0x00,0x18,0x10,0x00,0x04,0x20,0x00,0x02,0x00,0x00,0x00},/*"(",8*/ +{0x00,0x00,0x00,0x20,0x00,0x02,0x10,0x00,0x04,0x0C,0x00,0x18,0x07,0x80,0xF0,0x01,0xFF,0xC0,0x00,0x7F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*")",9*/ +{0x00,0x00,0x00,0x00,0x42,0x00,0x00,0x66,0x00,0x00,0x66,0x00,0x00,0x3C,0x00,0x00,0x18,0x00,0x03,0xFF,0xC0,0x00,0x18,0x00,0x00,0x3C,0x00,0x00,0x66,0x00,0x00,0x66,0x00,0x00,0x42,0x00},/*"*",10*/ +{0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x01,0xFF,0xC0,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00},/*"+",11*/ +{0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x31,0x00,0x00,0x32,0x00,0x00,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/ +{0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x00,0x00},/*"-",13*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x00,0x00,0x38,0x00,0x00,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/ +{0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x00,0x1C,0x00,0x00,0x70,0x00,0x01,0x80,0x00,0x0E,0x00,0x00,0x38,0x00,0x00,0xC0,0x00,0x07,0x00,0x00,0x1C,0x00,0x00,0x30,0x00,0x00,0x00,0x00,0x00},/*"/",15*/ +{0x00,0x00,0x00,0x00,0x7F,0x80,0x01,0xFF,0xE0,0x03,0x80,0x70,0x06,0x00,0x18,0x04,0x00,0x08,0x04,0x00,0x08,0x06,0x00,0x18,0x03,0x80,0x70,0x01,0xFF,0xE0,0x00,0x7F,0x80,0x00,0x00,0x00},/*"0",16*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x08,0x01,0x00,0x08,0x01,0x00,0x08,0x03,0xFF,0xF8,0x07,0xFF,0xF8,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00},/*"1",17*/ +{0x00,0x00,0x00,0x01,0xC0,0x38,0x02,0xC0,0x58,0x04,0x00,0x98,0x04,0x01,0x18,0x04,0x02,0x18,0x04,0x04,0x18,0x06,0x1C,0x18,0x03,0xF8,0x18,0x01,0xE0,0xF8,0x00,0x00,0x00,0x00,0x00,0x00},/*"2",18*/ +{0x00,0x00,0x00,0x01,0xC0,0xE0,0x03,0xC0,0xF0,0x04,0x00,0x08,0x04,0x08,0x08,0x04,0x08,0x08,0x06,0x18,0x08,0x03,0xF4,0x18,0x01,0xE7,0xF0,0x00,0x01,0xE0,0x00,0x00,0x00,0x00,0x00,0x00},/*"3",19*/ +{0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x0D,0x00,0x00,0x11,0x00,0x00,0x61,0x00,0x00,0x81,0x08,0x03,0x01,0x08,0x07,0xFF,0xF8,0x0F,0xFF,0xF8,0x00,0x01,0x08,0x00,0x01,0x08,0x00,0x00,0x00},/*"4",20*/ +{0x00,0x00,0x00,0x00,0x00,0xE0,0x07,0xFC,0xD0,0x06,0x08,0x08,0x06,0x10,0x08,0x06,0x10,0x08,0x06,0x10,0x08,0x06,0x18,0x38,0x06,0x0F,0xF0,0x06,0x07,0xC0,0x00,0x00,0x00,0x00,0x00,0x00},/*"5",21*/ +{0x00,0x00,0x00,0x00,0x3F,0x80,0x01,0xFF,0xE0,0x03,0x84,0x30,0x02,0x08,0x18,0x04,0x10,0x08,0x04,0x10,0x08,0x04,0x10,0x08,0x07,0x18,0x10,0x03,0x0F,0xF0,0x00,0x07,0xC0,0x00,0x00,0x00},/*"6",22*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xC0,0x00,0x07,0x00,0x00,0x06,0x00,0x00,0x06,0x00,0xF8,0x06,0x07,0xF8,0x06,0x18,0x00,0x06,0xE0,0x00,0x07,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00},/*"7",23*/ +{0x00,0x00,0x00,0x01,0xE1,0xE0,0x03,0xF7,0xF0,0x06,0x34,0x10,0x04,0x18,0x08,0x04,0x18,0x08,0x04,0x0C,0x08,0x04,0x0C,0x08,0x06,0x16,0x18,0x03,0xF3,0xF0,0x01,0xC1,0xE0,0x00,0x00,0x00},/*"8",24*/ +{0x00,0x00,0x00,0x00,0xF8,0x00,0x03,0xFC,0x30,0x03,0x06,0x38,0x04,0x02,0x08,0x04,0x02,0x08,0x04,0x02,0x08,0x04,0x04,0x10,0x03,0x08,0xF0,0x01,0xFF,0xC0,0x00,0x7F,0x00,0x00,0x00,0x00},/*"9",25*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0x38,0x00,0x70,0x38,0x00,0x70,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x1A,0x00,0x30,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x14,0x00,0x00,0x22,0x00,0x00,0x41,0x00,0x00,0x80,0x80,0x01,0x00,0x40,0x02,0x00,0x20,0x04,0x00,0x10,0x08,0x00,0x08,0x00,0x00,0x00},/*"<",28*/ +{0x00,0x00,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x21,0x00,0x00,0x00,0x00},/*"=",29*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x08,0x04,0x00,0x10,0x02,0x00,0x20,0x01,0x00,0x40,0x00,0x80,0x80,0x00,0x41,0x00,0x00,0x22,0x00,0x00,0x14,0x00,0x00,0x08,0x00,0x00,0x00,0x00},/*">",30*/ +{0x00,0x00,0x00,0x03,0xC0,0x00,0x04,0xC0,0x00,0x04,0x00,0x00,0x08,0x00,0x38,0x08,0x0F,0x38,0x08,0x08,0x38,0x08,0x10,0x00,0x0C,0x30,0x00,0x07,0xE0,0x00,0x03,0xC0,0x00,0x00,0x00,0x00},/*"?",31*/ +{0x00,0x00,0x00,0x00,0x3F,0x80,0x00,0xFF,0xE0,0x03,0x80,0x70,0x02,0x0F,0x10,0x06,0x70,0x88,0x04,0xC0,0x88,0x04,0x83,0x08,0x04,0x7F,0x88,0x02,0xC0,0x90,0x03,0x01,0x20,0x00,0xFE,0x40},/*"@",32*/ +{0x00,0x00,0x08,0x00,0x00,0x18,0x00,0x01,0xF8,0x00,0x3E,0x08,0x01,0xC2,0x00,0x07,0x02,0x00,0x07,0xE2,0x00,0x00,0xFE,0x00,0x00,0x1F,0xC8,0x00,0x01,0xF8,0x00,0x00,0x38,0x00,0x00,0x08},/*"A",33*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x08,0x08,0x04,0x08,0x08,0x04,0x08,0x08,0x04,0x08,0x08,0x06,0x18,0x08,0x03,0xF4,0x18,0x01,0xE7,0xF0,0x00,0x01,0xE0,0x00,0x00,0x00},/*"B",34*/ +{0x00,0x00,0x00,0x00,0x3F,0x80,0x01,0xFF,0xE0,0x03,0x80,0x70,0x02,0x00,0x18,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x10,0x06,0x00,0x20,0x07,0x80,0xC0,0x00,0x00,0x00},/*"C",35*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x18,0x02,0x00,0x10,0x03,0x80,0x70,0x01,0xFF,0xE0,0x00,0x7F,0x80,0x00,0x00,0x00},/*"D",36*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x08,0x08,0x04,0x08,0x08,0x04,0x08,0x08,0x04,0x08,0x08,0x04,0x3E,0x08,0x04,0x00,0x08,0x06,0x00,0x18,0x01,0x00,0x60,0x00,0x00,0x00},/*"E",37*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x08,0x08,0x04,0x08,0x00,0x04,0x08,0x00,0x04,0x08,0x00,0x04,0x3E,0x00,0x06,0x00,0x00,0x06,0x00,0x00,0x01,0x80,0x00,0x00,0x00,0x00},/*"F",38*/ +{0x00,0x00,0x00,0x00,0x3F,0x80,0x01,0xFF,0xE0,0x03,0x80,0x70,0x06,0x00,0x18,0x04,0x00,0x08,0x04,0x02,0x08,0x04,0x02,0x08,0x02,0x03,0xF0,0x07,0x83,0xF0,0x00,0x02,0x00,0x00,0x02,0x00},/*"G",39*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x08,0x08,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x04,0x08,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x00,0x08},/*"H",40*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00},/*"I",41*/ +{0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x00,0x07,0x00,0x00,0x01,0x04,0x00,0x01,0x04,0x00,0x01,0x04,0x00,0x03,0x07,0xFF,0xFE,0x07,0xFF,0xFC,0x04,0x00,0x00,0x04,0x00,0x00,0x04,0x00,0x00},/*"J",42*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x0C,0x08,0x00,0x18,0x00,0x00,0x3E,0x00,0x04,0xC7,0x80,0x05,0x03,0xC8,0x06,0x00,0xF8,0x04,0x00,0x38,0x04,0x00,0x18,0x00,0x00,0x08},/*"K",43*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x18,0x00,0x00,0x60,0x00,0x00,0x00},/*"L",44*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0x80,0x08,0x07,0xFC,0x00,0x00,0x7F,0xC0,0x00,0x03,0xF8,0x00,0x07,0xC0,0x00,0x78,0x00,0x07,0x80,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x00,0x08},/*"M",45*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0x00,0x08,0x03,0xC0,0x00,0x00,0xE0,0x00,0x00,0x38,0x00,0x00,0x1E,0x00,0x00,0x07,0x00,0x00,0x01,0xC0,0x04,0x00,0xF0,0x07,0xFF,0xF8,0x04,0x00,0x00},/*"N",46*/ +{0x00,0x00,0x00,0x00,0x7F,0x80,0x01,0xFF,0xE0,0x03,0x80,0x70,0x06,0x00,0x18,0x04,0x00,0x08,0x04,0x00,0x08,0x06,0x00,0x18,0x03,0x00,0x30,0x01,0xFF,0xE0,0x00,0x7F,0x80,0x00,0x00,0x00},/*"O",47*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x04,0x08,0x04,0x04,0x00,0x04,0x04,0x00,0x04,0x04,0x00,0x04,0x04,0x00,0x06,0x0C,0x00,0x03,0xF8,0x00,0x01,0xF0,0x00,0x00,0x00,0x00},/*"P",48*/ +{0x00,0x00,0x00,0x00,0x7F,0x80,0x01,0xFF,0xE0,0x03,0x80,0x70,0x06,0x00,0x88,0x04,0x00,0x88,0x04,0x00,0xC8,0x06,0x00,0x3C,0x03,0x00,0x3E,0x01,0xFF,0xE6,0x00,0x7F,0x84,0x00,0x00,0x00},/*"Q",49*/ +{0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x08,0x08,0x04,0x08,0x00,0x04,0x0C,0x00,0x04,0x0F,0x00,0x04,0x0B,0xC0,0x06,0x10,0xF0,0x03,0xF0,0x38,0x01,0xE0,0x08,0x00,0x00,0x08},/*"R",50*/ +{0x00,0x00,0x00,0x01,0xE0,0xF8,0x03,0xF0,0x30,0x06,0x30,0x10,0x04,0x18,0x08,0x04,0x18,0x08,0x04,0x0C,0x08,0x04,0x0C,0x08,0x02,0x06,0x18,0x02,0x07,0xF0,0x07,0x81,0xE0,0x00,0x00,0x00},/*"S",51*/ +{0x01,0x80,0x00,0x06,0x00,0x00,0x04,0x00,0x00,0x04,0x00,0x00,0x04,0x00,0x08,0x07,0xFF,0xF8,0x07,0xFF,0xF8,0x04,0x00,0x08,0x04,0x00,0x00,0x04,0x00,0x00,0x06,0x00,0x00,0x01,0x80,0x00},/*"T",52*/ +{0x04,0x00,0x00,0x07,0xFF,0xE0,0x07,0xFF,0xF0,0x04,0x00,0x18,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x04,0x00,0x10,0x07,0xFF,0xE0,0x04,0x00,0x00},/*"U",53*/ +{0x04,0x00,0x00,0x06,0x00,0x00,0x07,0xE0,0x00,0x07,0xFE,0x00,0x04,0x1F,0xE0,0x00,0x01,0xF8,0x00,0x00,0x38,0x00,0x01,0xE0,0x04,0x3E,0x00,0x07,0xC0,0x00,0x06,0x00,0x00,0x04,0x00,0x00},/*"V",54*/ +{0x04,0x00,0x00,0x07,0xE0,0x00,0x07,0xFF,0xC0,0x04,0x1F,0xF8,0x00,0x07,0xC0,0x07,0xF8,0x00,0x07,0xFF,0x80,0x04,0x3F,0xF8,0x00,0x07,0xC0,0x04,0xF8,0x00,0x07,0x00,0x00,0x04,0x00,0x00},/*"W",55*/ +{0x00,0x00,0x00,0x04,0x00,0x08,0x06,0x00,0x18,0x07,0xC0,0x78,0x05,0xF1,0xC8,0x00,0x3E,0x00,0x00,0x1F,0x80,0x04,0x63,0xE8,0x07,0x80,0xF8,0x06,0x00,0x18,0x04,0x00,0x08,0x00,0x00,0x00},/*"X",56*/ +{0x04,0x00,0x00,0x06,0x00,0x00,0x07,0x80,0x00,0x07,0xE0,0x08,0x04,0x7C,0x08,0x00,0x1F,0xF8,0x00,0x07,0xF8,0x00,0x18,0x08,0x04,0xE0,0x08,0x07,0x00,0x00,0x06,0x00,0x00,0x04,0x00,0x00},/*"Y",57*/ +{0x00,0x00,0x00,0x01,0x00,0x08,0x06,0x00,0x38,0x04,0x00,0xF8,0x04,0x03,0xE8,0x04,0x0F,0x08,0x04,0x7C,0x08,0x05,0xF0,0x08,0x07,0xC0,0x08,0x07,0x00,0x18,0x04,0x00,0x60,0x00,0x00,0x00},/*"Z",58*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFF,0xFE,0x20,0x00,0x02,0x20,0x00,0x02,0x20,0x00,0x02,0x20,0x00,0x02,0x20,0x00,0x02,0x00,0x00,0x00},/*"[",59*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x07,0x00,0x00,0x00,0xC0,0x00,0x00,0x38,0x00,0x00,0x06,0x00,0x00,0x01,0xC0,0x00,0x00,0x30,0x00,0x00,0x0E,0x00,0x00,0x01,0x00,0x00,0x00},/*"\",60*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x00,0x02,0x20,0x00,0x02,0x20,0x00,0x02,0x20,0x00,0x02,0x20,0x00,0x02,0x3F,0xFF,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"]",61*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x10,0x00,0x00,0x30,0x00,0x00,0x20,0x00,0x00,0x30,0x00,0x00,0x10,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"^",62*/ +{0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01,0x00,0x00,0x01},/*"_",63*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x20,0x00,0x00,0x10,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/ +{0x00,0x00,0x00,0x00,0x00,0xF0,0x00,0x19,0xF8,0x00,0x1B,0x18,0x00,0x22,0x08,0x00,0x26,0x08,0x00,0x24,0x08,0x00,0x24,0x10,0x00,0x3F,0xF8,0x00,0x1F,0xF8,0x00,0x00,0x08,0x00,0x00,0x18},/*"a",65*/ +{0x00,0x00,0x00,0x04,0x00,0x00,0x07,0xFF,0xF8,0x0F,0xFF,0xF0,0x00,0x18,0x18,0x00,0x10,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x30,0x18,0x00,0x1F,0xF0,0x00,0x0F,0xC0,0x00,0x00,0x00},/*"b",66*/ +{0x00,0x00,0x00,0x00,0x07,0xC0,0x00,0x1F,0xF0,0x00,0x18,0x30,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x3C,0x08,0x00,0x1C,0x10,0x00,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00},/*"c",67*/ +{0x00,0x00,0x00,0x00,0x07,0xC0,0x00,0x1F,0xF0,0x00,0x38,0x18,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x04,0x10,0x10,0x07,0xFF,0xF8,0x0F,0xFF,0xF0,0x00,0x00,0x10,0x00,0x00,0x00},/*"d",68*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xC0,0x00,0x1F,0xF0,0x00,0x12,0x30,0x00,0x22,0x18,0x00,0x22,0x08,0x00,0x22,0x08,0x00,0x32,0x08,0x00,0x1E,0x10,0x00,0x0E,0x20,0x00,0x00,0x00},/*"e",69*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x20,0x08,0x00,0x20,0x08,0x01,0xFF,0xF8,0x03,0xFF,0xF8,0x06,0x20,0x08,0x04,0x20,0x08,0x04,0x20,0x08,0x07,0x20,0x00,0x03,0x00,0x00,0x00,0x00,0x00},/*"f",70*/ +{0x00,0x00,0x00,0x00,0x00,0x0E,0x00,0x0E,0x6E,0x00,0x1F,0xF3,0x00,0x31,0xB1,0x00,0x20,0xB1,0x00,0x20,0xB1,0x00,0x31,0x91,0x00,0x1F,0x13,0x00,0x2E,0x1E,0x00,0x20,0x0E,0x00,0x30,0x00},/*"g",71*/ +{0x00,0x00,0x00,0x04,0x00,0x08,0x07,0xFF,0xF8,0x0F,0xFF,0xF8,0x00,0x10,0x08,0x00,0x20,0x00,0x00,0x20,0x00,0x00,0x20,0x08,0x00,0x3F,0xF8,0x00,0x1F,0xF8,0x00,0x00,0x08,0x00,0x00,0x00},/*"h",72*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x06,0x3F,0xF8,0x06,0x3F,0xF8,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00},/*"i",73*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x03,0x00,0x20,0x01,0x00,0x20,0x01,0x00,0x20,0x03,0x06,0x3F,0xFE,0x06,0x3F,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"j",74*/ +{0x00,0x00,0x00,0x04,0x00,0x08,0x07,0xFF,0xF8,0x0F,0xFF,0xF8,0x00,0x01,0x88,0x00,0x03,0x00,0x00,0x2F,0xC0,0x00,0x38,0xF8,0x00,0x20,0x38,0x00,0x20,0x08,0x00,0x00,0x08,0x00,0x00,0x00},/*"k",75*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x08,0x04,0x00,0x08,0x04,0x00,0x08,0x07,0xFF,0xF8,0x0F,0xFF,0xF8,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00},/*"l",76*/ +{0x00,0x20,0x08,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x10,0x08,0x00,0x20,0x00,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x10,0x08,0x00,0x20,0x00,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x00,0x08},/*"m",77*/ +{0x00,0x00,0x00,0x00,0x20,0x08,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x10,0x08,0x00,0x10,0x00,0x00,0x20,0x00,0x00,0x20,0x08,0x00,0x3F,0xF8,0x00,0x1F,0xF8,0x00,0x00,0x08,0x00,0x00,0x00},/*"n",78*/ +{0x00,0x00,0x00,0x00,0x07,0xC0,0x00,0x0F,0xF0,0x00,0x18,0x30,0x00,0x30,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x30,0x08,0x00,0x18,0x30,0x00,0x0F,0xF0,0x00,0x07,0xC0,0x00,0x00,0x00},/*"o",79*/ +{0x00,0x00,0x00,0x00,0x20,0x01,0x00,0x3F,0xFF,0x00,0x3F,0xFF,0x00,0x10,0x11,0x00,0x20,0x09,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x30,0x38,0x00,0x1F,0xF0,0x00,0x0F,0xC0,0x00,0x00,0x00},/*"p",80*/ +{0x00,0x00,0x00,0x00,0x07,0xC0,0x00,0x1F,0xF0,0x00,0x38,0x18,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x20,0x09,0x00,0x10,0x11,0x00,0x1F,0xFF,0x00,0x3F,0xFF,0x00,0x00,0x01,0x00,0x00,0x00},/*"q",81*/ +{0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x08,0x08,0x00,0x10,0x08,0x00,0x20,0x08,0x00,0x20,0x00,0x00,0x30,0x00,0x00,0x30,0x00,0x00,0x00,0x00},/*"r",82*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x78,0x00,0x1E,0x18,0x00,0x33,0x08,0x00,0x23,0x08,0x00,0x21,0x08,0x00,0x21,0x88,0x00,0x21,0x98,0x00,0x30,0xF0,0x00,0x38,0x60,0x00,0x00,0x00},/*"s",83*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x20,0x00,0x00,0x20,0x00,0x00,0xFF,0xF0,0x03,0xFF,0xF8,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x00,0x30,0x00,0x00,0x00,0x00,0x00,0x00},/*"t",84*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x3F,0xF0,0x00,0x7F,0xF8,0x00,0x00,0x18,0x00,0x00,0x08,0x00,0x00,0x08,0x00,0x20,0x10,0x00,0x3F,0xF8,0x00,0x7F,0xF0,0x00,0x00,0x10,0x00,0x00,0x00},/*"u",85*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x30,0x00,0x00,0x3C,0x00,0x00,0x3F,0x80,0x00,0x23,0xF0,0x00,0x00,0x78,0x00,0x00,0x70,0x00,0x23,0x80,0x00,0x3C,0x00,0x00,0x30,0x00,0x00,0x20,0x00},/*"v",86*/ +{0x00,0x20,0x00,0x00,0x3C,0x00,0x00,0x3F,0xE0,0x00,0x23,0xF8,0x00,0x00,0xE0,0x00,0x27,0x00,0x00,0x3E,0x00,0x00,0x3F,0xE0,0x00,0x21,0xF8,0x00,0x01,0xE0,0x00,0x3E,0x00,0x00,0x20,0x00},/*"w",87*/ +{0x00,0x00,0x00,0x00,0x20,0x08,0x00,0x20,0x08,0x00,0x38,0x38,0x00,0x3E,0x68,0x00,0x27,0x80,0x00,0x03,0xC8,0x00,0x2C,0xF8,0x00,0x38,0x38,0x00,0x20,0x18,0x00,0x20,0x08,0x00,0x00,0x00},/*"x",88*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x30,0x03,0x00,0x3C,0x01,0x00,0x3F,0x83,0x00,0x23,0xEC,0x00,0x00,0x70,0x00,0x23,0x80,0x00,0x3C,0x00,0x00,0x20,0x00,0x00,0x20,0x00,0x00,0x00,0x00},/*"y",89*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x08,0x00,0x20,0x38,0x00,0x20,0xF8,0x00,0x23,0xE8,0x00,0x2F,0x88,0x00,0x3E,0x08,0x00,0x38,0x08,0x00,0x20,0x18,0x00,0x00,0x70,0x00,0x00,0x00},/*"z",90*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x14,0x00,0x1F,0xF7,0xFC,0x30,0x00,0x06,0x20,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00},/*"{",91*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"|",92*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x00,0x02,0x30,0x00,0x06,0x1F,0xF7,0xFC,0x00,0x14,0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"}",93*/ +{0x00,0x00,0x00,0x18,0x00,0x00,0x60,0x00,0x00,0x40,0x00,0x00,0x40,0x00,0x00,0x20,0x00,0x00,0x10,0x00,0x00,0x08,0x00,0x00,0x04,0x00,0x00,0x04,0x00,0x00,0x0C,0x00,0x00,0x10,0x00,0x00},/*"~",94*/ +}; + +//32*32 ASCII×Ö·û¼¯µãÕó +const unsigned char asc2_3216[95][128]={ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xF0,0x00,0xC0,0x07,0xFF,0xE1,0xE0,0x07,0xF0,0x01,0xE0,0x00,0x00,0x00,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x01,0xC0,0x00,0x00,0x07,0x80,0x00,0x00,0x1F,0x00,0x00,0x00,0x1E,0x00,0x00,0x00,0x1C,0x20,0x00,0x00,0x01,0xC0,0x00,0x00,0x07,0x80,0x00,0x00,0x1F,0x00,0x00,0x00,0x1E,0x00,0x00,0x00,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*""",2*/ +{0x00,0x00,0x00,0x00,0x00,0x18,0x0C,0x00,0x00,0x18,0x0C,0x00,0x00,0x18,0x0F,0xE0,0x00,0x1F,0xFC,0x00,0x03,0xF8,0x0C,0x00,0x00,0x18,0x0C,0x00,0x00,0x18,0x0C,0x00,0x00,0x18,0x0C,0x00,0x00,0x18,0x0C,0x00,0x00,0x18,0x0F,0xE0,0x00,0x1F,0xFC,0x00,0x03,0xF8,0x0C,0x00,0x00,0x18,0x0C,0x00,0x00,0x18,0x0C,0x00,0x00,0x00,0x00,0x00},/*"#",3*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x80,0x00,0x78,0x07,0xC0,0x00,0xFC,0x06,0x40,0x01,0x0E,0x00,0x20,0x03,0x07,0x00,0x20,0x02,0x03,0x80,0x20,0x0F,0xFF,0xFF,0xFC,0x02,0x01,0xC0,0x20,0x02,0x00,0xE0,0x60,0x01,0x30,0x70,0x40,0x01,0xF0,0x3F,0x80,0x00,0xF0,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"$",4*/ +{0x00,0xFE,0x00,0x00,0x01,0xFF,0x00,0x00,0x03,0x01,0x80,0x00,0x02,0x00,0x80,0x60,0x03,0x01,0x81,0xC0,0x01,0xFF,0x07,0x00,0x00,0xFE,0x18,0x00,0x00,0x00,0xE0,0x00,0x00,0x03,0xBF,0x00,0x00,0x0C,0xFF,0xC0,0x00,0x71,0x80,0x60,0x01,0xC1,0x00,0x20,0x03,0x01,0x80,0x60,0x00,0x00,0xFF,0xC0,0x00,0x00,0x3F,0x00,0x00,0x00,0x00,0x00},/*"%",5*/ +{0x00,0x00,0x1F,0x00,0x00,0x00,0x7F,0xC0,0x00,0xFC,0xC0,0xC0,0x01,0xFF,0x80,0x60,0x03,0x03,0xE0,0x20,0x02,0x02,0x78,0x20,0x02,0x06,0x1E,0x20,0x03,0xFC,0x07,0x40,0x01,0xF0,0x03,0x80,0x00,0x01,0x03,0xC0,0x00,0x01,0x1C,0x60,0x00,0x01,0xE0,0x20,0x00,0x01,0x00,0x20,0x00,0x01,0x00,0x40,0x00,0x00,0x01,0x80,0x00,0x00,0x00,0x00},/*"&",6*/ +{0x00,0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x1C,0x60,0x00,0x00,0x1C,0x40,0x00,0x00,0x1F,0x80,0x00,0x00,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xF8,0x00,0x00,0x3F,0xFF,0x00,0x00,0x78,0x07,0xC0,0x01,0xC0,0x00,0xE0,0x03,0x00,0x00,0x30,0x04,0x00,0x00,0x08,0x08,0x00,0x00,0x04,0x10,0x00,0x00,0x02,0x00,0x00,0x00,0x00},/*"(",8*/ +{0x00,0x00,0x00,0x00,0x10,0x00,0x00,0x02,0x08,0x00,0x00,0x04,0x04,0x00,0x00,0x08,0x03,0x00,0x00,0x30,0x01,0xC0,0x00,0xE0,0x00,0x78,0x07,0xC0,0x00,0x3F,0xFF,0x00,0x00,0x07,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*")",9*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x18,0x00,0x00,0x0E,0x38,0x00,0x00,0x0E,0x38,0x00,0x00,0x06,0x30,0x00,0x00,0x03,0x60,0x00,0x00,0x61,0x43,0x80,0x00,0xFF,0xFF,0x80,0x00,0x61,0x43,0x00,0x00,0x03,0x60,0x00,0x00,0x06,0x30,0x00,0x00,0x0E,0x38,0x00,0x00,0x0E,0x38,0x00,0x00,0x0C,0x18,0x00,0x00,0x00,0x00,0x00},/*"*",10*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x7F,0xFF,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x00,0x00},/*"+",11*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0xE3,0x00,0x00,0x00,0xE2,0x00,0x00,0x00,0xFC,0x00,0x00,0x00,0x78,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x00,0x00},/*"-",13*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0x00,0x00,0x01,0xE0,0x00,0x00,0x01,0xE0,0x00,0x00,0x00,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x00,0x00,0x00,0x38,0x00,0x00,0x00,0xE0,0x00,0x00,0x03,0x80,0x00,0x00,0x0E,0x00,0x00,0x00,0x38,0x00,0x00,0x00,0xE0,0x00,0x00,0x03,0x80,0x00,0x00,0x0E,0x00,0x00,0x00,0x38,0x00,0x00,0x00,0xE0,0x00,0x00,0x03,0x80,0x00,0x00,0x0E,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"/",15*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xF8,0x00,0x00,0x7F,0xFF,0x00,0x00,0xF0,0x07,0x80,0x01,0x80,0x00,0xC0,0x03,0x00,0x00,0x60,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0x00,0x00,0x60,0x01,0x80,0x00,0xC0,0x00,0xE0,0x03,0x80,0x00,0x7F,0xFF,0x00,0x00,0x0F,0xF8,0x00,0x00,0x00,0x00,0x00},/*"0",16*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x20,0x00,0x80,0x00,0x20,0x00,0x80,0x00,0x20,0x00,0x80,0x00,0x60,0x01,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xE0,0x00,0x00,0x00,0x60,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"1",17*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x00,0xE0,0x00,0x98,0x01,0x60,0x01,0x00,0x02,0x60,0x02,0x00,0x04,0x60,0x02,0x00,0x08,0x60,0x02,0x00,0x10,0x60,0x02,0x00,0x20,0x60,0x02,0x00,0x40,0x60,0x03,0x00,0x80,0x60,0x01,0x83,0x00,0x60,0x01,0xFE,0x00,0xE0,0x00,0x7C,0x07,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"2",18*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF0,0x07,0x80,0x01,0xF0,0x07,0xC0,0x01,0x00,0x00,0x40,0x02,0x00,0x00,0x20,0x02,0x01,0x00,0x20,0x02,0x01,0x00,0x20,0x02,0x01,0x00,0x20,0x03,0x03,0x80,0x20,0x01,0x86,0x80,0x40,0x01,0xFC,0xC0,0xC0,0x00,0x78,0x7F,0x80,0x00,0x00,0x1E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"3",19*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x38,0x00,0x00,0x00,0x48,0x00,0x00,0x01,0x88,0x00,0x00,0x06,0x08,0x00,0x00,0x0C,0x08,0x10,0x00,0x30,0x08,0x10,0x00,0x40,0x08,0x10,0x01,0xFF,0xFF,0xF0,0x03,0xFF,0xFF,0xF0,0x03,0xFF,0xFF,0xF0,0x00,0x00,0x08,0x10,0x00,0x00,0x08,0x10,0x00,0x00,0x08,0x10,0x00,0x00,0x00,0x00},/*"4",20*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x80,0x00,0x1F,0x86,0x40,0x03,0xE1,0x00,0x20,0x03,0x02,0x00,0x20,0x03,0x04,0x00,0x20,0x03,0x04,0x00,0x20,0x03,0x04,0x00,0x20,0x03,0x04,0x00,0x20,0x03,0x06,0x00,0x40,0x03,0x03,0x01,0xC0,0x03,0x01,0xFF,0x80,0x03,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"5",21*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xFC,0x00,0x00,0x3F,0xFF,0x00,0x00,0x70,0xC3,0x80,0x00,0x81,0x80,0xC0,0x01,0x01,0x00,0x60,0x03,0x02,0x00,0x20,0x02,0x02,0x00,0x20,0x02,0x02,0x00,0x20,0x02,0x02,0x00,0x20,0x02,0x03,0x00,0x40,0x01,0xC1,0x80,0xC0,0x00,0xC0,0xFF,0x80,0x00,0x00,0x7E,0x00,0x00,0x00,0x00,0x00},/*"6",22*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF0,0x00,0x00,0x03,0xC0,0x00,0x00,0x03,0x80,0x00,0x00,0x03,0x00,0x00,0x00,0x03,0x00,0x07,0xE0,0x03,0x00,0x3F,0xE0,0x03,0x01,0xC0,0x00,0x03,0x06,0x00,0x00,0x03,0x18,0x00,0x00,0x03,0x60,0x00,0x00,0x03,0x80,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"7",23*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x00,0x00,0x78,0x3F,0x80,0x00,0xFC,0x60,0xC0,0x01,0x8E,0xC0,0x40,0x03,0x07,0x80,0x20,0x02,0x03,0x00,0x20,0x02,0x01,0x80,0x20,0x02,0x01,0x80,0x20,0x02,0x01,0xC0,0x20,0x03,0x01,0xE0,0x40,0x01,0x86,0x70,0xC0,0x00,0xFC,0x3F,0x80,0x00,0x78,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"8",24*/ +{0x00,0x00,0x00,0x00,0x00,0x3F,0x00,0x00,0x00,0xFF,0x81,0xC0,0x01,0xC0,0xC1,0xC0,0x01,0x00,0x60,0x20,0x02,0x00,0x20,0x20,0x02,0x00,0x20,0x20,0x02,0x00,0x20,0x20,0x02,0x00,0x20,0x60,0x02,0x00,0x40,0xC0,0x01,0x00,0xC1,0x80,0x00,0xC1,0x8F,0x00,0x00,0x7F,0xFE,0x00,0x00,0x1F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"9",25*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0xC0,0x00,0x07,0x81,0xE0,0x00,0x07,0x81,0xE0,0x00,0x03,0x00,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x66,0x00,0x06,0x00,0x78,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x01,0xC0,0x00,0x00,0x03,0x60,0x00,0x00,0x06,0x30,0x00,0x00,0x0C,0x18,0x00,0x00,0x18,0x0C,0x00,0x00,0x30,0x06,0x00,0x00,0x60,0x03,0x00,0x00,0xC0,0x01,0x80,0x01,0x00,0x00,0x40,0x02,0x00,0x00,0x20,0x04,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"<",28*/ +{0x00,0x00,0x00,0x00,0x00,0x04,0x10,0x00,0x00,0x04,0x10,0x00,0x00,0x04,0x10,0x00,0x00,0x04,0x10,0x00,0x00,0x04,0x10,0x00,0x00,0x04,0x10,0x00,0x00,0x04,0x10,0x00,0x00,0x04,0x10,0x00,0x00,0x04,0x10,0x00,0x00,0x04,0x10,0x00,0x00,0x04,0x10,0x00,0x00,0x04,0x10,0x00,0x00,0x04,0x10,0x00,0x00,0x04,0x10,0x00,0x00,0x00,0x00,0x00},/*"=",29*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x10,0x02,0x00,0x00,0x20,0x01,0x00,0x00,0x40,0x00,0xC0,0x01,0x80,0x00,0x60,0x03,0x00,0x00,0x30,0x06,0x00,0x00,0x18,0x0C,0x00,0x00,0x0C,0x18,0x00,0x00,0x06,0x30,0x00,0x00,0x03,0x60,0x00,0x00,0x01,0xC0,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*">",30*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x00,0x00,0x01,0xF8,0x00,0x00,0x02,0x38,0x00,0x00,0x02,0x00,0x00,0x00,0x04,0x00,0x00,0xC0,0x04,0x00,0x79,0xE0,0x04,0x00,0x81,0xE0,0x04,0x01,0x00,0xC0,0x04,0x03,0x00,0x00,0x02,0x02,0x00,0x00,0x03,0x06,0x00,0x00,0x01,0xFC,0x00,0x00,0x00,0xF8,0x00,0x00,0x00,0x00,0x00,0x00},/*"?",31*/ +{0x00,0x00,0x00,0x00,0x00,0x0F,0xF8,0x00,0x00,0x3F,0xFE,0x00,0x00,0x70,0x07,0x80,0x00,0xC0,0x00,0xC0,0x01,0x01,0xF8,0x40,0x03,0x07,0xFC,0x20,0x02,0x1E,0x04,0x20,0x02,0x30,0x08,0x20,0x02,0x20,0x30,0x20,0x02,0x3F,0xFC,0x20,0x01,0x3F,0x04,0x40,0x01,0x80,0x0C,0xC0,0x00,0xE0,0x31,0x80,0x00,0x1F,0xC2,0x00,0x00,0x00,0x00,0x00},/*"@",32*/ +{0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x60,0x00,0x00,0x03,0xE0,0x00,0x00,0x3E,0x20,0x00,0x03,0xE0,0x20,0x00,0x3E,0x20,0x00,0x03,0xE0,0x20,0x00,0x03,0x80,0x20,0x00,0x07,0xFC,0x20,0x00,0x00,0x3F,0xE0,0x00,0x00,0x03,0xFE,0x20,0x00,0x00,0x3F,0xE0,0x00,0x00,0x01,0xE0,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x00},/*"A",33*/ +{0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xE0,0x02,0x01,0x00,0x20,0x02,0x01,0x00,0x20,0x02,0x01,0x00,0x20,0x02,0x01,0x00,0x20,0x02,0x01,0x00,0x20,0x03,0x03,0x00,0x20,0x01,0x86,0x80,0x60,0x01,0xFC,0xC0,0xC0,0x00,0xF8,0x7F,0x80,0x00,0x00,0x1F,0x00,0x00,0x00,0x00,0x00},/*"B",34*/ +{0x00,0x00,0x00,0x00,0x00,0x07,0xF8,0x00,0x00,0x3F,0xFF,0x00,0x00,0x70,0x07,0x80,0x00,0xC0,0x00,0xC0,0x01,0x00,0x00,0x40,0x03,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x01,0x00,0x00,0x40,0x01,0x80,0x00,0xC0,0x03,0xC0,0x01,0x80,0x00,0x30,0x06,0x00,0x00,0x00,0x00,0x00},/*"C",35*/ +{0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xE0,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0x00,0x00,0x60,0x01,0x00,0x00,0x40,0x01,0x80,0x00,0xC0,0x00,0xF0,0x07,0x80,0x00,0x7F,0xFE,0x00,0x00,0x0F,0xF8,0x00,0x00,0x00,0x00,0x00},/*"D",36*/ +{0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xE0,0x02,0x01,0x00,0x20,0x02,0x01,0x00,0x20,0x02,0x01,0x00,0x20,0x02,0x01,0x00,0x20,0x02,0x01,0x00,0x20,0x02,0x03,0x80,0x20,0x02,0x0F,0xE0,0x20,0x03,0x00,0x00,0x60,0x03,0xC0,0x00,0xE0,0x00,0x60,0x03,0x00,0x00,0x00,0x00,0x00},/*"E",37*/ +{0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xE0,0x02,0x01,0x00,0x20,0x02,0x01,0x00,0x20,0x02,0x01,0x00,0x00,0x02,0x01,0x00,0x00,0x02,0x01,0x00,0x00,0x02,0x01,0x00,0x00,0x02,0x03,0x80,0x00,0x03,0x0F,0xE0,0x00,0x03,0x00,0x00,0x00,0x03,0xC0,0x00,0x00,0x00,0x60,0x00,0x00},/*"F",38*/ +{0x00,0x00,0x00,0x00,0x00,0x07,0xF8,0x00,0x00,0x3F,0xFE,0x00,0x00,0x70,0x07,0x80,0x01,0xC0,0x01,0xC0,0x01,0x00,0x00,0x40,0x03,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x01,0x00,0x20,0x20,0x01,0x00,0x20,0x40,0x03,0xC0,0x3F,0x80,0x00,0x30,0x3F,0x80,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00},/*"G",39*/ +{0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xE0,0x02,0x00,0x80,0x20,0x02,0x00,0x80,0x20,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x02,0x00,0x80,0x20,0x02,0x00,0x80,0x20,0x03,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xE0,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x00,0x00,0x00,0x00},/*"H",40*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xE0,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"I",41*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0E,0x00,0x00,0x00,0x0F,0x00,0x00,0x00,0x0F,0x00,0x00,0x00,0x01,0x02,0x00,0x00,0x01,0x02,0x00,0x00,0x01,0x02,0x00,0x00,0x03,0x02,0x00,0x00,0x06,0x03,0xFF,0xFF,0xFC,0x03,0xFF,0xFF,0xF8,0x02,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"J",42*/ +{0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xE0,0x02,0x00,0xC0,0x20,0x02,0x01,0x00,0x20,0x00,0x07,0x80,0x00,0x00,0x0F,0xE0,0x00,0x00,0x30,0xF8,0x00,0x02,0x60,0x3E,0x20,0x03,0x80,0x0F,0x20,0x03,0x00,0x03,0xE0,0x02,0x00,0x00,0xE0,0x02,0x00,0x00,0x20,0x00,0x00,0x00,0x20},/*"K",43*/ +{0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xE0,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x60,0x00,0x00,0x00,0xE0,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00},/*"L",44*/ +{0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x03,0xE0,0x00,0x20,0x03,0xFF,0x00,0x20,0x00,0x1F,0xF0,0x00,0x00,0x01,0xFF,0x80,0x00,0x00,0x0F,0xE0,0x00,0x00,0x1E,0x00,0x00,0x03,0xE0,0x00,0x00,0x3E,0x00,0x20,0x03,0xE0,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xE0,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20},/*"M",45*/ +{0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x03,0x80,0x00,0x20,0x03,0xF0,0x00,0x20,0x00,0xFC,0x00,0x00,0x00,0x1F,0x00,0x00,0x00,0x07,0xC0,0x00,0x00,0x01,0xF0,0x00,0x00,0x00,0x7C,0x00,0x02,0x00,0x1F,0x80,0x02,0x00,0x07,0xE0,0x03,0xFF,0xFF,0xE0,0x02,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"N",46*/ +{0x00,0x00,0x00,0x00,0x00,0x0F,0xF8,0x00,0x00,0x3F,0xFE,0x00,0x00,0xF0,0x07,0x80,0x01,0x80,0x00,0xC0,0x01,0x00,0x00,0x40,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x01,0x00,0x00,0x40,0x01,0x80,0x00,0xC0,0x00,0xF0,0x03,0x80,0x00,0x3F,0xFE,0x00,0x00,0x0F,0xF8,0x00,0x00,0x00,0x00,0x00},/*"O",47*/ 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+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x7F,0xFF,0xE0,0x01,0xFF,0xFF,0xE0,0x01,0x04,0x00,0x20,0x03,0x04,0x00,0x20,0x02,0x04,0x00,0x20,0x02,0x04,0x00,0x20,0x02,0x04,0x00,0x00,0x02,0x00,0x00,0x00,0x01,0xC0,0x00,0x00,0x01,0xC0,0x00,0x00},/*"f",70*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x00,0xE3,0x3E,0x00,0x03,0xFF,0xC2,0x00,0x02,0x0C,0xC3,0x00,0x04,0x04,0xC1,0x00,0x04,0x04,0xC1,0x00,0x04,0x04,0xC1,0x00,0x04,0x04,0xC1,0x00,0x06,0x0C,0xC1,0x00,0x03,0xF8,0xC3,0x00,0x05,0xF0,0x62,0x00,0x06,0x00,0x7E,0x00,0x06,0x00,0x3C,0x00,0x00,0x00,0x00},/*"g",71*/ +{0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x07,0xFF,0xFF,0xE0,0x00,0x01,0x00,0x20,0x00,0x02,0x00,0x20,0x00,0x06,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x20,0x00,0x06,0x00,0x20,0x00,0x03,0xFF,0xE0,0x00,0x01,0xFF,0xE0,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20},/*"h",72*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x03,0x87,0xFF,0xE0,0x03,0x8F,0xFF,0xE0,0x03,0x80,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"i",73*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x04,0x00,0x01,0x00,0x04,0x00,0x01,0x00,0x04,0x00,0x03,0x00,0x04,0x00,0x06,0x03,0x87,0xFF,0xFC,0x03,0x8F,0xFF,0xF8,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"j",74*/ +{0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x07,0xFF,0xFF,0xE0,0x00,0x00,0x08,0x20,0x00,0x00,0x10,0x20,0x00,0x00,0x30,0x00,0x00,0x00,0xFC,0x00,0x00,0x05,0x8E,0x00,0x00,0x07,0x07,0xA0,0x00,0x06,0x01,0xE0,0x00,0x04,0x00,0xE0,0x00,0x04,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x00},/*"k",75*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x02,0x00,0x00,0x20,0x03,0xFF,0xFF,0xE0,0x07,0xFF,0xFF,0xE0,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"l",76*/ +{0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x20,0x00,0x07,0xFF,0xE0,0x00,0x0F,0xFF,0xE0,0x00,0x02,0x00,0x20,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x20,0x00,0x07,0xFF,0xE0,0x00,0x03,0xFF,0xE0,0x00,0x02,0x00,0x20,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x20,0x00,0x07,0xFF,0xE0,0x00,0x03,0xFF,0xE0,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x00},/*"m",77*/ +{0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x07,0xFF,0xE0,0x00,0x0F,0xFF,0xE0,0x00,0x01,0x00,0x20,0x00,0x02,0x00,0x20,0x00,0x02,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x20,0x00,0x06,0x00,0x20,0x00,0x03,0xFF,0xE0,0x00,0x01,0xFF,0xE0,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20},/*"n",78*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0x00,0x00,0xFF,0x80,0x00,0x03,0x81,0xC0,0x00,0x02,0x00,0x40,0x00,0x06,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x06,0x00,0x20,0x00,0x02,0x00,0x40,0x00,0x03,0x81,0xC0,0x00,0x01,0xFF,0x80,0x00,0x00,0x7E,0x00,0x00,0x00,0x00,0x00},/*"o",79*/ +{0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x01,0x00,0x04,0x00,0x01,0x00,0x07,0xFF,0xFF,0x00,0x0F,0xFF,0xFF,0x00,0x01,0x00,0xC1,0x00,0x02,0x00,0x41,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x06,0x00,0x40,0x00,0x03,0x01,0xC0,0x00,0x01,0xFF,0x80,0x00,0x00,0x7E,0x00,0x00,0x00,0x00,0x00},/*"p",80*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0x00,0x01,0xFF,0x80,0x00,0x03,0x80,0xC0,0x00,0x02,0x00,0x60,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x02,0x00,0x41,0x00,0x03,0x00,0xC1,0x00,0x03,0xFF,0xFF,0x00,0x07,0xFF,0xFF,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01},/*"q",81*/ +{0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x0F,0xFF,0xE0,0x00,0x0F,0xFF,0xE0,0x00,0x00,0xC0,0x20,0x00,0x01,0x00,0x20,0x00,0x02,0x00,0x20,0x00,0x06,0x00,0x20,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00},/*"r",82*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xE0,0x00,0x01,0xC0,0xE0,0x00,0x03,0xE0,0x40,0x00,0x06,0x30,0x20,0x00,0x04,0x30,0x20,0x00,0x04,0x18,0x20,0x00,0x04,0x18,0x20,0x00,0x04,0x18,0x20,0x00,0x04,0x0C,0x20,0x00,0x02,0x0C,0x60,0x00,0x03,0x07,0xC0,0x00,0x07,0x83,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"s",83*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x0C,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0xFF,0xFF,0xC0,0x00,0x04,0x00,0x60,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x40,0x00,0x00,0x01,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"t",84*/ +{0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x07,0xFF,0x80,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x60,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x04,0x00,0x40,0x00,0x04,0x00,0x80,0x00,0x07,0xFF,0xE0,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x40},/*"u",85*/ +{0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x07,0x80,0x00,0x00,0x07,0xF0,0x00,0x00,0x04,0xFE,0x00,0x00,0x04,0x1F,0xC0,0x00,0x00,0x03,0xE0,0x00,0x00,0x03,0x80,0x00,0x00,0x1C,0x00,0x00,0x04,0x60,0x00,0x00,0x07,0x80,0x00,0x00,0x06,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"v",86*/ +{0x00,0x04,0x00,0x00,0x00,0x06,0x00,0x00,0x00,0x07,0xC0,0x00,0x00,0x07,0xFC,0x00,0x00,0x04,0x3F,0x80,0x00,0x00,0x03,0xE0,0x00,0x04,0x0F,0x80,0x00,0x06,0xF0,0x00,0x00,0x07,0xF0,0x00,0x00,0x07,0xFF,0x80,0x00,0x04,0x0F,0xE0,0x00,0x00,0x03,0x80,0x00,0x04,0x3C,0x00,0x00,0x07,0xC0,0x00,0x00,0x06,0x00,0x00,0x00,0x04,0x00,0x00},/*"w",87*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x00,0x04,0x00,0x20,0x00,0x04,0x00,0x60,0x00,0x07,0x00,0xE0,0x00,0x07,0x83,0x20,0x00,0x07,0xE6,0x00,0x00,0x04,0xF8,0x00,0x00,0x00,0x3C,0x00,0x00,0x04,0x5E,0x20,0x00,0x05,0x87,0xA0,0x00,0x06,0x01,0xE0,0x00,0x04,0x00,0x60,0x00,0x04,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x00},/*"x",88*/ +{0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x03,0x00,0x07,0x00,0x03,0x00,0x07,0xE0,0x01,0x00,0x04,0xF8,0x01,0x00,0x04,0x1F,0x02,0x00,0x00,0x07,0xFC,0x00,0x00,0x00,0xE0,0x00,0x00,0x07,0x00,0x00,0x04,0x38,0x00,0x00,0x07,0xC0,0x00,0x00,0x06,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00},/*"y",89*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x80,0x60,0x00,0x06,0x00,0xE0,0x00,0x04,0x03,0xE0,0x00,0x04,0x07,0xA0,0x00,0x04,0x0E,0x20,0x00,0x04,0x3C,0x20,0x00,0x04,0x70,0x20,0x00,0x05,0xE0,0x20,0x00,0x07,0x80,0x20,0x00,0x07,0x00,0x60,0x00,0x04,0x00,0xE0,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"z",90*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x01,0x40,0x00,0x07,0xFE,0x3F,0xF8,0x08,0x00,0x00,0x04,0x10,0x00,0x00,0x02,0x10,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"{",91*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"|",92*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x00,0x02,0x10,0x00,0x00,0x02,0x08,0x00,0x00,0x04,0x07,0xFE,0x3F,0xF8,0x00,0x01,0x40,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"}",93*/ +{0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x30,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x30,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x0C,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"~",94*/ +}; +#endif diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_gs2200m.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_gs2200m.c new file mode 100755 index 000000000..71f3de73e --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_gs2200m.c @@ -0,0 +1,247 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_gs2200m.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "arm_arch.h" +#include "chip.h" +#include "stm32.h" + +#include +#include "stm32f4aiit.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define GPIO_GS2200M_INT (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | \ + GPIO_OPENDRAIN | GPIO_PORTD | GPIO_PIN2) + +#define GPIO_GS2200M_XRST (GPIO_OUTPUT | GPIO_PUSHPULL | \ + GPIO_OUTPUT_SET | GPIO_SPEED_50MHz | \ + GPIO_PORTE | GPIO_PIN4) + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int gs2200m_irq_attach(xcpt_t, FAR void *); +static void gs2200m_irq_enable(void); +static void gs2200m_irq_disable(void); +static uint32_t gs2200m_dready(int *); +static void gs2200m_reset(bool); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct gs2200m_lower_s g_wifi_lower = +{ + .attach = gs2200m_irq_attach, + .enable = gs2200m_irq_enable, + .disable = gs2200m_irq_disable, + .dready = gs2200m_dready, + .reset = gs2200m_reset +}; + +static FAR void *g_devhandle = NULL; +static volatile int32_t _enable_count = 0; +static volatile uint32_t _n_called; + +static xcpt_t g_irq_handler = NULL; +static FAR void *g_irq_arg = NULL; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: gs2200m_irq_attach + ****************************************************************************/ + +static int gs2200m_irq_attach(xcpt_t handler, FAR void *arg) +{ + /* NOTE: Just save the handler and arg here */ + + g_irq_handler = handler; + g_irq_arg = arg; + return 0; +} + +/**************************************************************************** + * Name: gs2200m_irq_enable + ****************************************************************************/ + +static void gs2200m_irq_enable(void) +{ + irqstate_t flags = spin_lock_irqsave(NULL); + uint32_t dready = 0; + + wlinfo("== ec:%" PRId32 " called=%" PRId32 " \n", + _enable_count, _n_called++); + + if (0 == _enable_count) + { + /* Check if irq has been asserted */ + + dready = gs2200m_dready(NULL); + + /* NOTE: stm32 does not support level-triggered irq */ + + stm32_gpiosetevent(GPIO_GS2200M_INT, true, false, + true, g_irq_handler, g_irq_arg); + } + + _enable_count++; + + spin_unlock_irqrestore(NULL, flags); + + if (dready) + { + /* Call g_irq_handler directly */ + + wlinfo("== ** call irq handler ** \n"); + g_irq_handler(0, NULL, g_irq_arg); + } +} + +/**************************************************************************** + * Name: gs2200m_irq_disable + ****************************************************************************/ + +static void gs2200m_irq_disable(void) +{ + irqstate_t flags = spin_lock_irqsave(NULL); + + wlinfo("== ec:%" PRId32 " called=%" PRId32 " \n", + _enable_count, _n_called++); + + _enable_count--; + + if (0 == _enable_count) + { + stm32_gpiosetevent(GPIO_GS2200M_INT, false, false, + false, NULL, NULL); + } + + spin_unlock_irqrestore(NULL, flags); +} + +/**************************************************************************** + * Name: gs2200m_dready + ****************************************************************************/ + +static uint32_t gs2200m_dready(int *ec) +{ + irqstate_t flags = spin_lock_irqsave(NULL); + + uint32_t r = stm32_gpioread(GPIO_GS2200M_INT); + + if (ec) + { + /* Copy enable count (just for debug) */ + + *ec = _enable_count; + } + + spin_unlock_irqrestore(NULL, flags); + return r; +} + +/**************************************************************************** + * Name: gs2200m_reset + ****************************************************************************/ + +static void gs2200m_reset(bool reset) +{ + stm32_gpiowrite(GPIO_GS2200M_XRST, !reset); +} + +/**************************************************************************** + * Name: spi_pincontrol + * + * Description: + * Configure SPI1 pins + * + ****************************************************************************/ + +static void _config_pin(void) +{ + stm32_configgpio(GPIO_GS2200M_XRST); /* Assign PD6 as XRST */ + stm32_configgpio(GPIO_GS2200M_INT); /* Assign PD2 as IRQ */ + stm32_configgpio(GPIO_SPI3_SCK_1); /* Assign PB3 as SPI3_SCK */ + stm32_configgpio(GPIO_SPI3_MISO_1); /* Assign PB4 as SPI3_MISO */ + stm32_configgpio(GPIO_SPI3_MOSI_1); /* Assign PB5 as SPI3_MOSI */ + stm32_configgpio(GPIO_GS2200M_CS); /* Assign PD7 as chip select */ +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_gs2200m_initialize + ****************************************************************************/ + +int stm32_gs2200m_initialize(FAR const char *devpath, int bus) +{ + FAR struct spi_dev_s *spi; + + wlinfo("Initializing GS2200M..\n"); + + if (!g_devhandle) + { + /* Configure pin */ + + _config_pin(); + + /* Initialize spi device */ + + spi = stm32_spibus_initialize(bus); + + if (!spi) + { + wlerr("ERROR: Failed to initialize spi%d.\n", bus); + return -ENODEV; + } + + g_devhandle = gs2200m_register(devpath, spi, &g_wifi_lower); + + if (!g_devhandle) + { + wlerr("ERROR: Failed to register gs2200m driver.\n"); + return -ENODEV; + } + } + + return OK; +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_hciuart.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_hciuart.c new file mode 100755 index 000000000..da47b0ae4 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_hciuart.c @@ -0,0 +1,82 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_hciuart.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#include "stm32_hciuart.h" +#include "stm32f4aiit.h" + +#include + +#ifdef HAVE_HCIUART + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: hciuart_dev_initialize + * + * Description: + * This function is called by board initialization logic to configure the + * Bluetooth HCI UART driver + * + * Input Parameters: + * None + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int hciuart_dev_initialize(void) +{ + int ret; + + /* Perform one-time initialization */ + + hciuart_initialize(); + + /* Instantiate the HCI UART lower half interface + * Then initialize the HCI UART upper half driver with the bluetooth stack + */ + + ret = btuart_register(hciuart_instantiate(HCIUART_SERDEV)); + if (ret < 0) + { + wlerr("ERROR: btuart_register() failed: %d\n", ret); + } + + return ret; +} + +#endif /* HAVE_HCIUART */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_idle.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_idle.c new file mode 100755 index 000000000..ef15e83fd --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_idle.c @@ -0,0 +1,277 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_idle.c + * + * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#include +#include +#include +#include + +#include + +#include "arm_internal.h" +#include "stm32_pm.h" +#include "stm32_rcc.h" +#include "stm32_exti.h" + +#include "stm32f4aiit.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* Does the board support an IDLE LED to indicate that the board is in the + * IDLE state? + */ + +#if defined(CONFIG_ARCH_LEDS) && defined(LED_IDLE) +# define BEGIN_IDLE() board_autoled_on(LED_IDLE) +# define END_IDLE() board_autoled_off(LED_IDLE) +#else +# define BEGIN_IDLE() +# define END_IDLE() +#endif + +/* Values for the RTC Alarm to wake up from the PM_STANDBY mode */ + +#ifndef CONFIG_PM_ALARM_SEC +# define CONFIG_PM_ALARM_SEC 3 +#endif + +#ifndef CONFIG_PM_ALARM_NSEC +# define CONFIG_PM_ALARM_NSEC 0 +#endif + +#define PM_IDLE_DOMAIN 0 /* Revisit */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if 0 /* Not used */ +static void up_alarmcb(void); +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_idlepm + * + * Description: + * Perform IDLE state power management. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void stm32_idlepm(void) +{ + static enum pm_state_e oldstate = PM_NORMAL; + enum pm_state_e newstate; + irqstate_t flags; + int ret; + + /* Decide, which power saving level can be obtained */ + + newstate = pm_checkstate(PM_IDLE_DOMAIN); + + /* Check for state changes */ + + if (newstate != oldstate) + { + sinfo("newstate= %d oldstate=%d\n", newstate, oldstate); + + flags = enter_critical_section(); + + /* Force the global state change */ + + ret = pm_changestate(PM_IDLE_DOMAIN, newstate); + if (ret < 0) + { + /* The new state change failed, revert to the preceding state */ + + pm_changestate(PM_IDLE_DOMAIN, oldstate); + + /* No state change... */ + + goto errout; + } + + /* Then perform board-specific, state-dependent logic here */ + + switch (newstate) + { + case PM_NORMAL: + { + } + break; + + case PM_IDLE: + { + } + break; + + case PM_STANDBY: + { +#ifdef CONFIG_RTC_ALARM + /* Disable RTC Alarm interrupt */ + +#warning "missing logic" + + /* Configure the RTC alarm to Auto Wake the system */ + +#warning "missing logic" + + /* The tv_nsec value must not exceed 1,000,000,000. That + * would be an invalid time. + */ + +#warning "missing logic" + + /* Set the alarm */ + +#warning "missing logic" +#endif + /* Call the STM32 stop mode */ + + stm32_pmstop(true); + + /* We have been re-awakened by some even: A button press? + * An alarm? Cancel any pending alarm and resume the normal + * operation. + */ + +#ifdef CONFIG_RTC_ALARM +#warning "missing logic" +#endif + /* Resume normal operation */ + + pm_changestate(PM_IDLE_DOMAIN, PM_NORMAL); + newstate = PM_NORMAL; + } + break; + + case PM_SLEEP: + { + /* We should not return from standby mode. The only way out + * of standby is via the reset path. + */ + + stm32_pmstandby(); + } + break; + + default: + break; + } + + /* Save the new state */ + + oldstate = newstate; + +errout: + leave_critical_section(flags); + } +} +#else +# define stm32_idlepm() +#endif + +/**************************************************************************** + * Name: up_alarmcb + * + * Description: + * RTC alarm service routine + * + ****************************************************************************/ + +#if 0 /* Not used */ +static void up_alarmcb(void) +{ + /* This alarm occurs because there wasn't any EXTI interrupt during the + * PM_STANDBY period. So just go to sleep. + */ + + pm_changestate(PM_IDLE_DOMAIN, PM_SLEEP); +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_idle + * + * Description: + * up_idle() is the logic that will be executed when their is no other + * ready-to-run task. This is processor idle time and will continue until + * some interrupt occurs to cause a context switch from the idle task. + * + * Processing in this state may be processor-specific. e.g., this is where + * power management operations might be performed. + * + ****************************************************************************/ + +void up_idle(void) +{ +#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS) + /* If the system is idle and there are no timer interrupts, then process + * "fake" timer interrupts. Hopefully, something will wake up. + */ + + nxsched_process_timer(); +#else + + /* Perform IDLE mode power management */ + + BEGIN_IDLE(); + stm32_idlepm(); + END_IDLE(); +#endif +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_max7219.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_max7219.c new file mode 100755 index 000000000..c142de415 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_max7219.c @@ -0,0 +1,112 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_max7219.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32_spi.h" +#include "stm32f4aiit.h" + +#ifdef CONFIG_NX_LCDDRIVER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define LCD_SPI_PORTNO 1 /* On SPI1 */ + +#ifndef CONFIG_LCD_CONTRAST +# define CONFIG_LCD_CONTRAST 60 +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +FAR struct spi_dev_s *g_spidev; +FAR struct lcd_dev_s *g_lcddev; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + ****************************************************************************/ + +int board_lcd_initialize(void) +{ + g_spidev = stm32_spibus_initialize(LCD_SPI_PORTNO); + + if (g_spidev == NULL) + { + lcderr("ERROR: Failed to initialize SPI port %d\n", LCD_SPI_PORTNO); + return -ENODEV; + } + + return OK; +} + +/**************************************************************************** + * Name: board_lcd_getdev + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + g_lcddev = max7219_initialize(g_spidev, lcddev); + if (!g_lcddev) + { + lcderr("ERROR: Failed to bind SPI port 1 to LCD %d\n", lcddev); + } + else + { + lcdinfo("SPI port 1 bound to LCD %d\n", lcddev); + + return g_lcddev; + } + + return NULL; +} + +/**************************************************************************** + * Name: board_lcd_uninitialize + ****************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* TO-FIX */ +} + +#endif /* CONFIG_NX_LCDDRIVER */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_max7219_leds.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_max7219_leds.c new file mode 100755 index 000000000..e0607d691 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_max7219_leds.c @@ -0,0 +1,88 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_max7219_leds.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32.h" +#include "stm32_spi.h" +#include "stm32f4aiit.h" + +#if defined(CONFIG_SPI) && defined(CONFIG_STM32_SPI1) && \ + defined(CONFIG_LEDS_MAX7219) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define MAX7219_SPI_PORTNO 1 /* On SPI1 */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_max7219init + * + * Description: + * Initialize the max7219 to control 7-segment numeric display + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/numdisp0" + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int stm32_max7219init(FAR const char *devpath) +{ + FAR struct spi_dev_s *spi; + int ret; + + spi = stm32_spibus_initialize(MAX7219_SPI_PORTNO); + if (spi == NULL) + { + return -ENODEV; + } + + /* Register the MAX7219 Driver at the specified location. */ + + ret = max7219_leds_register(devpath, spi); + if (ret < 0) + { + lederr("ERROR: max7219_leds_register(%s) failed: %d\n", + devpath, ret); + return ret; + } + + return OK; +} + +#endif /* CONFIG_SPI && CONFIG_LEDS_MAX7219 */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_mmcsd.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_mmcsd.c new file mode 100755 index 000000000..88bb5a6ff --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_mmcsd.c @@ -0,0 +1,105 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_mmcsd.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "arm_arch.h" +#include "chip.h" +#include "stm32.h" + +#include +#include "stm32f4aiit.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# error "SD driver requires CONFIG_DISABLE_MOUNTPOINT to be disabled" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_spi1register + * + * Description: + * Registers media change callback + ****************************************************************************/ + +int stm32_spi2register(struct spi_dev_s *dev, spi_mediachange_t callback, + void *arg) +{ + /* TODO: media change callback */ + + return OK; +} + +/**************************************************************************** + * Name: stm32_mmcsd_initialize + * + * Description: + * Initialize SPI-based SD card and card detect thread. + ****************************************************************************/ + +int stm32_mmcsd_initialize(int port, int minor) +{ + struct spi_dev_s *spi; + int rv; + + stm32_configgpio(GPIO_MMCSD_NCD); /* Assign SD_DET */ + stm32_configgpio(GPIO_SPI2_SCK_2); /* Assign PB13 as SPI2_SCK */ + stm32_configgpio(GPIO_MMCSD_NSS); /* Assign CS */ + stm32_gpiowrite(GPIO_MMCSD_NSS, 1); /* Ensure the CS is inactive */ + + mcinfo("INFO: Initializing mmcsd port %d minor %d \n", + port, minor); + + spi = stm32_spibus_initialize(port); + if (spi == NULL) + { + mcerr("ERROR: Failed to initialize SPI port %d\n", port); + return -ENODEV; + } + + rv = mmcsd_spislotinitialize(minor, minor, spi); + if (rv < 0) + { + mcerr("ERROR: Failed to bind SPI port %d to SD slot %d\n", + port, minor); + return rv; + } + + spiinfo("INFO: mmcsd card has been initialized successfully\n"); + return OK; +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_netinit.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_netinit.c new file mode 100755 index 000000000..911108236 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_netinit.c @@ -0,0 +1,39 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_netinit.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arm_netinitialize + ****************************************************************************/ + +#if defined(CONFIG_NET) && !defined(CONFIG_NETDEV_LATEINIT) +void arm_netinitialize(void) +{ +} +#endif diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ostest.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ostest.c new file mode 100755 index 000000000..11650e4a1 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ostest.c @@ -0,0 +1,95 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_ostest.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "arm_arch.h" +#include "arm_internal.h" +#include "stm32f4aiit.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#undef HAVE_FPU +#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_TESTING_OSTEST_FPUTESTDISABLE) && \ + defined(CONFIG_TESTING_OSTEST_FPUSIZE) && defined(CONFIG_SCHED_WAITPID) +# define HAVE_FPU 1 +#endif + +#ifdef HAVE_FPU + +#if CONFIG_TESTING_OSTEST_FPUSIZE != (4*SW_FPU_REGS) +# error "CONFIG_TESTING_OSTEST_FPUSIZE has the wrong size" +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static uint32_t g_saveregs[XCPTCONTEXT_REGS]; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/* Given an array of size CONFIG_TESTING_OSTEST_FPUSIZE, this function will + * return the current FPU registers. + */ + +void arch_getfpu(FAR uint32_t *fpusave) +{ + irqstate_t flags; + + /* Take a snapshot of the thread context right now */ + + flags = enter_critical_section(); + arm_saveusercontext(g_saveregs); + + /* Return only the floating register values */ + + memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS)); + leave_critical_section(flags); +} + +/* Given two arrays of size CONFIG_TESTING_OSTEST_FPUSIZE this function + * will compare them and return true if they are identical. + */ + +bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2) +{ + return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0; +} + +#endif /* HAVE_FPU */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_pca9635.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_pca9635.c new file mode 100755 index 000000000..e2473b110 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_pca9635.c @@ -0,0 +1,89 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_pca9635.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include + +#include "stm32_gpio.h" +#include "stm32_i2c.h" +#include "stm32f4aiit.h" + +#ifdef CONFIG_PCA9635PW + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_pca9635_initialize + * + * Description: + * This function is called by board initialization logic to configure the + * LED PWM chip. This function will register the driver as /dev/leddrv0. + * + * Input Parameters: + * None + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int stm32_pca9635_initialize(void) +{ + FAR struct i2c_master_s *i2c; + int ret; + + /* Get the I2C driver that interfaces with the pca9635 + * (PCA9635_I2CBUS) + */ + + i2c = stm32_i2cbus_initialize(PCA9635_I2CBUS); + if (!i2c) + { + _err("ERROR: Failed to initialize I2C%d\n", PCA9635_I2CBUS); + return -1; + } + + ret = pca9635pw_register("/dev/leddrv0", i2c, PCA9635_I2CADDR); + if (ret < 0) + { + snerr("ERROR: Failed to register PCA9635 driver: %d\n", ret); + return ret; + } + + return OK; +} + +#endif /* CONFIG_PCA9635PW */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_pm.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_pm.c new file mode 100755 index 000000000..cb957ccf8 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_pm.c @@ -0,0 +1,91 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_pm.c + * + * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "arm_internal.h" +#include "stm32_pm.h" +#include "stm32f4aiit.h" + +#ifdef CONFIG_PM + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_pminitialize + * + * Description: + * This function is called by MCU-specific logic at power-on reset in + * order to provide one-time initialization the power management subsystem. + * This function must be called *very* early in the initialization sequence + * *before* any other device drivers are initialized (since they may + * attempt to register with the power management subsystem). + * + * Input Parameters: + * None. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void arm_pminitialize(void) +{ + /* Then initialize the NuttX power management subsystem proper */ + + pm_initialize(); + +#if defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS) + /* Initialize the buttons to wake up the system from low power modes */ + + stm32_pm_buttons(); +#endif + + /* Initialize the LED PM */ + + stm32_led_pminitialize(); +} + +#endif /* CONFIG_PM */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_pmbuttons.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_pmbuttons.c new file mode 100755 index 000000000..c07846875 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_pmbuttons.c @@ -0,0 +1,138 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_pmbuttons.c + * + * Copyright (C) 2012, 2015-2017 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Diego Sanchez + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include + +#include +#include +#include + +#include "arm_arch.h" +#include "nvic.h" +#include "stm32_pwr.h" +#include "stm32_pm.h" +#include "stm32f4aiit.h" + +#if defined(CONFIG_PM) && defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_ARCH_BUTTONS +# error "CONFIG_ARCH_BUTTONS is not defined in the configuration" +#endif + +#ifndef CONFIG_ARCH_IRQBUTTONS +# warning "CONFIG_ARCH_IRQBUTTONS is not defined in the configuration" +#endif + +#ifndef CONFIG_PM_BUTTON_ACTIVITY +# define CONFIG_PM_BUTTON_ACTIVITY 10 +#endif + +#define PM_IDLE_DOMAIN 0 /* Revisit */ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +static int button_handler(int irq, FAR void *context, FAR void *arg); +#endif /* CONFIG_ARCH_IRQBUTTONS */ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: button_handler + * + * Description: + * Handle a button wake-up interrupt + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +static int button_handler(int irq, FAR void *context, FAR void *arg) +{ + /* At this point the MCU should have already awakened. The state + * change will be handled in the IDLE loop when the system is re-awakened + * The button interrupt handler should be totally ignorant of the PM + * activities and should report button activity as if nothing + * special happened. + */ + + pm_activity(PM_IDLE_DOMAIN, CONFIG_PM_BUTTON_ACTIVITY); + return OK; +} +#endif /* CONFIG_ARCH_IRQBUTTONS */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_pm_buttons + * + * Description: + * Configure the user button of the STM32f4discovery board as EXTI, + * so it is able to wakeup the MCU from the PM_STANDBY mode + * + ****************************************************************************/ + +void stm32_pm_buttons(void) +{ + /* Initialize the button GPIOs */ + + board_button_initialize(); + +#ifdef CONFIG_ARCH_IRQBUTTONS + board_button_irq(0, button_handler, NULL); +#endif +} + +#endif /* CONFIG_PM && CONFIG_ARCH_IDLE_CUSTOM && CONFIG_PM_BUTTONS)*/ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_pwm.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_pwm.c new file mode 100755 index 000000000..5be798ec9 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_pwm.c @@ -0,0 +1,123 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_pwm.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "chip.h" +#include "arm_arch.h" +#include "stm32_pwm.h" +#include "stm32f4aiit.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* PWM + * + * The stm32f4aiit.has no real on-board PWM devices, but the board can + * be configured to output a pulse train using TIM4 CH2. This pin is used by + * FSMC is connected to CN5 just for this purpose: + * + * PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB) + * + * FSMC must be disabled in this case! + */ + +#define HAVE_PWM 1 + +#ifndef CONFIG_PWM +# undef HAVE_PWM +#endif + +#ifndef CONFIG_STM32_TIM4 +# undef HAVE_PWM +#endif + +#ifndef CONFIG_STM32_TIM4_PWM +# undef HAVE_PWM +#endif + +#if !defined(CONFIG_STM32_TIM4_CHANNEL) || CONFIG_STM32_TIM4_CHANNEL != STM32F4DISCOVERY_PWMCHANNEL +# undef HAVE_PWM +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_pwm_setup + * + * Description: + * Initialize PWM and register the PWM device. + * + ****************************************************************************/ + +int stm32_pwm_setup(void) +{ +#ifdef HAVE_PWM + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + pwm = stm32_pwminitialize(STM32F4DISCOVERY_PWMTIMER); + if (!pwm) + { + aerr("ERROR: Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + aerr("ERROR: pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +#else + return -ENODEV; +#endif +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_reset.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_reset.c new file mode 100755 index 000000000..495b70dcb --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_reset.c @@ -0,0 +1,62 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_reset.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#ifdef CONFIG_BOARDCTL_RESET + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_reset + * + * Description: + * Reset board. Support for this function is required by board-level + * logic if CONFIG_BOARDCTL_RESET is selected. + * + * Input Parameters: + * status - Status information provided with the reset event. This + * meaning of this status information is board-specific. If not + * used by a board, the value zero may be provided in calls to + * board_reset(). + * + * Returned Value: + * If this function returns, then it was not possible to power-off the + * board due to some constraints. The return value int this case is a + * board-specific reason for the failure to shutdown. + * + ****************************************************************************/ + +int board_reset(int status) +{ + up_systemreset(); + return 0; +} + +#endif /* CONFIG_BOARDCTL_RESET */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_rgbled.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_rgbled.c new file mode 100755 index 000000000..636c1d202 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_rgbled.c @@ -0,0 +1,169 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_rgbled.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "arm_arch.h" +#include "stm32_pwm.h" +#include "stm32f4aiit.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#define HAVE_RGBLED 1 + +#ifndef CONFIG_PWM +# undef HAVE_RGBLED +#endif + +#ifndef CONFIG_STM32_TIM1 +# undef HAVE_RGBLED +#endif + +#ifndef CONFIG_STM32_TIM2 +# undef HAVE_RGBLED +#endif + +#ifndef CONFIG_STM32_TIM3 +# undef HAVE_RGBLED +#endif + +#ifndef CONFIG_STM32_TIM1_PWM +# undef HAVE_RGBLED +#endif + +#ifndef CONFIG_STM32_TIM2_PWM +# undef HAVE_RGBLED +#endif + +#ifndef CONFIG_STM32_TIM3_PWM +# undef HAVE_RGBLED +#endif + +#ifdef HAVE_RGBLED + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_rgbled_setup + * + * Description: + * Configure the RGB LED. + * + ****************************************************************************/ + +int stm32_rgbled_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *ledr; + struct pwm_lowerhalf_s *ledg; + struct pwm_lowerhalf_s *ledb; + struct pwm_info_s info; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + ledr = stm32_pwminitialize(1); + if (!ledr) + { + lederr("ERROR: Failed to get the STM32 PWM lower half to LEDR\n"); + return -ENODEV; + } + + /* Define frequency and duty cycle */ + + info.frequency = 100; + info.duty = 0; + + /* Initialize LED R */ + + ledr->ops->setup(ledr); + ledr->ops->start(ledr, &info); + + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + ledg = stm32_pwminitialize(2); + if (!ledg) + { + lederr("ERROR: Failed to get the STM32 PWM lower half to LEDG\n"); + return -ENODEV; + } + + /* Initialize LED G */ + + ledg->ops->setup(ledg); + ledg->ops->start(ledg, &info); + + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + ledb = stm32_pwminitialize(3); + if (!ledb) + { + lederr("ERROR: Failed to get the STM32 PWM lower half to LEDB\n"); + return -ENODEV; + } + + /* Initialize LED B */ + + ledb->ops->setup(ledb); + ledb->ops->start(ledb, &info); + + /* Register the RGB LED diver at "/dev/rgbled0" */ + + ret = rgbled_register("/dev/rgbled0", ledr, ledg, ledb); + if (ret < 0) + { + lederr("ERROR: rgbled_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#else +# error "HAVE_RGBLED is undefined" +#endif /* HAVE_RGBLED */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_romfs.h b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_romfs.h new file mode 100755 index 000000000..97e041e7d --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_romfs.h @@ -0,0 +1,76 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_romfs.h + * + * Copyright (C) 2017 Tomasz Wozniak. All rights reserved. + * Author: Tomasz Wozniak + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_STM32_STM32F4DISCOVERY_SRC_STM32_ROMFS_H +#define __BOARDS_ARM_STM32_STM32F4DISCOVERY_SRC_STM32_ROMFS_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifdef CONFIG_STM32_ROMFS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define ROMFS_SECTOR_SIZE 64 + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_romfs_initialize + * + * Description: + * Registers built-in ROMFS image as block device and mounts it. + * + * Returned Value: + * Zero (OK) on success, a negated errno value on error. + * + * Assumptions/Limitations: + * Memory addresses [&romfs_data_begin .. &romfs_data_begin) should contain + * ROMFS volume data, as included in the assembly snippet above (l. 84). + * + ****************************************************************************/ + +int stm32_romfs_initialize(void); + +#endif /* CONFIG_STM32_ROMFS */ + +#endif /* __BOARDS_ARM_STM32_STM32F4DISCOVERY_SRC_STM32_ROMFS_H */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_romfs_initialize.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_romfs_initialize.c new file mode 100755 index 000000000..0e2c5e46d --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_romfs_initialize.c @@ -0,0 +1,158 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_romfs_initialize.c + * This file provides contents of an optional ROMFS volume, mounted at boot. + * + * Copyright (C) 2017 Tomasz Wozniak. All rights reserved. + * Author: Tomasz Wozniak + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include "stm32_romfs.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef CONFIG_STM32_ROMFS +# error "CONFIG_STM32_ROMFS must be defined" +#else + +#ifndef CONFIG_STM32_ROMFS_IMAGEFILE +# error "CONFIG_STM32_ROMFS_IMAGEFILE must be defined" +#endif + +#ifndef CONFIG_STM32_ROMFS_DEV_MINOR +# error "CONFIG_STM32_ROMFS_DEV_MINOR must be defined" +#endif + +#ifndef CONFIG_STM32_ROMFS_MOUNTPOINT +# error "CONFIG_STM32_ROMFS_MOUNTPOINT must be defined" +#endif + +#define NSECTORS(size) (((size) + ROMFS_SECTOR_SIZE - 1)/ROMFS_SECTOR_SIZE) + +#define STR2(m) #m +#define STR(m) STR2(m) + +#define MKMOUNT_DEVNAME(m) "/dev/ram" STR(m) +#define MOUNT_DEVNAME MKMOUNT_DEVNAME(CONFIG_STM32_ROMFS_DEV_MINOR) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +__asm__ ( + ".section .rodata\n" + ".balign 16\n" + ".globl romfs_data_begin\n" +"romfs_data_begin:\n" + ".incbin " STR(CONFIG_STM32_ROMFS_IMAGEFILE) "\n"\ + \ + ".balign " STR(ROMFS_SECTOR_SIZE) "\n" + ".globl romfs_data_end\n" +"romfs_data_end:\n" + ".globl romfs_data_size\n" +"romfs_data_size:\n" + ".word romfs_data_end - romfs_data_begin\n" + ".previous\n"); + +extern const char romfs_data_begin; +extern const char romfs_data_end; +extern const int romfs_data_size; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_romfs_initialize + * + * Description: + * Registers the aboveincluded binary file as block device. + * Then mounts the block device as ROMFS filesystems. + * + * Returned Value: + * Zero (OK) on success, a negated errno value on error. + * + * Assumptions/Limitations: + * Memory addresses [&romfs_data_begin .. &romfs_data_begin) should contain + * ROMFS volume data, as included in the assembly snippet above (l. 84). + * + ****************************************************************************/ + +int stm32_romfs_initialize(void) +{ + uintptr_t romfs_data_len; + int ret; + + /* Create a ROM disk for the /etc filesystem */ + + romfs_data_len = (uintptr_t)&romfs_data_end - (uintptr_t)&romfs_data_begin; + + ret = romdisk_register(CONFIG_STM32_ROMFS_DEV_MINOR, &romfs_data_begin, + NSECTORS(romfs_data_len), ROMFS_SECTOR_SIZE); + if (ret < 0) + { + ferr("ERROR: romdisk_register failed: %d\n", -ret); + return ret; + } + + /* Mount the file system */ + + finfo("Mounting ROMFS filesystem at target=%s with source=%s\n", + CONFIG_STM32_ROMFS_MOUNTPOINT, MOUNT_DEVNAME); + + ret = nx_mount(MOUNT_DEVNAME, CONFIG_STM32_ROMFS_MOUNTPOINT, + "romfs", MS_RDONLY, NULL); + if (ret < 0) + { + ferr("ERROR: nx_mount(%s,%s,romfs) failed: %d\n", + MOUNT_DEVNAME, CONFIG_STM32_ROMFS_MOUNTPOINT, ret); + return ret; + } + + return OK; +} + +#endif /* CONFIG_STM32_ROMFS */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_sdio.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_sdio.c new file mode 100755 index 000000000..6c6b3786a --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_sdio.c @@ -0,0 +1,163 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_sdio.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "stm32.h" +#include "stm32f4aiit.h" + +#ifdef HAVE_SDIO + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* Card detections requires card support and a card detection GPIO */ + +#define HAVE_NCD 1 +#if !defined(HAVE_SDIO) || !defined(GPIO_SDIO_NCD) +# undef HAVE_NCD +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static FAR struct sdio_dev_s *g_sdio_dev; +#ifdef HAVE_NCD +static bool g_sd_inserted = 0xff; /* Impossible value */ +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_ncd_interrupt + * + * Description: + * Card detect interrupt handler. + * + ****************************************************************************/ + +#ifdef HAVE_NCD +static int stm32_ncd_interrupt(int irq, FAR void *context, FAR void *arg) +{ + bool present; + + present = !stm32_gpioread(GPIO_SDIO_NCD); + if (present != g_sd_inserted) + { + sdio_mediachange(g_sdio_dev, present); + g_sd_inserted = present; + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_sdio_initialize + * + * Description: + * Initialize SDIO-based MMC/SD card support + * + ****************************************************************************/ + +int stm32_sdio_initialize(void) +{ + int ret; + +#ifdef HAVE_NCD + /* Card detect */ + + bool cd_status; + + /* Configure the card detect GPIO */ + + stm32_configgpio(GPIO_SDIO_NCD); + + /* Register an interrupt handler for the card detect pin */ + + stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true, + stm32_ncd_interrupt, NULL); +#endif + + /* Mount the SDIO-based MMC/SD block driver */ + + /* First, get an instance of the SDIO interface */ + + finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO); + + g_sdio_dev = sdio_initialize(SDIO_SLOTNO); + if (!g_sdio_dev) + { + ferr("ERROR: Failed to initialize SDIO slot %d\n", SDIO_SLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR); + + ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev); + if (ret != OK) + { + ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + finfo("Successfully bound SDIO to the MMC/SD driver\n"); + +#ifdef HAVE_NCD + /* Use SD card detect pin to check if a card is g_sd_inserted */ + + cd_status = !stm32_gpioread(GPIO_SDIO_NCD); + finfo("Card detect : %d\n", cd_status); + + sdio_mediachange(g_sdio_dev, cd_status); +#else + /* Assume that the SD card is inserted. What choice do we have? */ + + sdio_mediachange(g_sdio_dev, true); +#endif + + return OK; +} + +#endif /* HAVE_SDIO */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_spi.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_spi.c new file mode 100755 index 000000000..86a367758 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_spi.c @@ -0,0 +1,333 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_spi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "arm_arch.h" +#include "chip.h" +#include "stm32.h" + +#include "stm32f4aiit.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32f4discovery + * board. + * + ****************************************************************************/ + +void weak_function stm32_spidev_initialize(void) +{ +#ifdef CONFIG_ENC28J60 + stm32_configgpio(GPIO_ENC28J60_CS); + stm32_configgpio(GPIO_ENC28J60_RESET); + stm32_configgpio(GPIO_ENC28J60_INTR); +#endif + +#ifdef CONFIG_STM32_SPI1 + stm32_configgpio(GPIO_CS_MEMS); /* MEMS chip select */ +#endif +#if defined(CONFIG_STM32_SPI2) && defined(CONFIG_SENSORS_MAX31855) + stm32_configgpio(GPIO_MAX31855_CS); /* MAX31855 chip select */ +#endif +#if defined(CONFIG_LCD_MAX7219) || defined(CONFIG_LEDS_MAX7219) + stm32_configgpio(GPIO_MAX7219_CS); /* MAX7219 chip select */ +#endif +#ifdef CONFIG_LPWAN_SX127X + stm32_configgpio(GPIO_SX127X_CS); /* SX127x chip select */ +#endif + +#if defined(CONFIG_LCD_ST7567) || defined(CONFIG_LCD_ST7567) + stm32_configgpio(STM32_LCD_CS); /* ST7567/ST7789 chip select */ +#endif +#if defined(CONFIG_STM32_SPI2) && defined(CONFIG_SENSORS_MAX6675) + stm32_configgpio(GPIO_MAX6675_CS); /* MAX6675 chip select */ +#endif +#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) || \ + defined(CONFIG_LCD_SSD1351) + stm32_configgpio(GPIO_OLED_CS); /* OLED chip select */ +# if defined(CONFIG_LCD_UG2864AMBAG01) + stm32_configgpio(GPIO_OLED_A0); /* OLED Command/Data */ +# endif +# if defined(CONFIG_LCD_UG2864HSWEG01) || defined(CONFIG_LCD_SSD1351) + stm32_configgpio(GPIO_OLED_DC); /* OLED Command/Data */ +# endif +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status + * must be provided by board-specific logic. They are implementations of + * the select and status methods of the SPI interface defined by struct + * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including + * stm32_spibus_initialize()) are provided by common STM32 logic. To use + * this common SPI logic on your board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board + * is configured. + * 3. Add a calls to stm32_spibus_initialize() in your low level + * application initialization logic + * 4. The handle returned by stm32_spibus_initialize() may then be used to + * bind the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : + "de-assert"); + +#ifdef CONFIG_ENC28J60 + if (devid == SPIDEV_ETHERNET(0)) + { + /* Set the GPIO low to select and high to de-select */ + + stm32_gpiowrite(GPIO_ENC28J60_CS, !selected); + } +#endif + +#ifdef CONFIG_LPWAN_SX127X + if (devid == SPIDEV_LPWAN(0)) + { + stm32_gpiowrite(GPIO_SX127X_CS, !selected); + } +#endif + +#if defined(CONFIG_LCD_ST7567) || defined(CONFIG_LCD_ST7789) + if (devid == SPIDEV_DISPLAY(0)) + { + stm32_gpiowrite(STM32_LCD_CS, !selected); + } +#endif + +#if defined(CONFIG_LCD_MAX7219) || defined(CONFIG_LEDS_MAX7219) + if (devid == SPIDEV_DISPLAY(0)) + { + stm32_gpiowrite(GPIO_MAX7219_CS, !selected); + } +#endif + +#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) || \ + defined(CONFIG_LCD_SSD1351) + if (devid == SPIDEV_DISPLAY(0)) + { + stm32_gpiowrite(GPIO_OLED_CS, !selected); + } + else +#endif + { + stm32_gpiowrite(GPIO_CS_MEMS, !selected); + } +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + uint8_t status = 0; + +#ifdef CONFIG_LPWAN_SX127X + if (devid == SPIDEV_LPWAN(0)) + { + status |= SPI_STATUS_PRESENT; + } +#endif + + return status; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : + "de-assert"); + +#if defined(CONFIG_SENSORS_MAX31855) + if (devid == SPIDEV_TEMPERATURE(0)) + { + stm32_gpiowrite(GPIO_MAX31855_CS, !selected); + } +#endif + +#if defined(CONFIG_SENSORS_MAX6675) + if (devid == SPIDEV_TEMPERATURE(0)) + { + stm32_gpiowrite(GPIO_MAX6675_CS, !selected); + } +#endif + +#if defined(CONFIG_MMCSD_SPI) + if (devid == SPIDEV_MMCSD(0)) + { + stm32_gpiowrite(GPIO_MMCSD_NSS, !selected); + } +#endif +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + uint8_t ret = 0; +#if defined(CONFIG_MMCSD_SPI) + if (devid == SPIDEV_MMCSD(0)) + { + /* Note: SD_DET is pulled high when there's no SD card present. */ + + ret = stm32_gpioread(GPIO_MMCSD_NCD) ? 0 : 1; + } +#endif + + return ret; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : + "de-assert"); + +#if defined(CONFIG_WL_GS2200M) + if (devid == SPIDEV_WIRELESS(0)) + { + stm32_gpiowrite(GPIO_GS2200M_CS, !selected); + } +#endif +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ +#if defined(CONFIG_LCD_ST7567) || defined(CONFIG_LCD_ST7789) + if (devid == SPIDEV_DISPLAY(0)) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + */ + + stm32_gpiowrite(STM32_LCD_RS, !cmd); + + return OK; + } +#endif + +#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) || \ + defined(CONFIG_LCD_SSD1351) + if (devid == SPIDEV_DISPLAY(0)) + { + /* "This is the Data/Command control pad which determines whether the + * data bits are data or a command. + * + * A0 = "H": the inputs at D0 to D7 are treated as display data. + * A0 = "L": the inputs at D0 to D7 are transferred to the command + * registers." + */ + +# if defined(CONFIG_LCD_UG2864AMBAG01) + stm32_gpiowrite(GPIO_OLED_A0, !cmd); +# endif +# if defined(CONFIG_LCD_UG2864HSWEG01) || defined(CONFIG_LCD_SSD1351) + stm32_gpiowrite(GPIO_OLED_DC, !cmd); +# endif + return OK; + } +#endif + + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ + return -ENODEV; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ + return -ENODEV; +} +#endif +#endif /* CONFIG_SPI_CMDDATA */ + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ssd1289.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ssd1289.c new file mode 100755 index 000000000..69135253d --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ssd1289.c @@ -0,0 +1,387 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_ssd1289.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +#include "arm_arch.h" +#include "stm32.h" +#include "stm32f4aiit.h" + +#ifdef CONFIG_LCD_SSD1289 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_STM32_FSMC +# error "CONFIG_STM32_FSMC is required to use the LCD" +#endif + +/* STM32F4Discovery LCD Hardware Definitions ********************************/ + +/* LCD /CS is CE1 == NOR/SRAM Bank 1 + * + * Bank 1 = 0x60000000 | 0x00000000 + * Bank 2 = 0x60000000 | 0x04000000 + * Bank 3 = 0x60000000 | 0x08000000 + * Bank 4 = 0x60000000 | 0x0c000000 + * + * FSMC address bit 16 is used to distinguish command and data. + * FSMC address bits 0-24 correspond to ARM address bits 1-25. + */ + +#define STM32_LCDBASE ((uintptr_t)(0x60000000 | 0x00000000)) +#define LCD_INDEX (STM32_LCDBASE) +#define LCD_DATA (STM32_LCDBASE + 0x00020000) + +/* SRAM pin definitions */ + +#define LCD_NADDRLINES 1 /* A16 */ +#define LCD_NDATALINES 16 /* D0-15 */ + +/**************************************************************************** + * Private Function Protototypes + ****************************************************************************/ + +/* Low Level LCD access */ + +static void stm32_select(FAR struct ssd1289_lcd_s *dev); +static void stm32_deselect(FAR struct ssd1289_lcd_s *dev); +static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index); +#ifndef CONFIG_SSD1289_WRONLY +static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev); +#endif +static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data); +static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* LCD pin mapping (see boards/arm/stm32/stm324discovery/README.txt + * MAPPING TO STM32 F4: + * + * ---------------- ------------- ---------------------------------- + * STM32 FUNCTION LCD PIN STM32F4Discovery PIN + * ---------------- ------------- ---------------------------------- + * FSMC_D0 D0 pin 4 PD14 P1 pin 46 Conflict (Note 1) + * FSMC_D1 D1 pin 3 PD15 P1 pin 47 Conflict (Note 2) + * FSMC_D2 D2 pin 6 PD0 P2 pin 36 Free I/O + * FSMC_D3 D3 pin 5 PD1 P2 pin 33 Free I/O + * FSMC_D4 D4 pin 8 PE7 P1 pin 25 Free I/O + * FSMC_D5 D5 pin 7 PE8 P1 pin 26 Free I/O + * FSMC_D6 D6 pin 10 PE9 P1 pin 27 Free I/O + * FSMC_D7 D7 pin 9 PE10 P1 pin 28 Free I/O + * FSMC_D8 D8 pin 12 PE11 P1 pin 29 Free I/O + * FSMC_D9 D9 pin 11 PE12 P1 pin 30 Free I/O + * FSMC_D10 D10 pin 14 PE13 P1 pin 31 Free I/O + * FSMC_D11 D11 pin 13 PE14 P1 pin 32 Free I/O + * FSMC_D12 D12 pin 16 PE15 P1 pin 33 Free I/O + * FSMC_D13 D13 pin 15 PD8 P1 pin 40 Free I/O + * FSMC_D14 D14 pin 18 PD9 P1 pin 41 Free I/O + * FSMC_D15 D15 pin 17 PD10 P1 pin 42 Free I/O + * FSMC_A16 RS pin 19 PD11 P1 pin 27 Free I/O + * FSMC_NE1 ~CS pin 10 PD7 P2 pin 27 Free I/O + * FSMC_NWE ~WR pin 22 PD5 P2 pin 29 Conflict (Note 3) + * FSMC_NOE ~RD pin 21 PD4 P2 pin 32 Conflict (Note 4) + * PC6 RESET pin 24 PC6 P2 pin 47 Free I/O + * ---------------- ------------- ---------------------------------- + * + * 1 Used for the RED LED + * 2 Used for the BLUE LED + * 3 Used for the RED LED and for OTG FS Overcurrent. It may be okay to + * use for the parallel interface if PC0 is held high (or floating). + * PC0 enables the STMPS2141STR IC power switch that drives the OTG FS + * host VBUS. + * 4 Also the reset pin for the CS43L22 audio Codec. + */ + +#define GPIO_LCD_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN6) + +/* GPIO configurations unique to the LCD */ + +static const uint32_t g_lcdconfig[] = +{ + /* PC6(RESET), FSMC_A16, FSMC_NOE, FSMC_NWE, and FSMC_NE1 */ + + GPIO_LCD_RESET, GPIO_FSMC_A16, GPIO_FSMC_NOE, GPIO_FSMC_NWE, GPIO_FSMC_NE1 +}; +#define NLCD_CONFIG (sizeof(g_lcdconfig)/sizeof(uint32_t)) + +/* This is the driver state structure + * (there is no retained state information) + */ + +static struct ssd1289_lcd_s g_ssd1289 = +{ + .select = stm32_select, + .deselect = stm32_deselect, + .index = stm32_index, +#ifndef CONFIG_SSD1289_WRONLY + .read = stm32_read, +#endif + .write = stm32_write, + .backlight = stm32_backlight +}; + +/* The saved instance of the LCD driver */ + +static FAR struct lcd_dev_s *g_ssd1289drvr; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_select + * + * Description: + * Select the LCD device + * + ****************************************************************************/ + +static void stm32_select(FAR struct ssd1289_lcd_s *dev) +{ + /* Does not apply to this hardware */ +} + +/**************************************************************************** + * Name: stm32_deselect + * + * Description: + * De-select the LCD device + * + ****************************************************************************/ + +static void stm32_deselect(FAR struct ssd1289_lcd_s *dev) +{ + /* Does not apply to this hardware */ +} + +/**************************************************************************** + * Name: stm32_deselect + * + * Description: + * Set the index register + * + ****************************************************************************/ + +static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index) +{ + putreg16((uint16_t)index, LCD_INDEX); +} + +/**************************************************************************** + * Name: stm32_read + * + * Description: + * Read LCD data (GRAM data or register contents) + * + ****************************************************************************/ + +#ifndef CONFIG_SSD1289_WRONLY +static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev) +{ + return getreg16(LCD_DATA); +} +#endif + +/**************************************************************************** + * Name: stm32_write + * + * Description: + * Write LCD data (GRAM data or register contents) + * + ****************************************************************************/ + +static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data) +{ + putreg16((uint16_t)data, LCD_DATA); +} + +/**************************************************************************** + * Name: stm32_write + * + * Description: + * Write LCD data (GRAM data or register contents) + * + ****************************************************************************/ + +static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power) +{ +#warning "Missing logic" +} + +/**************************************************************************** + * Name: stm32_selectlcd + * + * Description: + * Initialize to the LCD + * + ****************************************************************************/ + +void stm32_selectlcd(void) +{ + /* Configure GPIO pins */ + + stm32_extmemdata(LCD_NDATALINES); /* Common data lines: D0-D15 */ + stm32_extmemgpios(g_lcdconfig, NLCD_CONFIG); /* LCD-specific control lines */ + + /* Enable AHB clocking to the FSMC */ + + stm32_fsmc_enable(); + + /* Color LCD configuration (LCD configured as follow): + * + * - Data/Address MUX = Disable "FSMC_BCR_MUXEN" just not enable it. + * - Extended Mode = Disable "FSMC_BCR_EXTMOD" + * - Memory Type = SRAM "FSMC_BCR_SRAM" + * - Data Width = 16bit "FSMC_BCR_MWID16" + * - Write Operation = Enable "FSMC_BCR_WREN" + * - Asynchronous Wait = Disable + */ + + /* Bank1 NOR/SRAM control register configuration */ + + putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1); + + /* Bank1 NOR/SRAM timing register configuration */ + + putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) | + FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) | + FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | + FSMC_BTR_ACCMODA, STM32_FSMC_BTR1); + + putreg32(0xffffffff, STM32_FSMC_BWTR1); + + /* Enable the bank by setting the MBKEN bit */ + + putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | + FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is fully + * initialized, display memory cleared, and the LCD ready to use, but with + * the power setting at 0 (full off). + * + ****************************************************************************/ + +int board_lcd_initialize(void) +{ + /* Only initialize the driver once */ + + if (!g_ssd1289drvr) + { + lcdinfo("Initializing\n"); + + /* Configure GPIO pins and configure the FSMC to support the LCD */ + + stm32_selectlcd(); + + /* Reset the LCD (active low) */ + + stm32_gpiowrite(GPIO_LCD_RESET, false); + up_mdelay(5); + stm32_gpiowrite(GPIO_LCD_RESET, true); + + /* Configure and enable the LCD */ + + up_mdelay(50); + g_ssd1289drvr = ssd1289_lcdinitialize(&g_ssd1289); + if (!g_ssd1289drvr) + { + lcderr("ERROR: ssd1289_lcdinitialize failed\n"); + return -ENODEV; + } + } + + /* Clear the display (setting it to the color 0=black) */ + +#if 0 /* Already done in the driver */ + ssd1289_clear(g_ssd1289drvr, 0); +#endif + + /* Turn the display off */ + + g_ssd1289drvr->setpower(g_ssd1289drvr, 0); + return OK; +} + +/**************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. + * This allows support for multiple LCD devices. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + DEBUGASSERT(lcddev == 0); + return g_ssd1289drvr; +} + +/**************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Uninitialize the LCD support + * + ****************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Turn the display off */ + + g_ssd1289drvr->setpower(g_ssd1289drvr, 0); +} + +#endif /* CONFIG_LCD_SSD1289 */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ssd1351.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ssd1351.c new file mode 100755 index 000000000..2c875dfe4 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ssd1351.c @@ -0,0 +1,133 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_ssd1351.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. + * Authors: Gregory Nutt + * Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32_spi.h" + +#include "stm32f4aiit.h" + +#ifdef CONFIG_LCD_SSD1351 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* The pin configurations here require that SPI1 is selected */ + +#ifndef CONFIG_STM32_SPI1 +# error "The OLED driver requires CONFIG_STM32_SPI1 in the configuration" +#endif + +#ifndef CONFIG_SSD1351_SPI4WIRE +# error "The configuration requires the SPI 4-wire interface" +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED GPIOs. This initial configuration is RESET low, + * putting the OLED into reset state. + */ + + stm32_configgpio(GPIO_OLED_RESET); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + stm32_gpiowrite(GPIO_OLED_RESET, true); + + /* Get the SPI1 port interface */ + + spi = stm32_spibus_initialize(1); + if (spi == NULL) + { + lcderr("ERROR: Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ssd1351_initialize(spi, devno); + if (dev == NULL) + { + lcderr("ERROR: Failed to bind SPI port 1 to OLED %d\n", devno); + } + else + { + lcdinfo("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on */ + + dev->setpower(dev, LCD_FULL_ON); + return dev; + } + } + + return NULL; +} + +#endif /* CONFIG_LCD_SSD1351 */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_st7032.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_st7032.c new file mode 100755 index 000000000..28b68e809 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_st7032.c @@ -0,0 +1,87 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_st7032.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32.h" +#include "stm32f4aiit.h" + +#if defined(CONFIG_I2C) && defined(CONFIG_STM32_I2C1) && \ + defined(CONFIG_LCD_ST7032) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define ST7032_I2C_PORTNO 1 /* On I2C1 */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_st7032init + * + * Description: + * Initialize the st7032 display + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/disp0" + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int stm32_st7032init(FAR const char *devpath) +{ + FAR struct i2c_master_s *i2c; + int ret; + + i2c = stm32_i2cbus_initialize(ST7032_I2C_PORTNO); + if (i2c == NULL) + { + return -ENODEV; + } + + /* Register the ST7032 Driver at the specified location. */ + + ret = st7032_register(devpath, i2c); + if (ret < 0) + { + lcderr("ERROR: st7032_register(%s) failed: %d\n", + devpath, ret); + return ret; + } + + return OK; +} + +#endif /* CONFIG_I2C && CONFIG_LEDS_ST7032 */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_st7567.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_st7567.c new file mode 100755 index 000000000..748a07eac --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_st7567.c @@ -0,0 +1,153 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_st7567.c + * + * Copyright (C) 2016 Uniquix Tecnologia. All rights reserved. + * Author: Alan Carvalho de Assis + * + * I used the JLX12864G-086 LCD module based on ST7567 controller. + * + * Based on boards/zkit-arm-1769/src/lpc17_40_lcd.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Manikandan + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "arm_arch.h" +#include "arm_internal.h" + +#include "stm32_gpio.h" +#include "stm32_spi.h" +#include "stm32f4aiit.h" + +#ifdef CONFIG_LCD_ST7567 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define LCD_SPI_PORTNO 1 /* On SPI1 */ + +#ifndef CONFIG_LCD_CONTRAST +# define CONFIG_LCD_CONTRAST 0x1f +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +FAR struct spi_dev_s *g_spidev; +FAR struct lcd_dev_s *g_lcddev; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + ****************************************************************************/ + +int board_lcd_initialize(void) +{ + stm32_configgpio(STM32_LCD_RST); + stm32_configgpio(STM32_LCD_RS); + stm32_gpiowrite(STM32_LCD_RST, 1); + stm32_gpiowrite(STM32_LCD_RS, 1); + + g_spidev = stm32_spibus_initialize(LCD_SPI_PORTNO); + + if (!g_spidev) + { + lcderr("ERROR: Failed to initialize SPI port %d\n", LCD_SPI_PORTNO); + return -ENODEV; + } + + stm32_gpiowrite(STM32_LCD_RST, 0); + up_mdelay(1); + stm32_gpiowrite(STM32_LCD_RST, 1); + return OK; +} + +/**************************************************************************** + * Name: board_lcd_getdev + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + g_lcddev = st7567_initialize(g_spidev, lcddev); + if (!g_lcddev) + { + lcderr("ERROR: Failed to bind SPI port 1 to LCD %d\n", lcddev); + } + else + { + lcdinfo("SPI port 1 bound to LCD %d\n", lcddev); + + /* And turn the LCD on (CONFIG_LCD_MAXPOWER should be 1) */ + + g_lcddev->setpower(g_lcddev, CONFIG_LCD_MAXPOWER); + + /* Set contrast to right value, otherwise background too dark */ + + g_lcddev->setcontrast(g_lcddev, CONFIG_LCD_CONTRAST); + + return g_lcddev; + } + + return NULL; +} + +/**************************************************************************** + * Name: board_lcd_uninitialize + ****************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* TO-FIX */ +} + +#endif /* CONFIG_LCD_ST7567 */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_st7789.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_st7789.c new file mode 100755 index 000000000..e20789987 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_st7789.c @@ -0,0 +1,129 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_st7789.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "stm32.h" +#include "stm32_gpio.h" +#include "stm32_spi.h" +#include "stm32f4aiit.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define LCD_SPI_PORTNO 1 + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct spi_dev_s *g_spidev; +static struct lcd_dev_s *g_lcd = NULL; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is + * fully initialized, display memory cleared, and the LCD ready to use, but + * with the power setting at 0 (full off). + * + ****************************************************************************/ + +int board_lcd_initialize(void) +{ + stm32_configgpio(STM32_LCD_RST); + stm32_configgpio(STM32_LCD_RS); + + g_spidev = stm32_spibus_initialize(LCD_SPI_PORTNO); + if (!g_spidev) + { + lcderr("ERROR: Failed to initialize SPI port %d\n", LCD_SPI_PORTNO); + return -ENODEV; + } + + stm32_gpiowrite(STM32_LCD_RST, 0); + up_mdelay(1); + stm32_gpiowrite(STM32_LCD_RST, 1); + up_mdelay(120); + + return OK; +} + +/**************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This + * allows support for multiple LCD devices. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int devno) +{ + g_lcd = st7789_lcdinitialize(g_spidev); + if (!g_lcd) + { + lcderr("ERROR: Failed to bind SPI port %d to LCD %d\n", LCD_SPI_PORTNO, + devno); + } + else + { + lcdinfo("SPI port %d bound to LCD %d\n", LCD_SPI_PORTNO, devno); + return g_lcd; + } + + return NULL; +} + +/**************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Uninitialize the LCD support + * + ****************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Turn the display off */ + + g_lcd->setpower(g_lcd, 0); +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_sx127x.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_sx127x.c new file mode 100755 index 000000000..dc02e45b5 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_sx127x.c @@ -0,0 +1,201 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_sx127x.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32_exti.h" +#include "stm32_spi.h" + +#include "stm32f4aiit.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* SX127X on SPI1 bus */ + +#define SX127X_SPI 1 + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void sx127x_chip_reset(void); +static int sx127x_opmode_change(int opmode); +static int sx127x_freq_select(uint32_t freq); +static int sx127x_pa_select(bool enable); +static int sx127x_irq0_attach(xcpt_t isr, FAR void *arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +struct sx127x_lower_s lower = +{ + .irq0attach = sx127x_irq0_attach, + .reset = sx127x_chip_reset, + .opmode_change = sx127x_opmode_change, + .freq_select = sx127x_freq_select, + .pa_select = sx127x_pa_select, + .pa_force = false +}; + +static bool g_high_power_output = false; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sx127x_irq0_attach + ****************************************************************************/ + +static int sx127x_irq0_attach(xcpt_t isr, FAR void *arg) +{ + wlinfo("Attach DIO0 IRQ\n"); + + /* IRQ on rising edge */ + + stm32_gpiosetevent(GPIO_SX127X_DIO0, true, false, false, isr, arg); + return OK; +} + +/**************************************************************************** + * Name: sx127x_chip_reset + ****************************************************************************/ + +static void sx127x_chip_reset(void) +{ + wlinfo("SX127X RESET\n"); + + /* Configure reset as output */ + + stm32_configgpio(GPIO_SX127X_RESET); + + /* Set pin to zero */ + + stm32_gpiowrite(GPIO_SX127X_RESET, false); + + /* Wait 1 ms */ + + nxsig_usleep(1000); + + /* Configure reset as input */ + + stm32_configgpio(GPIO_SX127X_RESET | GPIO_INPUT | GPIO_FLOAT); + + /* Wait 10 ms */ + + nxsig_usleep(10000); +} + +/**************************************************************************** + * Name: sx127x_opmode_change + ****************************************************************************/ + +static int sx127x_opmode_change(int opmode) +{ + /* Nothing to do */ + + return OK; +} + +/**************************************************************************** + * Name: sx127x_freq_select + ****************************************************************************/ + +static int sx127x_freq_select(uint32_t freq) +{ + int ret = OK; + + /* Only HF supported (BAND3 - 860-930 MHz) */ + + if (freq < SX127X_HFBAND_THR) + { + ret = -EINVAL; + wlerr("LF band not supported\n"); + } + + return ret; +} + +/**************************************************************************** + * Name: sx127x_pa_select + ****************************************************************************/ + +static int sx127x_pa_select(bool enable) +{ + g_high_power_output = enable; + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +int stm32_lpwaninitialize(void) +{ + FAR struct spi_dev_s *spidev; + int ret = OK; + + wlinfo("Register the sx127x module\n"); + + /* Setup DIO0 */ + + stm32_configgpio(GPIO_SX127X_DIO0); + + /* Init SPI bus */ + + spidev = stm32_spibus_initialize(SX127X_SPI); + if (!spidev) + { + wlerr("ERROR: Failed to initialize SPI %d bus\n", SX127X_SPI); + ret = -ENODEV; + goto errout; + } + + /* Initialize SX127X */ + + ret = sx127x_register(spidev, &lower); + if (ret < 0) + { + wlerr("ERROR: Failed to register sx127x\n"); + goto errout; + } + +errout: + return ret; +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_timer.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_timer.c new file mode 100755 index 000000000..fcd90f57a --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_timer.c @@ -0,0 +1,82 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_timer.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * With modifications from Calvin Maguranis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#include "stm32_tim.h" +#include "stm32f4aiit.h" + +#ifdef CONFIG_TIMER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_timer_driver_setup + * + * Description: + * Configure the timer driver. + * + * Input Parameters: + * devpath - The full path to the timer device. + * This should be of the form /dev/timer0 + * timer - The timer's number. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int stm32_timer_driver_setup(FAR const char *devpath, int timer) +{ + return stm32_timer_initialize(devpath, timer); +} + +#endif diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ug2864ambag01.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ug2864ambag01.c new file mode 100755 index 000000000..fb9109251 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ug2864ambag01.c @@ -0,0 +1,141 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_ug2864ambag01.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32_spi.h" + +#include "stm32f4aiit.h" + +#ifdef CONFIG_LCD_UG2864AMBAG01 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* The pin configurations here require that SPI1 is selected */ + +#ifndef CONFIG_STM32_SPI1 +# error "The OLED driver requires CONFIG_STM32_SPI1 in the configuration" +#endif + +#ifndef CONFIG_SPI_CMDDATA +# error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration" +#endif + +/* Pin Configuration ********************************************************/ + +/* UG-2864AMBAG01 OLED Display (SPI 4-wire): + * + * --------------------------+---------------------------------------------- + * Connector CON10 J1: | STM32F4Discovery + * --------------+-----------+---------------------------------------------- + * CON10 J1: | CON20 J2: | P1/P2: + * --------------+-----------+---------------------------------------------- + * 1 3v3 | 3,4 3v3 | P2 3V + * 3 /RESET | 8 /RESET | P2 PB6 (Arbitrary selection) + * 5 /CS | 7 /CS | P2 PB7 (Arbitrary selection)(2) + * 7 A0 | 9 A0 | P2 PB8 (Arbitrary selection)(2) + * 9 LED+ (N/C) | ----- | ----- + * 2 5V Vcc | 1,2 Vcc | P2 5V + * 4 DI | 18 D1/SI | P1 PA7 (GPIO_SPI1_MOSI==GPIO_SPI1_MOSI_1 (1)) + * 6 SCLK | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK==GPIO_SPI1_SCK_1 (2)) + * 8 LED- (N/C) | ----- | ------ + * 10 GND | 20 GND | P2 GND + * --------------+-----------+---------------------------------------------- + * (1) Required because of on-board MEMS + * (2) Note that the OLED CS and A0 are managed in the stm32_spi.c file. + * ------------------------------------------------------------------------- + */ + +/* Definitions in stm32f4aiit.h */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED GPIOs. This initial configuration is RESET low, + * putting the OLED into reset state. + */ + + stm32_configgpio(GPIO_OLED_RESET); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + stm32_gpiowrite(GPIO_OLED_RESET, true); + + /* Get the SPI1 port interface */ + + spi = stm32_spibus_initialize(1); + if (!spi) + { + lcderr("ERROR: Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ug2864ambag01_initialize(spi, devno); + if (!dev) + { + lcderr("ERROR: Failed to bind SPI port 1 to OLED %d\n", devno); + } + else + { + lcdinfo("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on */ + + dev->setpower(dev, CONFIG_LCD_MAXPOWER); + return dev; + } + } + + return NULL; +} +#endif /* CONFIG_LCD_UG2864AMBAG01 */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ug2864hsweg01.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ug2864hsweg01.c new file mode 100755 index 000000000..ca27f224a --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_ug2864hsweg01.c @@ -0,0 +1,141 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_ug2864hsweg01.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32_spi.h" + +#include "stm32f4aiit.h" + +#ifdef CONFIG_LCD_UG2864HSWEG01 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* The pin configurations here require that SPI1 is selected */ + +#ifndef CONFIG_STM32_SPI1 +# error "The OLED driver requires CONFIG_STM32_SPI1 in the configuration" +#endif + +#ifndef CONFIG_SPI_CMDDATA +# error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration" +#endif + +/* Pin Configuration ********************************************************/ + +/* UG-2864HSWEG01 OLED Display (SPI 4-wire): + * + * --------------------------+---------------------------------------------- + * Connector CON10 J1: | STM32F4Discovery + * --------------+-----------+---------------------------------------------- + * CON10 J1: | CON20 J2: | P1/P2: + * --------------+-----------+---------------------------------------------- + * 1 3v3 | 3,4 3v3 | P2 3V + * 3 /RESET | 8 /RESET | P2 PB6 (Arbitrary selection) + * 5 /CS | 7 /CS | P2 PB7 (Arbitrary selection)(2) + * 7 D/C | 9 D/C | P2 PB8 (Arbitrary selection)(2) + * 9 LED+ (N/C) | ----- | ----- + * 2 5V Vcc | 1,2 Vcc | P2 5V + * 4 DI | 18 D1/SI | P1 PA7 (GPIO_SPI1_MOSI==GPIO_SPI1_MOSI_1 (1)) + * 6 SCLK | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK==GPIO_SPI1_SCK_1 (2)) + * 8 LED- (N/C) | ----- | ------ + * 10 GND | 20 GND | P2 GND + * --------------+-----------+---------------------------------------------- + * (1) Required because of on-board MEMS + * (2) Note that the OLED CS and D/C are managed in the stm32_spi.c file. + * ------------------------------------------------------------------------- + */ + +/* Definitions in stm32f4aiit.h */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_graphics_setup + * + * Description: + * Called by NX initialization logic to configure the OLED. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno) +{ + FAR struct spi_dev_s *spi; + FAR struct lcd_dev_s *dev; + + /* Configure the OLED GPIOs. This initial configuration is RESET low, + * putting the OLED into reset state. + */ + + stm32_configgpio(GPIO_OLED_RESET); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + stm32_gpiowrite(GPIO_OLED_RESET, true); + + /* Get the SPI1 port interface */ + + spi = stm32_spibus_initialize(1); + if (!spi) + { + lcderr("ERROR: Failed to initialize SPI port 1\n"); + } + else + { + /* Bind the SPI port to the OLED */ + + dev = ssd1306_initialize(spi, NULL, devno); + if (!dev) + { + lcderr("ERROR: Failed to bind SPI port 1 to OLED %d\n", devno); + } + else + { + lcdinfo("Bound SPI port 1 to OLED %d\n", devno); + + /* And turn the OLED on */ + + dev->setpower(dev, CONFIG_LCD_MAXPOWER); + return dev; + } + } + + return NULL; +} +#endif /* CONFIG_LCD_UG2864AMBAG01 */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_uid.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_uid.c new file mode 100755 index 000000000..1f4d0c3b5 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_uid.c @@ -0,0 +1,70 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_uid.c + * + * Copyright (C) 2015 Marawan Ragab. All rights reserved. + * Author: Marawan Ragab + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include "stm32_uid.h" + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef OK +# define OK 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#if defined(CONFIG_BOARDCTL_UNIQUEID) +int board_uniqueid(uint8_t *uniqueid) +{ + if (uniqueid == 0) + { + return -EINVAL; + } + + stm32_get_uniqueid(uniqueid); + return OK; +} +#endif diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_usb.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_usb.c new file mode 100755 index 000000000..77fca438e --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_usb.c @@ -0,0 +1,343 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_usb.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "arm_arch.h" +#include "stm32.h" +#include "stm32_otgfs.h" +#include "stm32f4aiit.h" + +#ifdef CONFIG_STM32_OTGFS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST) +# define HAVE_USB 1 +#else +# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST" +# undef HAVE_USB +#endif + +#ifndef CONFIG_STM32F4DISCO_USBHOST_PRIO +# define CONFIG_STM32F4DISCO_USBHOST_PRIO 100 +#endif + +#ifndef CONFIG_STM32F4DISCO_USBHOST_STACKSIZE +# define CONFIG_STM32F4DISCO_USBHOST_STACKSIZE 1024 +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_USBHOST +static struct usbhost_connection_s *g_usbconn; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: usbhost_waiter + * + * Description: + * Wait for USB devices to be connected. + * + ****************************************************************************/ + +#ifdef CONFIG_USBHOST +static int usbhost_waiter(int argc, char *argv[]) +{ + struct usbhost_hubport_s *hport; + + uinfo("Running\n"); + for (; ; ) + { + /* Wait for the device to change state */ + + DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport)); + uinfo("%s\n", hport->connected ? "connected" : "disconnected"); + + /* Did we just become connected? */ + + if (hport->connected) + { + /* Yes.. enumerate the newly connected device */ + + CONN_ENUMERATE(g_usbconn, hport); + } + } + + /* Keep the compiler from complaining */ + + return 0; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup + * USB-related GPIO pins for the STM32F4Discovery board. + * + ****************************************************************************/ + +void stm32_usbinitialize(void) +{ + /* The OTG FS has an internal soft pull-up. + * No GPIO configuration is required + */ + + /* Configure the OTG FS VBUS sensing GPIO, + * Power On, and Overcurrent GPIOs + */ + +#ifdef CONFIG_STM32_OTGFS + stm32_configgpio(GPIO_OTGFS_VBUS); + stm32_configgpio(GPIO_OTGFS_PWRON); + stm32_configgpio(GPIO_OTGFS_OVER); +#endif +} + +/**************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host + * functionality. + * This function will start a thread that will monitor for device + * connection/disconnection events. + * + ****************************************************************************/ + +#ifdef CONFIG_USBHOST +int stm32_usbhost_initialize(void) +{ + int pid; +#if defined(CONFIG_USBHOST_HUB) || defined(CONFIG_USBHOST_MSC) || \ + defined(CONFIG_USBHOST_HIDKBD) || defined(CONFIG_USBHOST_HIDMOUSE) || \ + defined(CONFIG_USBHOST_XBOXCONTROLLER) + int ret; +#endif + + /* First, register all of the class drivers needed to support the drivers + * that we care about: + */ + + uinfo("Register class drivers\n"); + +#ifdef CONFIG_USBHOST_HUB + /* Initialize USB hub class support */ + + ret = usbhost_hub_initialize(); + if (ret < 0) + { + uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_MSC + /* Register the USB mass storage class class */ + + ret = usbhost_msc_initialize(); + if (ret != OK) + { + uerr("ERROR: Failed to register the mass storage class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_CDCACM + /* Register the CDC/ACM serial class */ + + ret = usbhost_cdcacm_initialize(); + if (ret != OK) + { + uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret); + } +#endif + +#ifdef CONFIG_USBHOST_HIDKBD + /* Initialize the HID keyboard class */ + + ret = usbhost_kbdinit(); + if (ret != OK) + { + uerr("ERROR: Failed to register the HID keyboard class\n"); + } +#endif + +#ifdef CONFIG_USBHOST_HIDMOUSE + /* Initialize the HID mouse class */ + + ret = usbhost_mouse_init(); + if (ret != OK) + { + uerr("ERROR: Failed to register the HID mouse class\n"); + } +#endif + +#ifdef CONFIG_USBHOST_XBOXCONTROLLER + /* Initialize the HID mouse class */ + + ret = usbhost_xboxcontroller_init(); + if (ret != OK) + { + uerr("ERROR: Failed to register the XBox Controller class\n"); + } +#endif + + /* Then get an instance of the USB host interface */ + + uinfo("Initialize USB host\n"); + g_usbconn = stm32_otgfshost_initialize(0); + if (g_usbconn) + { + /* Start a thread to handle device connection. */ + + uinfo("Start usbhost_waiter\n"); + + pid = kthread_create("usbhost", CONFIG_STM32F4DISCO_USBHOST_PRIO, + CONFIG_STM32F4DISCO_USBHOST_STACKSIZE, + (main_t)usbhost_waiter, (FAR char * const *)NULL); + return pid < 0 ? -ENOEXEC : OK; + } + + return -ENODEV; +} +#endif + +/**************************************************************************** + * Name: stm32_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. This function must be + * provided be each platform that implements the STM32 OTG FS host + * interface + * + * "On-chip 5 V VBUS generation is not supported. For this reason, a + * charge pump or, if 5 V are available on the application board, a + * basic power switch, must be added externally to drive the 5 V VBUS + * line. The external charge pump can be driven by any GPIO output. + * When the application decides to power on VBUS using the chosen GPIO, + * it must also set the port power bit in the host port control and + * status register (PPWR bit in OTG_FS_HPRT). + * + * "The application uses this field to control power to this port, + * and the core clears this bit on an overcurrent condition." + * + * Input Parameters: + * iface - For future growth to handle multiple USB host interface. + * Should be zero. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_USBHOST +void stm32_usbhost_vbusdrive(int iface, bool enable) +{ + DEBUGASSERT(iface == 0); + + if (enable) + { + /* Enable the Power Switch by driving the enable pin low */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, false); + } + else + { + /* Disable the Power Switch by driving the enable pin high */ + + stm32_gpiowrite(GPIO_OTGFS_PWRON, true); + } +} +#endif + +/**************************************************************************** + * Name: stm32_setup_overcurrent + * + * Description: + * Setup to receive an interrupt-level callback if an overcurrent + * condition is detected. + * + * Input Parameters: + * handler - New overcurrent interrupt handler + * arg - The argument provided for the interrupt handler + * + * Returned Value: + * Zero (OK) is returned on success. Otherwise, a negated errno value + * is returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef CONFIG_USBHOST +int stm32_setup_overcurrent(xcpt_t handler, void *arg) +{ + return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg); +} +#endif + +/**************************************************************************** + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV + * driver is used. This function is called whenever the USB enters or + * leaves suspend mode. This is an opportunity for the board logic to + * shutdown clocks, power, etc. while the USB is suspended. + * + ****************************************************************************/ + +#ifdef CONFIG_USBDEV +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + uinfo("resume: %d\n", resume); +} +#endif + +#endif /* CONFIG_STM32_OTGFS */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_usbmsc.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_usbmsc.c new file mode 100755 index 000000000..a209fc1c7 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_usbmsc.c @@ -0,0 +1,70 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4discovery/src/stm32_usbmsc.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "stm32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1 +# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_usbmsc_initialize + * + * Description: + * Perform architecture specific initialization of the USB MSC device. + * + ****************************************************************************/ + +int board_usbmsc_initialize(int port) +{ + /* If system/usbmsc is built as an NSH command, then SD slot should + * already have been initialized in board_app_initialize() + * (see stm32_appinit.c). + * In this case, there is nothing further to be done here. + */ + +#ifndef CONFIG_NSH_BUILTIN_APPS + return stm32_sdinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1); +#else + return OK; +#endif +} diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_usergpio.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_usergpio.c new file mode 100644 index 000000000..0558767be --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_usergpio.c @@ -0,0 +1,321 @@ +/**************************************************************************** + * boards/arm/stm32/aiit-arm32-board/src/stm32_gpio.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include + +#include "chip.h" +#include "stm32.h" +#include "stm32f4aiit.h" + +#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32gpio_dev_s +{ + struct gpio_dev_s gpio; + uint8_t id; +}; + +struct stm32gpint_dev_s +{ + struct stm32gpio_dev_s stm32gpio; + pin_interrupt_t callback; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value); +static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value); +static int gpout_write(FAR struct gpio_dev_s *dev, bool value); +static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value); +static int gpint_attach(FAR struct gpio_dev_s *dev, + pin_interrupt_t callback); +static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct gpio_operations_s gpin_ops = +{ + .go_read = gpin_read, + .go_write = NULL, + .go_attach = NULL, + .go_enable = NULL, +}; + +static const struct gpio_operations_s gpout_ops = +{ + .go_read = gpout_read, + .go_write = gpout_write, + .go_attach = NULL, + .go_enable = NULL, +}; + +static const struct gpio_operations_s gpint_ops = +{ + .go_read = gpint_read, + .go_write = NULL, + .go_attach = gpint_attach, + .go_enable = gpint_enable, +}; + +#if BOARD_NGPIOIN > 0 +/* This array maps the GPIO pins used as INPUT */ + +static const uint32_t g_gpioinputs[BOARD_NGPIOIN] = +{ + GPIO_LCDBL_IN, +}; + +static struct stm32gpio_dev_s g_gpin[BOARD_NGPIOIN]; +#endif + +#if BOARD_NGPIOOUT +/* This array maps the GPIO pins used as OUTPUT */ + +static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] = +{ + GPIO_LCDBL, +}; + +static struct stm32gpio_dev_s g_gpout[BOARD_NGPIOOUT]; +#endif + +#if BOARD_NGPIOINT > 0 +/* This array maps the GPIO pins used as INTERRUPT INPUTS */ + +static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] = +{ + GPIO_INT1, +}; + +static struct stm32gpint_dev_s g_gpint[BOARD_NGPIOINT]; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static int stm32gpio_interrupt(int irq, void *context, void *arg) +{ + FAR struct stm32gpint_dev_s *stm32gpint = + (FAR struct stm32gpint_dev_s *)arg; + + DEBUGASSERT(stm32gpint != NULL && stm32gpint->callback != NULL); + gpioinfo("Interrupt! callback=%p\n", stm32gpint->callback); + + stm32gpint->callback(&stm32gpint->stm32gpio.gpio, + stm32gpint->stm32gpio.id); + return OK; +} + +static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value) +{ + FAR struct stm32gpio_dev_s *stm32gpio = + (FAR struct stm32gpio_dev_s *)dev; + + DEBUGASSERT(stm32gpio != NULL && value != NULL); + DEBUGASSERT(stm32gpio->id < BOARD_NGPIOIN); + gpioinfo("Reading...\n"); + + *value = stm32_gpioread(g_gpioinputs[stm32gpio->id]); + return OK; +} + +static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value) +{ + FAR struct stm32gpio_dev_s *stm32gpio = + (FAR struct stm32gpio_dev_s *)dev; + + DEBUGASSERT(stm32gpio != NULL && value != NULL); + DEBUGASSERT(stm32gpio->id < BOARD_NGPIOOUT); + gpioinfo("Reading...\n"); + + *value = stm32_gpioread(g_gpiooutputs[stm32gpio->id]); + return OK; +} + +static int gpout_write(FAR struct gpio_dev_s *dev, bool value) +{ + FAR struct stm32gpio_dev_s *stm32gpio = + (FAR struct stm32gpio_dev_s *)dev; + + DEBUGASSERT(stm32gpio != NULL); + DEBUGASSERT(stm32gpio->id < BOARD_NGPIOOUT); + gpioinfo("Writing %d\n", (int)value); + + stm32_gpiowrite(g_gpiooutputs[stm32gpio->id], value); + return OK; +} + +static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value) +{ + FAR struct stm32gpint_dev_s *stm32gpint = + (FAR struct stm32gpint_dev_s *)dev; + + DEBUGASSERT(stm32gpint != NULL && value != NULL); + DEBUGASSERT(stm32gpint->stm32gpio.id < BOARD_NGPIOINT); + gpioinfo("Reading int pin...\n"); + + *value = stm32_gpioread(g_gpiointinputs[stm32gpint->stm32gpio.id]); + return OK; +} + +static int gpint_attach(FAR struct gpio_dev_s *dev, + pin_interrupt_t callback) +{ + FAR struct stm32gpint_dev_s *stm32gpint = + (FAR struct stm32gpint_dev_s *)dev; + + gpioinfo("Attaching the callback\n"); + + /* Make sure the interrupt is disabled */ + + stm32_gpiosetevent(g_gpiointinputs[stm32gpint->stm32gpio.id], false, + false, false, NULL, NULL); + + gpioinfo("Attach %p\n", callback); + stm32gpint->callback = callback; + return OK; +} + +static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable) +{ + FAR struct stm32gpint_dev_s *stm32gpint = + (FAR struct stm32gpint_dev_s *)dev; + + if (enable) + { + if (stm32gpint->callback != NULL) + { + gpioinfo("Enabling the interrupt\n"); + + /* Configure the interrupt for rising edge */ + + stm32_gpiosetevent(g_gpiointinputs[stm32gpint->stm32gpio.id], + true, false, false, stm32gpio_interrupt, + &g_gpint[stm32gpint->stm32gpio.id]); + } + } + else + { + gpioinfo("Disable the interrupt\n"); + stm32_gpiosetevent(g_gpiointinputs[stm32gpint->stm32gpio.id], + false, false, false, NULL, NULL); + } + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_gpio_initialize + * + * Description: + * Initialize GPIO drivers for use with /apps/examples/gpio + * + ****************************************************************************/ + +int stm32_gpio_initialize(void) +{ + int i; + int pincount = 0; + +#if BOARD_NGPIOIN > 0 + for (i = 0; i < BOARD_NGPIOIN; i++) + { + /* Setup and register the GPIO pin */ + + g_gpin[i].gpio.gp_pintype = GPIO_INPUT_PIN; + g_gpin[i].gpio.gp_ops = &gpin_ops; + g_gpin[i].id = i; + gpio_pin_register(&g_gpin[i].gpio, pincount); + + /* Configure the pin that will be used as input */ + + stm32_configgpio(g_gpioinputs[i]); + + pincount++; + } +#endif + +#if BOARD_NGPIOOUT > 0 + for (i = 0; i < BOARD_NGPIOOUT; i++) + { + /* Setup and register the GPIO pin */ + + g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN; + g_gpout[i].gpio.gp_ops = &gpout_ops; + g_gpout[i].id = i; + gpio_pin_register(&g_gpout[i].gpio, pincount); + + /* Configure the pin that will be used as output */ + + stm32_gpiowrite(g_gpiooutputs[i], 0); + stm32_configgpio(g_gpiooutputs[i]); + + pincount++; + } +#endif + +#if BOARD_NGPIOINT > 0 + for (i = 0; i < BOARD_NGPIOINT; i++) + { + /* Setup and register the GPIO pin */ + + g_gpint[i].stm32gpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN; + g_gpint[i].stm32gpio.gpio.gp_ops = &gpint_ops; + g_gpint[i].stm32gpio.id = i; + gpio_pin_register(&g_gpint[i].stm32gpio.gpio, pincount); + + /* Configure the pin that will be used as interrupt input */ + + stm32_configgpio(g_gpiointinputs[i]); + + pincount++; + } +#endif + + return 0; +} +#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_userleds.c b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_userleds.c new file mode 100755 index 000000000..2b7551d57 --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32_userleds.c @@ -0,0 +1,216 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4aiit/src/stm32_userleds.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "arm_arch.h" +#include "arm_internal.h" + +#include "stm32.h" +#include "stm32f4aiit.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* This array maps an LED number to GPIO pin configuration */ + +static uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4 +}; + +/**************************************************************************** + * Private Function Protototypes + ****************************************************************************/ + +/* LED Power Management */ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_PM +static struct pm_callback_s g_ledscb = +{ + .notify = led_pm_notify, + .prepare = led_pm_prepare, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: led_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void led_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + switch (pmstate) + { + case(PM_NORMAL): + { + /* Restore normal LEDs operation */ + } + break; + + case(PM_IDLE): + { + /* Entering IDLE mode - Turn leds off */ + } + break; + + case(PM_STANDBY): + { + /* Entering STANDBY mode - Logic for PM_STANDBY goes here */ + } + break; + + case(PM_SLEEP): + { + /* Entering SLEEP mode - Logic for PM_SLEEP goes here */ + } + break; + + default: + { + /* Should not get here */ + } + break; + } +} +#endif + +/**************************************************************************** + * Name: led_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int led_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* No preparation to change power modes is required by the LEDs driver. + * We always accept the state change by returning OK. + */ + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +uint32_t board_userled_initialize(void) +{ + /* Configure LED1-4 GPIOs for output */ + + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); + return BOARD_NLEDS; +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if ((unsigned)led < BOARD_NLEDS) + { + stm32_gpiowrite(g_ledcfg[led], ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint32_t ledset) +{ + stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0); + stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0); + stm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) == 0); + stm32_gpiowrite(GPIO_LED4, (ledset & BOARD_LED4_BIT) == 0); +} + +/**************************************************************************** + * Name: stm32_led_pminitialize + ****************************************************************************/ + +#ifdef CONFIG_PM +void stm32_led_pminitialize(void) +{ + /* Register to receive power management callbacks */ + + int ret = pm_register(&g_ledscb); + if (ret != OK) + { + board_autoled_on(LED_ASSERTION); + } +} +#endif /* CONFIG_PM */ + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32f4aiit.h b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32f4aiit.h new file mode 100755 index 000000000..5336b629a --- /dev/null +++ b/Ubiquitous/Nuttx/nuttx/boards/arm/stm32/aiit-arm32-board/src/stm32f4aiit.h @@ -0,0 +1,886 @@ +/**************************************************************************** + * boards/arm/stm32/stm32f4AIIT/src/stm32f4aiit.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_STM32_AIIT_ARM32_BOARD_SRC_STM32F4AIIT_H +#define __BOARDS_ARM_STM32_AIIT_ARM32_BOARD_SRC_STM32F4AIIT_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* How many SPI modules does this chip support? */ + +#if STM32_NSPI < 1 +# undef CONFIG_STM32_SPI1 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 2 +# undef CONFIG_STM32_SPI2 +# undef CONFIG_STM32_SPI3 +#elif STM32_NSPI < 3 +# undef CONFIG_STM32_SPI3 +#endif + +#define PCA9635_I2CBUS 1 +#define PCA9635_I2CADDR 0x40 + +/* Assume that we have everything */ + +#define HAVE_USBDEV 1 +#define HAVE_USBHOST 1 +#define HAVE_USBMONITOR 1 +#define HAVE_SDIO 1 +#define HAVE_CS43L22 1 +#define HAVE_RTC_DRIVER 1 +#define HAVE_NETMONITOR 1 +#define HAVE_HCIUART 1 + +/* Can't support USB host or device features if USB OTG FS is not enabled */ + +#ifndef CONFIG_STM32_OTGFS +# undef HAVE_USBDEV +# undef HAVE_USBHOST +#endif + +/* Can't support USB device if USB device is not enabled */ + +#ifndef CONFIG_USBDEV +# undef HAVE_USBDEV +#endif + +/* Can't support USB host is USB host is not enabled */ + +#ifndef CONFIG_USBHOST +# undef HAVE_USBHOST +#endif + +/* Check if we should enable the USB monitor before starting NSH */ + +#ifndef CONFIG_USBMONITOR +# undef HAVE_USBMONITOR +#endif + +#ifndef HAVE_USBDEV +# undef CONFIG_USBDEV_TRACE +#endif + +#ifndef HAVE_USBHOST +# undef CONFIG_USBHOST_TRACE +#endif + +#if !defined(CONFIG_USBDEV_TRACE) && !defined(CONFIG_USBHOST_TRACE) +# undef HAVE_USBMONITOR +#endif + +/* Can't support MMC/SD features if mountpoints are disabled or if SDIO + * support is not enabled. + */ + +#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO) +# undef HAVE_SDIO +#endif + +#undef SDIO_MINOR /* Any minor number, default 0 */ +#define SDIO_SLOTNO 0 /* Only one slot */ + +#ifdef HAVE_SDIO +# if !defined(CONFIG_NSH_MMCSDSLOTNO) +# define CONFIG_NSH_MMCSDSLOTNO SDIO_SLOTNO +# elif CONFIG_NSH_MMCSDSLOTNO != 0 +# warning "Only one MMC/SD slot, slot 0" +# undef CONFIG_NSH_MMCSDSLOTNO +# define CONFIG_NSH_MMCSDSLOTNO SDIO_SLOTNO +# endif + +# if defined(CONFIG_NSH_MMCSDMINOR) +# define SDIO_MINOR CONFIG_NSH_MMCSDMINOR +# else +# define SDIO_MINOR 0 +# endif +#endif + +/* The CS43L22 depends on the CS43L22 driver, I2C1, and I2S3 support */ + +#if !defined(CONFIG_AUDIO_CS43L22) || !defined(CONFIG_STM32_I2C1) || \ + !defined(CONFIG_STM32_I2S3) +# undef HAVE_CS43L22 +#endif + +#ifdef HAVE_CS43L22 + /* The CS43L22 communicates on I2C1, I2C address 0x1a for control + * operations + */ + +# define CS43L22_I2C_BUS 1 +# define CS43L22_I2C_ADDRESS (0x94 >> 1) + + /* The CS43L22 transfers data on I2S3 */ + +# define CS43L22_I2S_BUS 3 +#endif + +/* Check if we can support the RTC driver */ + +#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER) +# undef HAVE_RTC_DRIVER +#endif + +/* NSH Network monitor */ + +#if !defined(CONFIG_NET) || !defined(CONFIG_STM32_EMACMAC) +# undef HAVE_NETMONITOR +#endif + +#if !defined(CONFIG_NSH_NETINIT_THREAD) || !defined(CONFIG_ARCH_PHY_INTERRUPT) || \ + !defined(CONFIG_NETDEV_PHY_IOCTL) || !defined(CONFIG_NET_UDP) +# undef HAVE_NETMONITOR +#endif + +/* The NSH Network Monitor cannot be used with the STM32F4AIIT base board. + * That is because the LAN8720 is configured in REF_CLK OUT mode. In that + * mode, the PHY interrupt is not supported. The NINT pin serves instead as + * REFLCK0. + */ + +#if defined(CONFIG_STM32F4AIIT) +# undef HAVE_NETMONITOR +#endif + +/* procfs File System */ + +#ifdef CONFIG_FS_PROCFS +# ifdef CONFIG_NSH_PROC_MOUNTPOINT +# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT +# else +# define STM32_PROCFS_MOUNTPOINT "/proc" +# endif +#endif + +/* Check if we have the prerequisites for an HCI UART */ + +#if !defined(CONFIG_STM32_HCIUART) || !defined(CONFIG_BLUETOOTH_UART) +# undef HAVE_HCIUART +#elif defined(CONFIG_STM32_USART1_HCIUART) +# define HCIUART_SERDEV HCIUART1 +#elif defined(CONFIG_STM32_USART2_HCIUART) +# define HCIUART_SERDEV HCIUART2 +#elif defined(CONFIG_STM32_USART3_HCIUART) +# define HCIUART_SERDEV HCIUART3 +#elif defined(CONFIG_STM32_USART6_HCIUART) +# define HCIUART_SERDEV HCIUART6 +#elif defined(CONFIG_STM32_UART7_HCIUART) +# define HCIUART_SERDEV HCIUART7 +#elif defined(CONFIG_STM32_UART8_HCIUART) +# define HCIUART_SERDEV HCIUART8 +#else +# error No HCI UART specifified +#endif + +/* STM32F4 AIIT GPIOs *********************GPIO_PORTB*/ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN9) +#define GPIO_LED2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN10) +#define GPIO_LED3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN14) +#define GPIO_LED4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN15) + +/* BUTTONS -- NOTE that all have EXTI interrupts configured */ + +#define MIN_IRQBUTTON BUTTON_USER +#define MAX_IRQBUTTON BUTTON_USER +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_USER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0) + +#define GPIO_CS43L22_RESET (GPIO_OUTPUT|GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN4) + +/* LoRa SX127x */ + +#define GPIO_SX127X_DIO0 (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN0) + +#define GPIO_SX127X_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_OUTPUT_CLEAR|\ + GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN4) + +/* PWM + * + * The STM32F4 AIIT has no real on-board PWM devices, but the board can + * be configured to output a pulse train using TIM4 CH2 on PD13. + */ + +#define STM32F4DISCOVERY_PWMTIMER 4 +#define STM32F4DISCOVERY_PWMCHANNEL 2 + +/* SPI chip selects */ + +#define GPIO_CS_MEMS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3) + +#define GPIO_MAX31855_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN8) + +#define GPIO_MAX6675_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN8) + +#define GPIO_SX127X_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN8) + +#define GPIO_MAX7219_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN3) + +#define GPIO_GS2200M_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN5) + +#define GPIO_ENC28J60_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) + +#define GPIO_ENC28J60_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN1) + +#define GPIO_ENC28J60_INTR (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|\ + GPIO_OPENDRAIN|GPIO_PORTE|GPIO_PIN4) + +/* USB OTG FS + * + * PA9 OTG_FS_VBUS VBUS sensing (also connected to the green LED) + * PC0 OTG_FS_PowerSwitchOn + * PD5 OTG_FS_Overcurrent + */ + +#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\ + GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9) +#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\ + GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN0) + +#ifdef CONFIG_USBHOST +# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|\ + GPIO_SPEED_100MHz|GPIO_PUSHPULL|\ + GPIO_PORTD|GPIO_PIN5) +#else +# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\ + GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN5) +#endif + +/* UG-2864AMBAG01 or UG-2864HSWEG01 OLED Display (SPI 4-wire): + * + * --------------------------+---------------------------------------------- + * Connector CON10 J1: | STM32F4AIIT + * --------------+-----------+---------------------------------------------- + * CON10 J1: | CON20 J2: | P1/P2: + * --------------+-----------+---------------------------------------------- + * 1 3v3 | 3,4 3v3 | P2 3V + * 3 /RESET | 8 /RESET | P2 PB6 (Arbitrary selection) + * 5 /CS | 7 /CS | P2 PB7 (Arbitrary selection) + * 7 A0|D/C | 9 A0|D/C | P2 PB8 (Arbitrary selection) + * 9 LED+ (N/C) | ----- | ----- + * 2 5V Vcc | 1,2 Vcc | P2 5V + * 4 DI | 18 D1/SI | P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1(1)) + * 6 SCLK | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK == GPIO_SPI1_SCK_1(1)) + * 8 LED- (N/C) | ----- | ------ + * 10 GND | 20 GND | P2 GND + * --------------+-----------+---------------------------------------------- + * (1) Required because of on-board MEMS + * ------------------------------------------------------------------------- + */ + +#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) || \ + defined(CONFIG_LCD_SSD1351) +# define GPIO_OLED_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN6) +# define GPIO_OLED_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN7) +# define GPIO_OLED_A0 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN8) +# define GPIO_OLED_DC GPIO_OLED_A0 +#endif + +/* Display JLX12864G */ + +#define STM32_LCD_RST (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN6) + +#define STM32_LCD_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN7) + +#define STM32_LCD_RS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8) + +/* STM32F4AIIT MicroSD + * + * ---------- ------------- ------------------------------ + * PIO SIGNAL Comments + * ---------- ------------- ------------------------------ + * PB15 NCD Pulled up externally + * PC9 DAT1 Configured by driver + * PC8 DAT0 " " "" " " + * PC12 CLK " " "" " " + * PD2 CMD " " "" " " + * PC11 CD/DAT3 " " "" " " + * PC10 DAT2 " " "" " " + * ---------- ------------- ------------------------------ + */ + +#if (defined(CONFIG_STM32F4DISBB) || defined(CONFIG_STM32F4AIIT)) && defined(CONFIG_STM32_SDIO) +# define GPIO_SDIO_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|\ + GPIO_PORTB|GPIO_PIN15) +#endif + +/* STM32F4AIIT LAN8720 + * + * ---------- ------------- ------------------------------ + * PIO SIGNAL Comments + * ---------- ------------- ------------------------------ + * PB11 TXEN Configured by driver + * PB12 TXD0 " " "" " " + * PB13 TXD1 " " "" " " + * PC4 RXD0/MODE0 " " "" " " + * PC5 RXD1/MODE1 " " "" " " + * PA7 CRS_DIV/MODE2 " " "" " " + * PA2 MDIO " " "" " " + * PC1 MDC " " "" " " + * PA1 NINT/REFCLK0 " " "" " " + * PE2 DAT2 " " "" " " + * ---------- ------------- ------------------------------ + */ + +#if defined(CONFIG_STM32F4DISBB) && defined(CONFIG_STM32_ETHMAC) +# define GPIO_EMAC_NINT (GPIO_INPUT|GPIO_PULLUP|GPIO_EXTI|\ + GPIO_PORTA|GPIO_PIN1) +# define GPIO_EMAC_NRST (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN2) +#endif + +// added GPIO configuration +#define BOARD_NGPIOIN 1 +#define GPIO_LCDBL_IN (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz |\ + GPIO_INPUT | GPIO_PORTB| GPIO_PIN3) + +#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */ +#define GPIO_INT1 (GPIO_INPUT|GPIO_PORTA|GPIO_PIN2) + +#define BOARD_NGPIOOUT 2 +#define GPIO_LCDBL (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz |\ + GPIO_OUTPUT | GPIO_PORTD| GPIO_PIN3) + +#define GPIO_BEEP (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz |\ + GPIO_OUTPUT_SET| GPIO_PORTG| GPIO_PIN14) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_bringup + * + * Description: + * Perform architecture-specific initialization + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + ****************************************************************************/ + +int stm32_bringup(void); + +/**************************************************************************** + * Name: stm32_gpio_initialize + * + * Description: + * Initialize GPIO drivers for use with /apps/examples/gpio + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_GPIO +int stm32_gpio_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the stm32f4AIIT + * board. + * + ****************************************************************************/ + +void weak_function stm32_spidev_initialize(void); + +/**************************************************************************** + * Name: stm32_i2sdev_initialize + * + * Description: + * Called to configure I2S chip select GPIO pins for the stm32f4AIIT + * board. + * + ****************************************************************************/ + +void weak_function stm32_i2sdev_initialize(void); + +/**************************************************************************** + * Name: stm32_bh1750initialize + * + * Description: + * Called to configure an I2C and to register BH1750FVI for the + * stm32f4AIIT board. + * + ****************************************************************************/ + +#ifdef CONFIG_SENSORS_BH1750FVI +int stm32_bh1750initialize(FAR const char *devpath); +#endif + +/**************************************************************************** + * Name: stm32_lpwaninitialize + * + * Description: + * Initialize SX127X LPWAN interaface. + ****************************************************************************/ + +#ifdef CONFIG_LPWAN_SX127X +int stm32_lpwaninitialize(void); +#endif + +/**************************************************************************** + * Name: stm32_mmcsdinitialize + * + * Description: + * Sets up MMC/SD interface. + * + ****************************************************************************/ + +#ifdef CONFIG_MMCSD_SPI +int stm32_mmcsd_initialize(int port, int minor); +#endif + +/**************************************************************************** + * Name: nunchuck_initialize + * + * Description: + * Initialize and register the button joystick driver + * + ****************************************************************************/ + +#ifdef CONFIG_INPUT_NUNCHUCK +int nunchuck_initialize(FAR char *devname); +#endif + +/**************************************************************************** + * Name: stm32_max7219init + * + * Description: + * Initialize and register the max7219 numeric display controller + * + ****************************************************************************/ + +#ifdef CONFIG_LEDS_MAX7219 +int stm32_max7219init(FAR const char *devpath); +#endif + +/**************************************************************************** + * Name: stm32_ds1307_init + * + * Description: + * Initialize and register the DS1307 RTC + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_DS1307 +int stm32_ds1307_init(void); +#endif + +/**************************************************************************** + * Name: stm32_st7032init + * + * Description: + * Initialize and register the Sitronix ST7032i + * + ****************************************************************************/ + +int stm32_st7032init(FAR const char *devpath); + +/**************************************************************************** + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in initialization to setup + * USB-related GPIO pins for the STM32F4AIIT board. + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_OTGFS +void weak_function stm32_usbinitialize(void); +#endif + +/**************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Called at application startup time to initialize the USB host + * functionality. This function will start a thread that will monitor for + * device connection/disconnection events. + * + ****************************************************************************/ + +#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST) +int stm32_usbhost_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_pwm_setup + * + * Description: + * Initialize PWM and register the PWM device. + * + ****************************************************************************/ + +#ifdef CONFIG_PWM +int stm32_pwm_setup(void); +#endif + +/**************************************************************************** + * Name: stm32_can_setup + * + * Description: + * Initialize CAN and register the CAN device + * + ****************************************************************************/ + +#ifdef CONFIG_CAN +int stm32_can_setup(void); +#endif + +/**************************************************************************** + * Name: stm32_extmemgpios + * + * Description: + * Initialize GPIOs for external memory usage + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_extmemgpios(const uint32_t *gpios, int ngpios); +#endif + +/**************************************************************************** + * Name: stm32_extmemaddr + * + * Description: + * Initialize address line GPIOs for external memory access + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_extmemaddr(int naddrs); +#endif + +/**************************************************************************** + * Name: stm32_extmemdata + * + * Description: + * Initialize data line GPIOs for external memory access + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_FSMC +void stm32_extmemdata(int ndata); +#endif + +/**************************************************************************** + * Name: stm32_led_pminitialize + * + * Description: + * Enable logic to use the LEDs on the STM32F4AIIT to support power + * management testing + * + ****************************************************************************/ + +#ifdef CONFIG_PM +void stm32_led_pminitialize(void); +#endif + +/**************************************************************************** + * Name: stm32_pm_buttons + * + * Description: + * Configure the user button of the STM32f4AIIT board as EXTI, + * so it is able to wakeup the MCU from the PM_STANDBY mode + * + ****************************************************************************/ + +#if defined(CONFIG_PM) && defined(CONFIG_ARCH_IDLE_CUSTOM) && \ + defined(CONFIG_PM_BUTTONS) +void stm32_pm_buttons(void); +#endif + +/**************************************************************************** + * Name: stm32_sdio_initialize + * + * Description: + * Initialize SDIO-based MMC/SD card support + * + ****************************************************************************/ + +#if !defined(CONFIG_DISABLE_MOUNTPOINT) && defined(CONFIG_STM32_SDIO) +int stm32_sdio_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_netinitialize + * + * Description: + * Configure board resources to support networking. + * + ****************************************************************************/ + +#ifdef HAVE_NETMONITOR +void weak_function stm32_netinitialize(void); +#endif + +/**************************************************************************** + * Name: stm32_zerocross_initialize + * + * Description: + * Initialize and register the zero cross driver + * + ****************************************************************************/ + +#ifdef CONFIG_SENSORS_ZEROCROSS +int stm32_zerocross_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_max31855initialize + * + * Description: + * Initialize and register the MAX31855 Temperature Sensor driver. + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/temp0" + * bus - Bus number (for hardware that has multiple SPI interfaces) + * devid - ID associated to the device. E.g., 0, 1, 2, etc. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_SENSORS_MAX31855 +int stm32_max31855initialize(FAR const char *devpath, int bus, + uint16_t devid); +#endif + +/**************************************************************************** + * Name: stm32_mlx90614init + * + * Description: + * Called to configure an I2C and to register MLX90614 for the + * stm32f103-minimum board. + * + ****************************************************************************/ + +#ifdef CONFIG_SENSORS_MLX90614 +int stm32_mlx90614init(FAR const char *devpath); +#endif + +/**************************************************************************** + * Name: stm32_max6675initialize + * + * Description: + * Initialize and register the max6675 driver + * + ****************************************************************************/ + +#ifdef CONFIG_SENSORS_MAX6675 +int stm32_max6675initialize(FAR const char *devpath); +#endif + +/**************************************************************************** + * Name: stm32_cs43l22_initialize + * + * Description: + * This function is called by platform-specific, setup logic to configure + * and register the CS43L22 device. This function will register the + * driver as /dev/cs43l22[x] where x is determined by the minor device + * number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef HAVE_CS43L22 +int stm32_cs43l22_initialize(int minor); +#endif /* HAVE_CS43L22 */ + +/**************************************************************************** + * Name: stm32_pca9635_initialize + * + * Description: + * This function is called by board initialization logic to configure the + * LED PWM chip. This function will register the driver as /dev/leddrv0. + * + * Input Parameters: + * None + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef CONFIG_PCA9635PW +int stm32_pca9635_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_rgbled_setup + * + * Description: + * This function is called by board initialization logic to configure the + * RGB LED driver. This function will register the driver as /dev/rgbled0. + * + * Input Parameters: + * None + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef CONFIG_RGBLED +int stm32_rgbled_setup(void); +#endif + +/**************************************************************************** + * Name: stm32_timer_driver_setup + * + * Description: + * Configure the timer driver. + * + * Input Parameters: + * devpath - The full path to the timer device. This should be of the + * form /dev/timer0 + * timer - The timer's number. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_TIMER +int stm32_timer_driver_setup(FAR const char *devpath, int timer); +#endif + +/**************************************************************************** + * Name: xen1210_archinitialize + * + * Description: + * Each board that supports an xen1210 device must provide this function. + * This function is called by application-specific, setup logic to + * configure the accelerometer device. This function will register the + * driver as /dev/accelN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef CONFIG_SENSORS_XEN1210 +int xen1210_archinitialize(int minor); +#endif + +/**************************************************************************** + * Name: hciuart_dev_initialize + * + * Description: + * This function is called by board initialization logic to configure the + * Bluetooth HCI UART driver + * + * Input Parameters: + * None + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef HAVE_HCIUART +int hciuart_dev_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_gs2200m_initialize + * + * Description: + * Configure the gs2200m driver. + * + * Input Parameters: + * devpath - The full path to the device. + * bus - The SPI bus number + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_WL_GS2200M +int stm32_gs2200m_initialize(FAR const char *devpath, int bus); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_ARM_STM32_AIIT_ARM32_BOARD_SRC_STM32F4AIIT_H */ From 48a19fe3498797e92afde8f5909106b4fe80a527 Mon Sep 17 00:00:00 2001 From: wang lingyu Date: Fri, 15 Oct 2021 11:19:33 +0800 Subject: [PATCH 11/11] support aiit-arm32-board --- Ubiquitous/Nuttx/nuttx/boards/Kconfig | 13 +++++++++++++ Ubiquitous/Nuttx/nuttx/boards/README.txt | 3 +++ 2 files changed, 16 insertions(+) diff --git a/Ubiquitous/Nuttx/nuttx/boards/Kconfig b/Ubiquitous/Nuttx/nuttx/boards/Kconfig index 86f40d657..48814b8c7 100644 --- a/Ubiquitous/Nuttx/nuttx/boards/Kconfig +++ b/Ubiquitous/Nuttx/nuttx/boards/Kconfig @@ -1748,6 +1748,15 @@ config ARCH_BOARD_STM32F4_DISCOVERY ---help--- STMicro STM32F4-Discovery board based on the STMicro STM32F407VGT6 MCU. +config ARCH_BOARD_STM32F4_AIIT + bool "STMicro STM32F4-AIIT board" + depends on ARCH_CHIP_STM32F407VG + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + STMicro STM32F4-Discovery board based on the STMicro STM32F407VGT6 MCU. + config ARCH_BOARD_STM32F411E_DISCO bool "STMicro STM32F411E-Discovery board" depends on ARCH_CHIP_STM32F411VE @@ -2415,6 +2424,7 @@ config ARCH_BOARD default "stm32f3discovery" if ARCH_BOARD_STM32F3_DISCOVERY default "stm32f334-disco" if ARCH_BOARD_STM32F334_DISCO default "stm32f4discovery" if ARCH_BOARD_STM32F4_DISCOVERY + default "aiit-arm32-board" if ARCH_BOARD_STM32F4_AIIT default "stm32f411e-disco" if ARCH_BOARD_STM32F411E_DISCO default "stm32f429i-disco" if ARCH_BOARD_STM32F429I_DISCO default "stm32f746g-disco" if ARCH_BOARD_STM32F746G_DISCO @@ -2804,6 +2814,9 @@ endif if ARCH_BOARD_STM32H747I_DISCO source "boards/arm/stm32h7/stm32h747i-disco/Kconfig" endif +if ARCH_BOARD_STM32F4_AIIT +source "boards/arm/stm32/aiit-arm32-board/Kconfig" +endif if ARCH_BOARD_NUCLEO_H743ZI source "boards/arm/stm32h7/nucleo-h743zi/Kconfig" endif diff --git a/Ubiquitous/Nuttx/nuttx/boards/README.txt b/Ubiquitous/Nuttx/nuttx/boards/README.txt index 0f0da393a..b085698bf 100644 --- a/Ubiquitous/Nuttx/nuttx/boards/README.txt +++ b/Ubiquitous/Nuttx/nuttx/boards/README.txt @@ -756,6 +756,9 @@ boards/arm/stm32/stm32f103-minimum boards/arm/stm32/stm32f4discovery STMicro STM32F4-Discovery board based on the STMicro STM32F407VGT6 MCU. +boards/arm/stm32/aiit-arm32-board + STMicro STM32F4-AIIT board based on the STMicro STM32F407VGT6 MCU. + boards/arm/stm32/stm32f411e-disco This is a minimal configuration that supports low-level test of the STMicro STM32F411E-Discovery Board.