1、modify the 'link.lds' file accroding to sdk;2、add irq enable and disable function
This commit is contained in:
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6b091797ae
commit
806492e271
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@ -0,0 +1,18 @@
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#
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# Automatically generated file; DO NOT EDIT.
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# XiZi_AIoT Project Configuration
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#
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CONFIG_BOARD_IMX6Q_SABRELITE_EVB=y
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CONFIG_ARCH_ARM=y
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#
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# imx6q sabrelite feature
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#
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#
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# Lib
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#
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CONFIG_LIB=y
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CONFIG_LIB_POSIX=y
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CONFIG_LIB_NEWLIB=y
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# CONFIG_LIB_MUSLLIB is not set
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@ -81,7 +81,7 @@ struct InterruptServiceRoutines {
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extern struct InterruptServiceRoutines isrManager ;
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unsigned long DisableLocalInterrupt();
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uint32_t DisableLocalInterrupt();
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void EnableLocalInterrupt(unsigned long level);
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#define DISABLE_INTERRUPT DisableLocalInterrupt
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@ -22,6 +22,14 @@
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int32_t ArchEnableHwIrq(uint32_t irq_num);
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int32_t ArchDisableHwIrq(uint32_t irq_num);
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//! @brief
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typedef enum {
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CPU_0,
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CPU_1,
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CPU_2,
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CPU_3,
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} cpuid_e;
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struct ExceptionStackRegister
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{
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uint32_t r0;
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@ -1,18 +1,8 @@
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@ .equ Mode_USR, 0x10
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@ .equ Mode_FIQ, 0x11
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@ .equ Mode_IRQ, 0x12
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@ .equ Mode_SVC, 0x13
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@ .equ Mode_ABT, 0x17
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@ .equ Mode_UND, 0x1B
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@ .equ Mode_SYS, 0x1F
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#include <asm_defines.h>
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@ .equ I_BIT, 0x80 @ when I bit is set, IRQ is disabled
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@ .equ F_BIT, 0x40 @ when F bit is set, FIQ is disabled
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.equ STACK_SIZE, 0x00000100
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.global ExceptionVectors
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.section ".startup","ax"
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.globl _reset
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_reset:
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@ -30,7 +20,6 @@ _reset:
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bic r0, #(1 << 0) /* mmu */
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mcr p15, 0, r0, c1, c0, 0
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ldr r0, =stack_top
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@ Set the startup stack for svc
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@ -39,26 +28,38 @@ _reset:
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@ Enter Undefined Instruction Mode and set its Stack Pointer
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msr cpsr_c, #MODE_UND|I_BIT|F_BIT
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mov sp, r0
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sub r0, r0, #STACK_SIZE
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sub r0, r0, #EXCEPTION_STACK_SIZE
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@ Enter Abort Mode and set its Stack Pointer
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msr cpsr_c, #MODE_ABT|I_BIT|F_BIT
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mov sp, r0
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sub r0, r0, #STACK_SIZE
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sub r0, r0, #EXCEPTION_STACK_SIZE
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@ Enter FIQ Mode and set its Stack Pointer
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msr cpsr_c, #MODE_FIQ|I_BIT|F_BIT
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mov sp, r0
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sub r0, r0, #STACK_SIZE
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sub r0, r0, #EXCEPTION_STACK_SIZE
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@ Enter IRQ Mode and set its Stack Pointer
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msr cpsr_c, #MODE_IRQ|I_BIT|F_BIT
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mov sp, r0
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sub r0, r0, #STACK_SIZE
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sub r0, r0, #EXCEPTION_STACK_SIZE
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/* come back to SVC mode */
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msr cpsr_c, #MODE_SVC|I_BIT|F_BIT
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/*
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* copy the vector table into the RAM vectors
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* this assumes that the RAM vectors size is divisible by 3 words (12 bytes)
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*/
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ldr r1,=__ram_vectors_start
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ldr r2,=__ram_vectors_end
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ldr r3,=ExceptionVectors
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1: cmp r1,r2
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ldmlt r3!,{r4,r5,r6}
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stmlt r1!,{r4,r5,r6}
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blt 1b
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/* clear .bss */
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mov r0, #0 /* get a zero */
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ldr r1,=__bss_start /* bss start */
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@ -1,6 +1,6 @@
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#include <asm_defines.h>
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.section .vectors, "ax"
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.section .text.vectors, "ax"
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.code 32
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.globl ExceptionVectors
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@ -3,24 +3,43 @@
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#include <stddef.h>
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#include <isr.h>
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unsigned long __attribute__((naked)) DisableLocalInterrupt()
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uint32_t DisableLocalInterrupt(void)
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{
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uint32_t intSave;
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__asm__ __volatile__(
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"mrs %0, cpsr \n"
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"cpsid if "
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: "=r"(intSave)
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:
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: "memory");
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return intSave;
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}
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void __attribute__((naked)) EnableLocalInterrupt(unsigned long level)
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void EnableLocalInterrupt(unsigned long level)
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{
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uint32_t intSave;
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__asm__ __volatile__(
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"mrs %0, cpsr \n"
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"cpsie if "
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: "=r"(intSave)
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:
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: "memory");
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return;
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}
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int32_t ArchEnableHwIrq(uint32_t irq_num)
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{
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// gic_set_irq_priority(irq_num, priority);
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gic_set_irq_security(irq_num, false); // set IRQ as non-secure
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// gic_set_cpu_target(irq_num, CPU_0, true);
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gic_enable_irq(irq_num, true);
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return 0;
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}
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int32_t ArchDisableHwIrq(uint32_t irq_num)
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{
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gic_enable_irq(irq_num, false);
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// gic_set_cpu_target(irq_num, CPU_0, false);
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return 0;
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}
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@ -1,4 +1,4 @@
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SRC_FILES := board.c
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SRC_FILES := board.c ivt.c
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SRC_DIR := third_party_driver
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@ -15,7 +15,7 @@ endif
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# export LINK_LWIP := $(KERNEL_ROOT)/resources/ethernet/LwIP/liblwip.a
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# endif
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export DEFINES := -DHAVE_CCONFIG_H -DSTM32F407xx -DUSE_HAL_DRIVER -DHAVE_SIGINFO
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export DEFINES := -DHAVE_CCONFIG_H
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export USING_NEWLIB =1
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export USING_VFS = 1
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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/*
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* Copyright (c) 2010-2012, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <hab_defines.h>
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extern unsigned * _start_image_add;
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extern unsigned * __start_boot_data;
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extern unsigned * _image_size;
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extern unsigned * __hab_data;
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extern uint8_t input_dcd_hdr[];
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extern void _reset(void);
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struct hab_ivt input_ivt __attribute__ ((section (".ivt"))) ={
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/** @ref hdr word with tag #HAB_TAG_IVT, length and HAB version fields
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* (see @ref data)
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*/
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IVT_HDR(sizeof(struct hab_ivt), HAB_VER(4, 0)),
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/** Absolute address of the first instruction to execute from the
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* image
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*/
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(hab_image_entry_f)_reset,
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/** Reserved in this version of HAB: should be NULL. */
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NULL,
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/** Absolute address of the image DCD: may be NULL. */
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&input_dcd_hdr,
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/** Absolute address of the Boot Data: may be NULL, but not interpreted
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* any further by HAB
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*/
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&__start_boot_data,
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/** Absolute address of the IVT.*/
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(const void*) (&input_ivt),
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/** Absolute address of the image CSF.*/
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(const void*) &__hab_data,
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/** Reserved in this version of HAB: should be zero. */
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0
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};
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typedef struct {
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uint32_t start; /**< Start address of the image */
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uint32_t size; /**< Size of the image */
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uint32_t plugin; /**< Plugin flag */
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} boot_data_t;
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boot_data_t bd __attribute__ ((section (".boot_data"))) ={
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(uint32_t) &_start_image_add,
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(uint32_t) &_image_size,
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0,
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};
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@ -1,17 +1,88 @@
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STACK_SIZE = 4096;
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STACK_SIZE = 48*1024;
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L1_PAGE_TABLE_SIZE = 16K;
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RAM_VECTORS_SIZE = 72;
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OUTPUT_FORMAT("elf32-littlearm")
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OUTPUT_ARCH(arm)
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MEMORY
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{
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OCRAM (rwx) : ORIGIN = 0x00900000, LENGTH = 256K
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DDR (rwx) : ORIGIN = 0x10000000, LENGTH = 2048M
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}
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SECTIONS
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{
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. = 0x80100000;
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/*
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* -- OCRAM --
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*
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* Nothing in OCRAM can be loaded at boot, because the boot image must be a contiguous
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* region of memory.
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*/
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/* MMU L1 page table */
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.l1_page_table (NOLOAD) :
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{
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__l1_page_table_start = .;
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. += L1_PAGE_TABLE_SIZE;
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} > OCRAM
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/* allocate a heap in ocram */
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.heap.ocram (NOLOAD) : ALIGN(4)
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{
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__heap_ocram_start = .;
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. += LENGTH(OCRAM) - L1_PAGE_TABLE_SIZE - RAM_VECTORS_SIZE ;
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__heap_ocram_end = .;
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} > OCRAM
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/* RAM vector table comes at the end of OCRAM */
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.ram_vectors (ORIGIN(OCRAM) + LENGTH(OCRAM) - RAM_VECTORS_SIZE) (NOLOAD) :
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{
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__ram_vectors_start = .;
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. += RAM_VECTORS_SIZE;
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__ram_vectors_end = .;
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} > OCRAM
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/*
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* -- DDR --
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*/
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/* -- read-only sections -- */
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_start_image_add = ORIGIN(DDR);
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.ivt (ORIGIN(DDR)) :
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{
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. = . + 0x400;
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*(.ivt)
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} > DDR
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.boot_data :
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{
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__start_boot_data = .;
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*(.boot_data)
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} > DDR
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/* aligned to ease the hexdump read of generated binary */
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.dcd_hdr : ALIGN(16)
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{
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__start_dcd = .;
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*(.dcd_hdr)
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} > DDR
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.dcd_wrt_cmd :
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{
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*(.dcd_wrt_cmd)
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} > DDR
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.dcd_data :
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{
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*(.dcd_data)
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} > DDR
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__text_start = .;
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.text :
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{
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*(.vectors)
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*(.startup)
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*(.text)
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*(.text.*)
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KEEP(*(.isrtbl))
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__isrtbl_end = .;
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. = ALIGN(4);
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}
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} > DDR
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__text_end = .;
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__rodata_start = .;
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.rodata : { *(.rodata) *(.rodata.*) }
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.rodata :
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{
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*(.rodata) *(.rodata.*)
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} > DDR
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__rodata_end = .;
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. = ALIGN(4);
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KEEP(*(SORT(.ctors.*)))
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KEEP(*(.ctors))
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PROVIDE(__ctors_end__ = .);
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}
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} > DDR
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.dtors :
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{
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KEEP(*(SORT(.dtors.*)))
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KEEP(*(.dtors))
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PROVIDE(__dtors_end__ = .);
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}
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} > DDR
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. = ALIGN(16 * 1024);
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/* . = ALIGN(16 * 1024);
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.l1_page_table :
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{
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__l1_page_table_start = .;
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. += 16K;
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}
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} */
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. = ALIGN(8);
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__data_start = .;
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{
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*(.data)
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*(.data.*)
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}
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} > DDR
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__data_end = .;
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. = ALIGN(8);
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*(.bss.*)
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*(COMMON)
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. = ALIGN(4);
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}
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} > DDR
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. = ALIGN(4);
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__bss_end = .;
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. += STACK_SIZE;
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__stacks_end = .;
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stack_top = .;
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}
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} > DDR
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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