add GPIO_E18_MODE pin

Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/zbnsh/defconfig

@@ -0,0 +1,70 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_NSH_DISABLE_LOSMART is not set
+# CONFIG_STANDARD_SERIAL is not set
+CONFIG_ADD_NUTTX_FETURES=y
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_BOARD="xidatong-riscv64"
+CONFIG_ARCH_BOARD_XIDATONG_RISCV64=y
+CONFIG_ARCH_CHIP="k210"
+CONFIG_ARCH_CHIP_K210=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BINFMT_DISABLE=y
+CONFIG_BOARD_LOOPSPERMSEC=46000
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=3072
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+CONFIG_NSH_DISABLE_MKDIR=y
+CONFIG_NSH_DISABLE_RM=y
+CONFIG_NSH_DISABLE_RMDIR=y
+CONFIG_NSH_DISABLE_UMOUNT=y
+CONFIG_NSH_READLINE=y
+CONFIG_NSH_STRERROR=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=2097152
+CONFIG_RAM_START=0x80400000
+CONFIG_RAW_BINARY=y
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_CMD_HISTORY_LEN=100
+CONFIG_READLINE_CMD_HISTORY_LINELEN=120
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_STACK_COLORATION=y
+CONFIG_START_DAY=28
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2019
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=20
+CONFIG_TESTING_GETPRIME=y
+CONFIG_UART0_SERIAL_CONSOLE=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_DEV_GPIO=y
+CONFIG_BSP_USING_CH438=y
+CONFIG_CH438_EXTUART1=y
+CONFIG_SUPPORT_CONNECTION_FRAMEWORK=y
+CONFIG_CONNECTION_FRAMEWORK_DEBUG=y
+CONFIG_CONNECTION_ADAPTER_ZIGBEE=y
+CONFIG_ADAPTER_E18=y
+CONFIG_ADAPTER_ZIGBEE_E18="e18"
+CONFIG_AS_END_DEVICE_ROLE=y
+CONFIG_ADAPTER_E18_MODE_PATH="/dev/gpio2"
+CONFIG_ADAPTER_E18_DRIVER_EXTUART=y
+CONFIG_ADAPTER_E18_DRIVER="/dev/extuart_dev1"

Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/include/board.h

@@ -57,7 +57,7 @@
 
 /* GPIO pins used by the GPIO Subsystem */
 
-#define BOARD_NGPIOOUT    2 /* Amount of GPIO Output pins */
+#define BOARD_NGPIOOUT    3 /* Amount of GPIO Output pins */
 #define BOARD_NGPIOINT    0 /* Amount of GPIO Input */
 
 /****************************************************************************

Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/ch438_demo.c

@@ -38,8 +38,8 @@ void CH438Demo(void)
 
     fd = open("/dev/extuart_dev3", O_RDWR);
     ioctl(fd, OPE_INT, (unsigned long)9600);
-    m0fd = open("/dev/gpout0", O_RDWR);
+    m0fd = open("/dev/gpio0", O_RDWR);
-    m1fd = open("/dev/gpout1", O_RDWR);
+    m1fd = open("/dev/gpio1", O_RDWR);
     ioctl(m0fd, GPIOC_WRITE, (unsigned long)1);
     ioctl(m1fd, GPIOC_WRITE, (unsigned long)1);
     sleep(1);

Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_gpio.c

@@ -48,11 +48,13 @@
 
 /* Pin 1 and 2 are used for this example as GPIO outputs. */
 
-#define GPIO_E220_M0  44
+#define GPIO_E220_M0   44
-#define GPIO_E220_M1  45
+#define GPIO_E220_M1   45
+#define GPIO_E18_MODE  46
 
-#define FPIOA_E220_M0  1
+#define FPIOA_E220_M0   1
-#define FPIOA_E220_M1  2
+#define FPIOA_E220_M1   2
+#define FPIOA_E18_MODE  3
 
 /****************************************************************************
  * Private Types
@@ -91,13 +93,15 @@ static const struct gpio_operations_s gpout_ops =
 static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
 {
   GPIO_E220_M0, 
-  GPIO_E220_M1
+  GPIO_E220_M1,
+  GPIO_E18_MODE
 };
 
 static const uint32_t g_fpioa[BOARD_NGPIOOUT] =
 {
   FPIOA_E220_M0, 
-  FPIOA_E220_M1
+  FPIOA_E220_M1,
+  FPIOA_E18_MODE
 };
 
 static struct k210gpio_dev_s g_gpout[BOARD_NGPIOOUT];
@@ -172,7 +176,7 @@ int k210_gpio_init(void)
       k210_fpioa_config(g_gpiooutputs[i],
                         (K210_IO_FUNC_GPIOHS0 + g_fpioa[i]) | K210_IOFLAG_GPIOHS);
       k210_gpiohs_set_direction(g_fpioa[i], GPIO_DM_OUTPUT);
-      k210_gpiohs_set_value(g_fpioa[i], true);
+      k210_gpiohs_set_value(g_fpioa[i], false);
 
       pincount++;
     }