143 lines
5.3 KiB
C
143 lines
5.3 KiB
C
/*----------------------------------------------------------------------------
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* Tencent is pleased to support the open source community by making TencentOS
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* available.
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*
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* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
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* If you have downloaded a copy of the TencentOS binary from Tencent, please
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* note that the TencentOS binary is licensed under the BSD 3-Clause License.
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*
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* If you have downloaded a copy of the TencentOS source code from Tencent,
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* please note that TencentOS source code is licensed under the BSD 3-Clause
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* License, except for the third-party components listed below which are
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* subject to different license terms. Your integration of TencentOS into your
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* own projects may require compliance with the BSD 3-Clause License, as well
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* as the other licenses applicable to the third-party components included
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* within TencentOS.
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*---------------------------------------------------------------------------*/
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#ifndef _PORT_CONFIG_H_
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#define _PORT_CONFIG_H_
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/* FPU is used */
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#define ARCH_RISCV_FPU 0u
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#define TOS_CFG_CPU_ADDR_SIZE CPU_WORD_SIZE_32
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#define TOS_CFG_CPU_DATA_SIZE CPU_WORD_SIZE_32
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#define TOS_CFG_CPU_STK_GROWTH CPU_STK_GROWTH_DESCENDING
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#define TOS_CFG_CPU_HRTIMER_EN 0u
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#define TOS_CFG_CPU_LEAD_ZEROS_ASM_PRESENT 0u
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#define TOS_CFG_CPU_BYTE_ORDER CPU_BYTE_ORDER_LITTLE_ENDIAN
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/* int reg offset table */
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#define __reg_mepc_OFFSET 0x00
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#define __reg_mstatus_OFFSET 0x04
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#define __reg_x1_OFFSET 0x08
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#define __reg_x3_OFFSET 0x0C
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#define __reg_x4_OFFSET 0x10
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#define __reg_x5_OFFSET 0x14
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#define __reg_x6_OFFSET 0x18
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#define __reg_x7_OFFSET 0x1C
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#define __reg_x8_OFFSET 0x20
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#define __reg_x9_OFFSET 0x24
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#define __reg_x10_OFFSET 0x28
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#define __reg_x11_OFFSET 0x2C
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#define __reg_x12_OFFSET 0x30
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#define __reg_x13_OFFSET 0x34
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#define __reg_x14_OFFSET 0x38
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#define __reg_x15_OFFSET 0x3C
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#define __reg_x16_OFFSET 0x40
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#define __reg_x17_OFFSET 0x44
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#define __reg_x18_OFFSET 0x48
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#define __reg_x19_OFFSET 0x4C
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#define __reg_x20_OFFSET 0x50
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#define __reg_x21_OFFSET 0x54
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#define __reg_x22_OFFSET 0x58
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#define __reg_x23_OFFSET 0x5C
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#define __reg_x24_OFFSET 0x60
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#define __reg_x25_OFFSET 0x64
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#define __reg_x26_OFFSET 0x68
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#define __reg_x27_OFFSET 0x6C
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#define __reg_x28_OFFSET 0x70
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#define __reg_x29_OFFSET 0x74
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#define __reg_x30_OFFSET 0x78
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#define __reg_x31_OFFSET 0x7C
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#define __reg_mepc__OFFSET __reg_mepc_OFFSET
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#define __reg_mstatus__OFFSET __reg_mstatus_OFFSET
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#define __reg_ra__OFFSET __reg_x1_OFFSET
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#define __reg_gp__OFFSET __reg_x3_OFFSET
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#define __reg_tp__OFFSET __reg_x4_OFFSET
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#define __reg_t0__OFFSET __reg_x5_OFFSET
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#define __reg_t1__OFFSET __reg_x6_OFFSET
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#define __reg_t2__OFFSET __reg_x7_OFFSET
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#define __reg_s0__OFFSET __reg_x8_OFFSET
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#define __reg_fp__OFFSET __reg_x8_OFFSET
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#define __reg_s1__OFFSET __reg_x9_OFFSET
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#define __reg_a0__OFFSET __reg_x10_OFFSET
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#define __reg_a1__OFFSET __reg_x11_OFFSET
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#define __reg_a2__OFFSET __reg_x12_OFFSET
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#define __reg_a3__OFFSET __reg_x13_OFFSET
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#define __reg_a4__OFFSET __reg_x14_OFFSET
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#define __reg_a5__OFFSET __reg_x15_OFFSET
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#define __reg_a6__OFFSET __reg_x16_OFFSET
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#define __reg_a7__OFFSET __reg_x17_OFFSET
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#define __reg_s2__OFFSET __reg_x18_OFFSET
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#define __reg_s3__OFFSET __reg_x19_OFFSET
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#define __reg_s4__OFFSET __reg_x20_OFFSET
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#define __reg_s5__OFFSET __reg_x21_OFFSET
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#define __reg_s6__OFFSET __reg_x22_OFFSET
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#define __reg_s7__OFFSET __reg_x23_OFFSET
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#define __reg_s8__OFFSET __reg_x24_OFFSET
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#define __reg_s9__OFFSET __reg_x25_OFFSET
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#define __reg_s10__OFFSET __reg_x26_OFFSET
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#define __reg_s11__OFFSET __reg_x27_OFFSET
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#define __reg_t3__OFFSET __reg_x28_OFFSET
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#define __reg_t4__OFFSET __reg_x29_OFFSET
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#define __reg_t5__OFFSET __reg_x30_OFFSET
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#define __reg_t6__OFFSET __reg_x31_OFFSET
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#if ARCH_RISCV_FPU
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/* float reg offset table */
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#define __reg_f0_OFFSET 0x00
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#define __reg_f1_OFFSET 0x04
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#define __reg_f2_OFFSET 0x08
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#define __reg_f3_OFFSET 0x0C
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#define __reg_f4_OFFSET 0x10
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#define __reg_f5_OFFSET 0x14
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#define __reg_f6_OFFSET 0x18
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#define __reg_f7_OFFSET 0x1C
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#define __reg_f8_OFFSET 0x20
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#define __reg_f9_OFFSET 0x24
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#define __reg_f10_OFFSET 0x28
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#define __reg_f11_OFFSET 0x2C
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#define __reg_f12_OFFSET 0x30
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#define __reg_f13_OFFSET 0x34
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#define __reg_f14_OFFSET 0x38
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#define __reg_f15_OFFSET 0x3C
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#define __reg_f16_OFFSET 0x40
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#define __reg_f17_OFFSET 0x44
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#define __reg_f18_OFFSET 0x48
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#define __reg_f19_OFFSET 0x4C
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#define __reg_f20_OFFSET 0x50
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#define __reg_f21_OFFSET 0x54
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#define __reg_f22_OFFSET 0x58
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#define __reg_f23_OFFSET 0x5C
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#define __reg_f24_OFFSET 0x60
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#define __reg_f25_OFFSET 0x64
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#define __reg_f26_OFFSET 0x68
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#define __reg_f27_OFFSET 0x6C
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#define __reg_f28_OFFSET 0x70
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#define __reg_f29_OFFSET 0x74
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#define __reg_f30_OFFSET 0x78
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#define __reg_f31_OFFSET 0x7C
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#endif
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#endif /* _PORT_CONFIG_H_ */
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