142 lines
3.9 KiB
C
142 lines
3.9 KiB
C
/*----------------------------------------------------------------------------
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* Tencent is pleased to support the open source community by making TencentOS
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* available.
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*
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* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
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* If you have downloaded a copy of the TencentOS binary from Tencent, please
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* note that the TencentOS binary is licensed under the BSD 3-Clause License.
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*
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* If you have downloaded a copy of the TencentOS source code from Tencent,
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* please note that TencentOS source code is licensed under the BSD 3-Clause
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* License, except for the third-party components listed below which are
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* subject to different license terms. Your integration of TencentOS into your
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* own projects may require compliance with the BSD 3-Clause License, as well
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* as the other licenses applicable to the third-party components included
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* within TencentOS.
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*---------------------------------------------------------------------------*/
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#include <tos_compiler.h>
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#include <tos_ktypes.h>
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#define ECLIC_ADDR_BASE 0xD2000000
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#define CLIC_INT_TMR 0x07
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#define ECLIC_CFG_OFFSET 0x00
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#define ECLIC_INFO_OFFSET 0x04
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#define ECLIC_MTH_OFFSET 0x0B
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#define ECLIC_INT_IP_OFFSET 0x1000
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#define ECLIC_INT_IE_OFFSET 0x1001
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#define ECLIC_INT_ATTR_OFFSET 0x1002
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#define ECLIC_INT_CTRL_OFFSET 0x1003
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#define ECLIC_CFG_NLBITS_MASK 0x1E
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#define ECLIC_CFG_NLBITS_LSB 1
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static uint8_t eclic_get_clic_int_ctl_bits() {
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uint32_t bits = *(volatile uint32_t*)(ECLIC_ADDR_BASE+ECLIC_INFO_OFFSET);
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bits >>= 21;
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return (uint8_t) bits;
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}
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static uint8_t eclic_get_nlbits() {
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uint8_t nlbits = *(volatile uint8_t*)(ECLIC_ADDR_BASE+ECLIC_CFG_OFFSET);
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nlbits = (nlbits & ECLIC_CFG_NLBITS_MASK) >> ECLIC_CFG_NLBITS_LSB;
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uint8_t cicbits = eclic_get_clic_int_ctl_bits();
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if(nlbits > cicbits) {
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nlbits = cicbits;
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}
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return nlbits;
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}
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static uint8_t eclic_get_intctrl(uint32_t source) {
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return *(volatile uint8_t*)(ECLIC_ADDR_BASE+ECLIC_INT_CTRL_OFFSET+source*4);
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}
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static void eclic_set_intctrl(uint32_t source, uint8_t v) {
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*(volatile uint8_t*)(ECLIC_ADDR_BASE+ECLIC_INT_CTRL_OFFSET+source*4) = v;
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}
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static void eclic_enable_interrupt(uint32_t source) {
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*(volatile uint8_t*)(ECLIC_ADDR_BASE+ECLIC_INT_IE_OFFSET+source*4) = 1;
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}
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static void eclic_set_irq_level(uint32_t source, uint8_t level) {
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uint8_t nlbits = eclic_get_nlbits();
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if (nlbits == 0) {
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return ;
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}
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uint8_t intctrl_val = eclic_get_intctrl(source);
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intctrl_val <<= nlbits;
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intctrl_val >>= nlbits;
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intctrl_val |= (level << (8- nlbits));
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eclic_set_intctrl(source, intctrl_val);
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}
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static void eclic_set_irq_priority(uint32_t source, uint8_t priority) {
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uint8_t nlbits = eclic_get_nlbits();
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uint8_t cicbits= eclic_get_clic_int_ctl_bits();
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if (nlbits >= cicbits) {
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return ;
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}
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uint8_t pad = ~0;
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pad <<= cicbits;
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pad >>= cicbits;
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uint8_t intctrl_val = eclic_get_intctrl(source);
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intctrl_val >>= (8 - nlbits);
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intctrl_val <<= (8 - nlbits);
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intctrl_val |= (priority << (8 - cicbits));
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intctrl_val |= pad;
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eclic_set_intctrl(source, intctrl_val);
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}
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__PORT__ void port_cpu_init() {
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void rv32_exception_entry();
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uint32_t entry = (uint32_t) rv32_exception_entry;
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// 0x03 means use eclic
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__ASM__ __VOLATILE__("csrw mtvec, %0"::"r"(entry | 0x03));
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// MTVT2: 0x7EC
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// set mtvt2.MTVT2EN = 0 needs to clear bit 0
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// use mtvec as entry of irq and other trap
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__ASM__ __VOLATILE__("csrc 0x7EC, 0x1");
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eclic_enable_interrupt(CLIC_INT_TMR);
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eclic_set_irq_level(CLIC_INT_TMR, 0);
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}
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__PORT__ void port_systick_priority_set(uint32_t priority) {
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eclic_set_irq_priority(CLIC_INT_TMR, priority);
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}
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__PORT__ void *port_get_irq_vector_table() {
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void *base = 0;
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// MTVT: 0x307
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__ASM__ __VOLATILE__("csrr %0, 0x307":"=r"(base));
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return base;
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}
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