Commit Graph

13 Commits

Author SHA1 Message Date
TXuian 906398da9f fit musl for riscv64 boards. 2022-07-27 05:42:26 -07:00
TXuian cb4a9d03e0 fit musl for riscv64 boards. 2022-07-27 05:35:56 -07:00
TXuian 214cf55603 fit musl lib for arm boards. 2022-07-26 01:08:20 -07:00
xuedongliang 314f162836 Port openPOWERLINK to XiUOS from shi_jia_rui
it is OK
2022-07-01 16:12:49 +08:00
Jiacheng Shi b7648f0f08 powerlink: build liboplkmn.a and liboplkcn.a 2022-06-22 20:09:24 +08:00
Wang_Weigen 29a205e467 rename board name 'rv32m1_vega' as 'rv32m1-vega' 2022-06-22 16:42:52 +08:00
Liu_Weichao 80e08450fe fix compile error include watchdog and uart configure error 2022-06-08 11:09:50 +08:00
Liu_Weichao 808f00ade1 feat add sem obtain wait_time and modify e220 lora receive len operation 2022-04-26 17:57:32 +08:00
Liu_Weichao aedd1e046e fix InitBoardMemory and InstallConsole bug for XiZi bsp/board 2022-04-20 16:24:13 +08:00
Liu_Weichao fe4019668a fix table error in README.md 2022-03-11 13:43:45 +08:00
Liu_Weichao 29b8834088 modify XiZi DIR description in README.md 2022-03-11 11:26:22 +08:00
Liu_Weichao 16eaea4973 fix Ubiquitous/XiZi/board/ README.md description 2022-03-11 11:15:17 +08:00
Liu_Weichao 5078ff66cc feat modify XiUOS_Kernel dir from Ubiquitous/XiUOS to Ubiquitous/XiZi 2022-03-01 14:15:01 +08:00