TXuian
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cb4a9d03e0
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fit musl for riscv64 boards.
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2022-07-27 05:35:56 -07:00 |
xuedongliang
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314f162836
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Port openPOWERLINK to XiUOS from shi_jia_rui
it is OK
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2022-07-01 16:12:49 +08:00 |
Jiacheng Shi
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b7648f0f08
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powerlink: build liboplkmn.a and liboplkcn.a
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2022-06-22 20:09:24 +08:00 |
Wang_Weigen
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29a205e467
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rename board name 'rv32m1_vega' as 'rv32m1-vega'
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2022-06-22 16:42:52 +08:00 |
Liu_Weichao
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80e08450fe
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fix compile error include watchdog and uart configure error
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2022-06-08 11:09:50 +08:00 |
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Liu_Weichao
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808f00ade1
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feat add sem obtain wait_time and modify e220 lora receive len operation
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2022-04-26 17:57:32 +08:00 |
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Liu_Weichao
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aedd1e046e
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fix InitBoardMemory and InstallConsole bug for XiZi bsp/board
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2022-04-20 16:24:13 +08:00 |
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Liu_Weichao
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fe4019668a
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fix table error in README.md
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2022-03-11 13:43:45 +08:00 |
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Liu_Weichao
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29b8834088
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modify XiZi DIR description in README.md
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2022-03-11 11:26:22 +08:00 |
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Liu_Weichao
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16eaea4973
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fix Ubiquitous/XiZi/board/ README.md description
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2022-03-11 11:15:17 +08:00 |
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Liu_Weichao
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5078ff66cc
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feat modify XiUOS_Kernel dir from Ubiquitous/XiUOS to Ubiquitous/XiZi
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2022-03-01 14:15:01 +08:00 |