songyanguang
86 lines
3.0 KiB
C
86 lines
3.0 KiB
C
/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file memlayout.h
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* @brief virtual memory and physical memory layout
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2024-10-31
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*/
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/*************************************************
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File name: memlayout.h
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Description: virtual memory and physical memory layout
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Others:
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History:
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Author: AIIT XUOS Lab
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Modification:
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1. first version
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*************************************************/
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#pragma once
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// Memory layout
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// clang-format off
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#define ARCH_BIT 64
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/* physical memory layout */
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#define PHY_MEM_BASE (0x0000000040200000ULL)
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#define PHY_USER_FREEMEM_BASE (0x0000000100000000ULL)
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#define PHY_USER_FREEMEM_TOP (0x0000000200000000ULL)
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#define PHY_MEM_STOP (0x0000000200000000ULL)
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/* PTE-PAGE_SIZE */
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#define LEVEL4_PTE_SHIFT 12
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#define LEVEL4_PTE_SIZE (1 << LEVEL4_PTE_SHIFT)
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/* PDE-SECTION_SIZE */
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#define LEVEL3_PDE_SHIFT 21
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#define LEVEL3_PDE_SIZE (1 << LEVEL3_PDE_SHIFT)
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#define LEVEL2_PDE_SHIFT 30
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#define LEVEL2_PDE_SIZE (1 << LEVEL2_PDE_SHIFT)
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#define LEVEL1_PTE_SHIFT 39
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#define NUM_LEVEL2_PDE (1 << (LEVEL1_PTE_SHIFT - LEVEL2_PDE_SHIFT))
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#define NUM_LEVEL3_PDE (1 << (LEVEL2_PDE_SHIFT - LEVEL3_PDE_SHIFT)) // how many PDE in a PT
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#define NUM_LEVEL4_PTE (1 << (LEVEL3_PDE_SHIFT - LEVEL4_PTE_SHIFT)) // how many PTE in a PT
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#define NUM_TOPLEVEL_PDE NUM_LEVEL2_PDE
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#define PAGE_SHIFT LEVEL4_PTE_SHIFT
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#define PAGE_SIZE LEVEL4_PTE_SIZE
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#define MAX_NR_FREE_PAGES ((PHY_USER_FREEMEM_BASE - PHY_MEM_BASE) >> LEVEL4_PTE_SHIFT)
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/* Deivce memory layout */
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#define DEV_PHYMEM_BASE (0x0000000010000000ULL)
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#define DEV_VRTMEM_BASE ((0 - 0x0000004000000000ULL) + DEV_PHYMEM_BASE)
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#define DEV_MEM_SIZE (0x0000000030040000ULL)
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/* User memory layout */
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#define USER_STACK_SIZE PAGE_SIZE
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#define USER_MEM_BASE (0x0000000000000000ULL)
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#define USER_MEM_TOP (0x0000004000000000ULL)
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#define USER_IPC_SPACE_BASE (0x0000003000000000ULL)
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#define USER_IPC_USE_ALLOCATOR_WATERMARK (0x0000003000010000ULL)
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#define USER_IPC_SPACE_TOP (USER_IPC_SPACE_BASE + 0x10000000ULL)
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/* Kernel memory layout */
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#define KERN_MEM_BASE ((0 - 0x0000002000000000ULL) + PHY_MEM_BASE) // First kernel virtual address
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#define KERN_OFFSET (KERN_MEM_BASE - PHY_MEM_BASE)
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#define V2P(a) (((uint64_t)(a)) - KERN_OFFSET)
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#define P2V(a) ((void *)(((char *)(a)) + KERN_OFFSET))
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#define V2P_WO(x) ((x) - KERN_OFFSET) // same as V2P, but without casts
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#define P2V_WO(x) ((x) + KERN_OFFSET) // same as P2V, but without casts
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// clang-format on
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