songyanguang
93 lines
2.5 KiB
C
93 lines
2.5 KiB
C
/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file mmu.c
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* @brief mmu operations
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2024.04.26
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*/
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/*************************************************
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File name: mmu.c
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Description: mmu operations
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Others:
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History:
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Author: AIIT XUOS Lab
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Modification:
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1. first version
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*************************************************/
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#include <string.h>
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#include "mmu.h"
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#include "cache_common_ope.h"
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#include "mmu_common.h"
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#include "trap_common.h"
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// extern struct MmuCommonDone mmu_common_done;
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static struct MmuDriverRightGroup right_group;
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void load_pgdir(uintptr_t pgdir_paddr)
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{
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/* get cache driver */
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struct ICacheDone* p_icache_done = AchieveResource(&right_group.icache_driver_tag);
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struct DCacheDone* p_dcache_done = AchieveResource(&right_group.dcache_driver_tag);
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TTBR0_W((uint64_t)pgdir_paddr);
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DSB();
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CLEARTLB(0);
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ISB();
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p_icache_done->invalidateall();
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p_dcache_done->flushall();
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}
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__attribute__((always_inline)) inline static void _tlb_flush(uintptr_t va)
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{
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// __asm__ volatile("tlbi vae1is, %0" ::"r"(va));
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}
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static void tlb_flush_range(uintptr_t vstart, int len)
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{
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uintptr_t vaddr = vstart;
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uintptr_t vend = vaddr + len;
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for (; vaddr < vend; vaddr += PAGE_SIZE) {
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_tlb_flush(vaddr);
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}
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}
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static void tlb_flush_all()
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{
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CLEARTLB(0);
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}
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static struct MmuCommonDone mmu_common_done = {
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.MmuDevPteAttr = GetDevPteAttr,
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.MmuPdeAttr = GetPdeAttr,
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.MmuUsrPteAttr = GetUsrPteAttr,
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.MmuUsrDevPteAttr = GetUsrDevPteAttr,
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.MmuKernPteAttr = GetKernPteAttr,
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.LoadPgdir = load_pgdir,
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.TlbFlushAll = tlb_flush_all,
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.TlbFlush = tlb_flush_range,
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};
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struct MmuCommonDone* hardkernel_mmu_init(struct TraceTag* hardkernel_tag, char* icache_name, char* dcache_name)
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{
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/* init right group for mmu driver */
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AchieveResourceTag(&right_group.icache_driver_tag, hardkernel_tag, icache_name);
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AchieveResourceTag(&right_group.dcache_driver_tag, hardkernel_tag, dcache_name);
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return &mmu_common_done;
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} |