70 lines
1.6 KiB
ArmAsm
70 lines
1.6 KiB
ArmAsm
/*
|
|
* Copyright (c) 2020 AIIT XUOS Lab
|
|
* XiUOS is licensed under Mulan PSL v2.
|
|
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
|
* You may obtain a copy of Mulan PSL v2 at:
|
|
* http://license.coscl.org.cn/MulanPSL2
|
|
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
|
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
|
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
|
* See the Mulan PSL v2 for more details.
|
|
*/
|
|
/**
|
|
* @file context_switch.S
|
|
* @brief task context switch functions
|
|
* @version 1.0
|
|
* @author AIIT XUOS Lab
|
|
* @date 2024.4.10
|
|
*/
|
|
|
|
/*************************************************
|
|
File name: context_switch.S
|
|
Description: task context switch functions
|
|
Others:
|
|
History:
|
|
*************************************************/
|
|
|
|
/*
|
|
* Integer register context switch
|
|
* The callee-saved registers must be saved and restored.
|
|
*
|
|
* a0: previous thread_struct (must be preserved across the switch)
|
|
* a1: next thread_struct
|
|
*
|
|
*/
|
|
.global context_switch
|
|
|
|
context_switch:
|
|
sd ra, 0(a0)
|
|
sd sp, 8(a0)
|
|
sd s0, 16(a0)
|
|
sd s1, 24(a0)
|
|
sd s2, 32(a0)
|
|
sd s3, 40(a0)
|
|
sd s4, 48(a0)
|
|
sd s5, 56(a0)
|
|
sd s6, 64(a0)
|
|
sd s7, 72(a0)
|
|
sd s8, 80(a0)
|
|
sd s9, 88(a0)
|
|
sd s10, 96(a0)
|
|
sd s11, 104(a0)
|
|
|
|
ld ra, 0(a1)
|
|
ld sp, 8(a1)
|
|
ld s0, 16(a1)
|
|
ld s1, 24(a1)
|
|
ld s2, 32(a1)
|
|
ld s3, 40(a1)
|
|
ld s4, 48(a1)
|
|
ld s5, 56(a1)
|
|
ld s6, 64(a1)
|
|
ld s7, 72(a1)
|
|
ld s8, 80(a1)
|
|
ld s9, 88(a1)
|
|
ld s10, 96(a1)
|
|
ld s11, 104(a1)
|
|
|
|
mv tp, a1
|
|
ret
|