95 lines
3.4 KiB
C
95 lines
3.4 KiB
C
/*
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* Copyright (c) 2008-2012, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*!
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* @file asm_defines.h
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* @brief defines for startup assembly code
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*
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* @ingroup diag_util
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*/
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#ifndef _ASM_DEFINES_H_
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#define _ASM_DEFINES_H_
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////////////////////////////////////////////////////////////////////////////////
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// Definitions
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////////////////////////////////////////////////////////////////////////////////
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//! @name CPSR fields
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//@{
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#define CPSR_N (1 << 31) //!< Negative
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#define CPSR_Z (1 << 30) //!< Zero
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#define CPSR_C (1 << 29) //!< Carry
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#define CPSR_V (1 << 28) //!< Overflow
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#define CPSR_Q (1 << 27) //!< Saturation
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#define CPSR_E (1 << 9) //!< Endianness
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#define CPSR_A (1 << 8) //!< Async abort mask
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#define CPSR_I (1 << 7) //!< IRQ mask
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#define CPSR_F (1 << 6) //!< FIQ mask
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#define CPSR_T (1 << 5) //!< Thumb mode
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#define CPSR_MODE (0x1f) //!< Current processor mode
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//@}
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//! @name Mode bits in CPSR
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//@{
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#define MODE_USR 0x10 //!< User mode
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#define MODE_FIQ 0x11 //!< FIQ mode
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#define MODE_IRQ 0x12 //!< IRQ mode
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#define MODE_SVC 0x13 //!< Supervisor mode
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#define MODE_ABT 0x17 //!< Abort exception mode
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#define MODE_UND 0x1B //!< Undefined instruction exception mode
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#define MODE_SYS 0x1F //!< System mode
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//@}
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//! @name Interrupt enable bits in CPSR
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//@{
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#define I_BIT 0x80 //!< When I bit is set, IRQ is disabled
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#define F_BIT 0x40 //!< When F bit is set, FIQ is disabled
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//@}
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//! @name Stack sizes
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//@{
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//! @brief Size of stacks for exceptions.
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#define EXCEPTION_STACK_SIZE 2048
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//! @brief Supervisor mode stack size.
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//!
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//! This stack is much larger because most application code runs in
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//! Supervisor mode.
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#define SVC_STACK_SIZE 8192
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//@}
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#endif /*_ASM_DEFINES_H_ */
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////////////////////////////////////////////////////////////////////////////////
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// EOF
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////////////////////////////////////////////////////////////////////////////////
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