songyanguang
146 lines
3.3 KiB
Plaintext
146 lines
3.3 KiB
Plaintext
/*
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* Copyright (c) 2010-2012, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @file jh7110_user.lds
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* @brief refer to XV6 riscv
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2024.10.10
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*/
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OUTPUT_ARCH("riscv")
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SECTIONS
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{
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. = 0x0;
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.text : {
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*(.text .text.*)
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}
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.rodata : {
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. = ALIGN(16);
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*(.srodata .srodata.*)
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. = ALIGN(16);
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*(.rodata .rodata.*)
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}
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.eh_frame : {
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*(.eh_frame)
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*(.eh_frame.*)
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}
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. = ALIGN(0x1000);
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.data : {
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. = ALIGN(16);
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*(.sdata .sdata.*)
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. = ALIGN(16);
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*(.data .data.*)
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}
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.bss : {
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. = ALIGN(16);
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*(.sbss .sbss.*)
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. = ALIGN(16);
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*(.bss .bss.*)
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}
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. = ALIGN((1 << 21));
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.sdata : {
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__global_pointer$ = . + 0x800;
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*(.sdata*)
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}
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. = ALIGN((1 << 21));
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_edata = .;
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_end = .;
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PROVIDE(end = .);
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}
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/*
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SECTIONS
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{
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_start = .;
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_boot_start = .;
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. = ALIGN(0x1000);
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.text : {
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. = ALIGN(0x1000);
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*(.text .text.*)
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}
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. = ALIGN(0x1000);
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.data : {
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. = ALIGN(16);
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*(.sdata .sdata.*)
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. = ALIGN(16);
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*(.data .data.*)
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__start_init_task = .;
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init_thread_union = .;
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init_stack = .;
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KEEP(*(.data..init_task))
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KEEP(*(.data..init_thread_info))
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. = __start_init_task + ((1 << (12)) << (2));
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__end_init_task = .;
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PROVIDE(__init_array_start = .);
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PROVIDE(__init_array_end = .);
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}
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. = ALIGN(0x1000);
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_image_size = . - _start;
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. = ALIGN(0x1000);
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.bss : {
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PROVIDE(kernel_data_begin = .);
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PROVIDE(__bss_start = .);
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*(.bss .bss.* COMMON)
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. = ALIGN(0x1000);
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PROVIDE(__bss_end = .);
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PROVIDE(kernel_data_end = .);
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__bss_stop = .;
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}
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. = ALIGN((1 << 21));
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.sdata : {
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__global_pointer$ = . + 0x800;
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*(.sdata*)
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}
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. = ALIGN((1 << 21));
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_edata = .;
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_end = .;
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PROVIDE(end = .);
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}
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*/ |