songyanguang
212 lines
6.4 KiB
C
212 lines
6.4 KiB
C
/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file
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* @brief
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2024.12.02
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*/
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/*************************************************
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File name: mmu_init.c
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Description:
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Others:
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History:
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Author: AIIT XUOS Lab
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Modification:
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1. first version
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*************************************************/
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#include <stdint.h>
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#include <string.h>
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#include <stdbool.h>
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#include "asm/page.h"
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#include "pgtable.h"
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#include "memlayout.h"
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#include "ns16550.h"
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#include "asm/pgtable-bits.h"
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#define PFN_PD(x, prot) (((x) << _PAGE_PFN_SHIFT) | (prot))
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#define _PD_PFN(x) ((x) >> _PAGE_PFN_SHIFT)
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extern char _start[];
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struct kernel_mapping kernel_map;
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uintptr_t trampoline_pg_dir[PTRS_PER_PGD] __attribute__((aligned(PAGE_SIZE)));
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uintptr_t early_pg_dir[PTRS_PER_PGD] __attribute__((aligned(PAGE_SIZE)));
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static uintptr_t trampoline_pmd[PTRS_PER_PMD] __attribute__((aligned(PAGE_SIZE)));
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static uintptr_t early_pmd[PTRS_PER_PMD] __attribute__((aligned(PAGE_SIZE)));
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static uintptr_t early_uart_pmd[PTRS_PER_PMD] __attribute__((aligned(PAGE_SIZE)));
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static uintptr_t early_pmd_free[((PHY_USER_FREEMEM_BASE - PHY_MEM_BASE) >> PGDIR_SHIFT) + 1][PTRS_PER_PMD] __attribute__((aligned(PAGE_SIZE)));
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static uintptr_t early_pmd_inear_map[PTRS_PER_PMD] __attribute__((aligned(PAGE_SIZE)));
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static uintptr_t early_plic_pmd[PTRS_PER_PMD] __attribute__((aligned(PAGE_SIZE)));
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static uintptr_t *get_pmd_virt_early(phys_addr_t pa)
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{
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/* Before MMU is enabled */
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return (uintptr_t *)((uintptr_t)pa);
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}
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static phys_addr_t alloc_pmd_early(uintptr_t va)
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{
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return (uintptr_t)early_pmd;
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}
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static void create_pmd_mapping_early(uintptr_t *pmdp,
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uintptr_t va, phys_addr_t pa,
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phys_addr_t sz, uintptr_t prot)
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{
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uintptr_t pmd_idx = pmd_index(va);
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if (sz == PMD_SIZE) {
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if ((pmdp[pmd_idx]) == 0)
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pmdp[pmd_idx] = (PFN_PD(PFN_DOWN(pa), prot));
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return;
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}
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}
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static void create_pgd_mapping_early(uintptr_t *pgdp,
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uintptr_t va, phys_addr_t pa,
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phys_addr_t sz, uintptr_t prot)
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{
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uintptr_t *nextp;
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phys_addr_t next_phys;
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uintptr_t pgd_idx = pgd_index(va);
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if (sz == PGDIR_SIZE) {
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if ((pgdp[pgd_idx]) == 0)
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pgdp[pgd_idx] = (PFN_PD(PFN_DOWN(pa), prot));
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return;
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}
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if ((pgdp[pgd_idx]) == 0) {
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next_phys = alloc_pmd_early(va);
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pgdp[pgd_idx] = (PFN_PD(PFN_DOWN(next_phys), _PAGE_TABLE));
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nextp = get_pmd_virt_early(next_phys);
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memset(nextp, 0, PAGE_SIZE);
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} else {
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next_phys = PFN_PHYS(_PD_PFN((pgdp[pgd_idx])));
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nextp = get_pmd_virt_early(next_phys);
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}
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create_pmd_mapping_early(nextp, va, pa, sz, prot);
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}
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static void create_kernel_page_table_early(uintptr_t *pgdir, bool early)
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{
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uintptr_t va, end_va;
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end_va = kernel_map.virt_addr + kernel_map.size;
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for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE) {
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create_pgd_mapping_early(pgdir, va,
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kernel_map.phys_addr + (va - kernel_map.virt_addr),
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PMD_SIZE,
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(_PAGE_KERNEL | _PAGE_EXEC));
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}
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}
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static void create_kernel_pgd_mapping_free_early(uintptr_t *pgdp,
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uintptr_t va, phys_addr_t pa,
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phys_addr_t sz, uintptr_t prot)
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{
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uintptr_t *nextp;
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phys_addr_t next_phys;
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uintptr_t pgd_idx = pgd_index(va);
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uintptr_t start_pgd_idx = pgd_index(kernel_map.virt_addr);
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if ((pgdp[pgd_idx]) == 0) {
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next_phys = (uintptr_t)early_pmd_free[pgd_idx - start_pgd_idx];
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pgdp[pgd_idx] = (PFN_PD(PFN_DOWN(next_phys), _PAGE_TABLE));
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nextp = get_pmd_virt_early(next_phys);
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memset(nextp, 0, PAGE_SIZE);
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} else {
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next_phys = PFN_PHYS(_PD_PFN((pgdp[pgd_idx])));
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nextp = get_pmd_virt_early(next_phys);
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}
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create_pmd_mapping_early(nextp, va, pa, sz, prot);
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}
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static void create_kernel_page_table_free_early(uintptr_t *pgdir, bool early)
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{
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uintptr_t va, end_va;
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end_va = KERN_MEM_BASE + (PHY_USER_FREEMEM_BASE - PHY_MEM_BASE);
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for (va = KERN_MEM_BASE + kernel_map.size; va < end_va; va += PMD_SIZE) {
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create_kernel_pgd_mapping_free_early(pgdir, va,
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kernel_map.phys_addr + (va - KERN_MEM_BASE),
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PMD_SIZE,
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_PAGE_KERNEL);
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}
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}
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static void create_plic_page_table_early(uintptr_t *pgdir, bool early)
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{
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uintptr_t va;
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uintptr_t pa;
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for (va = PLIC_VIRTMEM_BASE; va < PLIC_VIRTMEM_BASE + PLIC_MEM_SIZE; va += PMD_SIZE) {
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pa = va - PLIC_VIRTMEM_BASE + PLIC_PHYMEM_BASE;
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create_pgd_mapping_early(pgdir, va, (uintptr_t)early_plic_pmd, PGDIR_SIZE, _PAGE_TABLE);
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create_pmd_mapping_early(early_plic_pmd, va, pa, PMD_SIZE, _PAGE_KERNEL);
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}
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}
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/*
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* setup_vm_early() is called from boot.S with MMU-off.
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*
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* Following requirements should be honoured for setup_vm() to work
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* correctly:
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* 1) It should use PC-relative addressing for accessing kernel symbols.
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* To achieve this we always use GCC cmodel=medany.
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* 2) The compiler instrumentation for FTRACE will not work for setup_vm()
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* so disable compiler instrumentation when FTRACE is enabled.
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*/
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void setup_vm_early(void)
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{
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kernel_map.virt_addr = KERNEL_LINK_ADDR;
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kernel_map.phys_addr = (uintptr_t)(&_start);
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kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr;
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kernel_map.va_pa_offset = PAGE_OFFSET - kernel_map.phys_addr;
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kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr;
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/* Setup trampoline PGD and PMD */
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create_pgd_mapping_early(trampoline_pg_dir, kernel_map.virt_addr, (uintptr_t)trampoline_pmd, PGDIR_SIZE, _PAGE_TABLE);
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create_pmd_mapping_early(trampoline_pmd, kernel_map.virt_addr, kernel_map.phys_addr, PMD_SIZE, (_PAGE_KERNEL | _PAGE_EXEC));
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/*
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* Setup early PGD covering entire kernel which will allow
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* us to reach paging_init(). We map all memory banks later
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* in setup_vm_final() below.
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*/
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create_kernel_page_table_early(early_pg_dir, true);
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/* Setup uart PGD and PMD */
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create_pgd_mapping_early(early_pg_dir, DEV_VRTMEM_BASE, (uintptr_t)early_uart_pmd, PGDIR_SIZE, _PAGE_TABLE);
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create_pmd_mapping_early(early_uart_pmd, DEV_VRTMEM_BASE, DEV_PHYMEM_BASE, PMD_SIZE, _PAGE_KERNEL);
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/* Setup kernel free PGD and PMD */
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create_kernel_page_table_free_early(early_pg_dir, true);
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/* Setup PLIC PGD and PMD */
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create_plic_page_table_early(early_pg_dir, true);
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}
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