From f339d35b1675339e0ad308f4f666ea1c58954f7b Mon Sep 17 00:00:00 2001
From: songyanguang <345810377@qq.com>
Date: Fri, 15 Nov 2024 16:50:52 +0800
Subject: [PATCH] Modify device virtual address base address

---
 .../drivers/usb/components/port/xhci/usb_hc_xhci.h        | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/Ubiquitous/XiZi_AIoT/services/drivers/usb/components/port/xhci/usb_hc_xhci.h b/Ubiquitous/XiZi_AIoT/services/drivers/usb/components/port/xhci/usb_hc_xhci.h
index 4dbd3fe10..7060548a3 100644
--- a/Ubiquitous/XiZi_AIoT/services/drivers/usb/components/port/xhci/usb_hc_xhci.h
+++ b/Ubiquitous/XiZi_AIoT/services/drivers/usb/components/port/xhci/usb_hc_xhci.h
@@ -66,9 +66,11 @@ extern "C" {
  */
 #define USB3_DWC3_ADDR_GAP              0x01000 
 
-#define USB3_VIRADDR_BASE               0x0000002000000000ULL
-#define USB3_0_VIRADDR_BASE             USB3_VIRADDR_BASE
-#define USB3_1_VIRADDR_BASE             USB3_VIRADDR_BASE + USB3_ADDR_OFFSET_UPPER_BOUND + USB3_DWC3_ADDR_GAP
+/* Deivce memory layout */
+#define DEV_PHYMEM_BASE                 (0x00000000F0000000ULL)
+#define DEV_VRTMEM_BASE                 (0x00000020F0000000ULL)
+#define USB3_0_VIRADDR_BASE             (DEV_VRTMEM_BASE - DEV_PHYMEM_BASE + USB3_0_BASE_ADDR)
+#define USB3_1_VIRADDR_BASE             (DEV_VRTMEM_BASE - DEV_PHYMEM_BASE + USB3_1_BASE_ADDR)
 
 #define USB3_0_INTERRUPT_NO             201
 #define USB3_1_INTERRUPT_NO             202