From ce1c689379b386a8ff5298871e4fb1bbec6dd59e Mon Sep 17 00:00:00 2001 From: songyanguang <345810377@qq.com> Date: Fri, 6 Dec 2024 17:06:23 +0800 Subject: [PATCH] Fix compile warnings --- .../hardkernel/mmu/riscv/rv64gc/bootmmu.c | 80 +------------------ .../hardkernel/mmu/riscv/rv64gc/mmu_init.c | 8 +- .../riscv/rv64gc/uart_io_for_jh7110/ns16550.c | 4 +- 3 files changed, 6 insertions(+), 86 deletions(-) diff --git a/Ubiquitous/XiZi_AIoT/hardkernel/mmu/riscv/rv64gc/bootmmu.c b/Ubiquitous/XiZi_AIoT/hardkernel/mmu/riscv/rv64gc/bootmmu.c index 0ad40cdf5..0f62871c7 100644 --- a/Ubiquitous/XiZi_AIoT/hardkernel/mmu/riscv/rv64gc/bootmmu.c +++ b/Ubiquitous/XiZi_AIoT/hardkernel/mmu/riscv/rv64gc/bootmmu.c @@ -41,84 +41,7 @@ Modification: #include // -#define L2_PTE_VALID (1 << 0) - -#define L3_PTE_VALID (1 << 0) - -#define L4_TYPE_PAGE (3 << 0) -#define L4_PTE_DEV ((0b00) << 2) // Device memory -#define L4_PTE_NORMAL ((0b01) << 2) // Device memory -#define L4_PTE_AF (1 << 10) // Data Access Permissions - -#define L4_PTE_PXN (1UL << 53) // Privileged eXecute Never -#define L4_PTE_UXN (1UL << 54) // Unprivileged(user) eXecute Never -#define L4_PTE_XN (PTE_PXN|PTE_UXN) // eXecute Never - -#define IDX_MASK (0b111111111) -#define L3_PDE_INDEX(idx) ((idx << LEVEL3_PDE_SHIFT) & L3_IDX_MASK) - -#define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC | _PAGE_ACCESSED | _PAGE_GLOBAL | _PAGE_DIRTY) -#define PAGE_KERNEL (_PAGE_KERNEL) -#define PAGE_KERNEL_READ (_PAGE_KERNEL & ~_PAGE_WRITE) -#define PAGE_KERNEL_EXEC (_PAGE_KERNEL | _PAGE_EXEC) - -// -uint64_t boot_l2pgdir[NUM_LEVEL2_PDE] __attribute__((aligned(0x1000))) = { 0 }; - -uint64_t boot_dev_l3pgdir[NUM_LEVEL3_PDE] __attribute__((aligned(0x1000))) = { 0 }; -uint64_t boot_kern_l3pgdir[NUM_LEVEL3_PDE] __attribute__((aligned(0x1000))) = { 0 }; - -uint64_t boot_dev_l4pgdirs[NUM_LEVEL3_PDE][NUM_LEVEL4_PTE] __attribute__((aligned(0x1000))) = { 0 }; -uint64_t boot_kern_l4pgdirs[NUM_LEVEL3_PDE][NUM_LEVEL4_PTE] __attribute__((aligned(0x1000))) = { 0 }; - -// -static void build_boot_pgdir() -{ - static bool built = false; - if (!built) { - uint64_t dev_phy_mem_base = DEV_PHYMEM_BASE; - uint64_t kern_phy_mem_base = PHY_MEM_BASE; - uint64_t cur_mem_paddr; - - // dev mem - boot_l2pgdir[(dev_phy_mem_base >> LEVEL2_PDE_SHIFT) & IDX_MASK] = (((uint64_t)boot_dev_l3pgdir >> PAGE_SHIFT) << _PAGE_PFN_SHIFT) | _PAGE_TABLE; - boot_l2pgdir[(MMIO_P2V_WO(dev_phy_mem_base) >> LEVEL2_PDE_SHIFT) & IDX_MASK] = (((uint64_t)boot_dev_l3pgdir >> PAGE_SHIFT) << _PAGE_PFN_SHIFT) | _PAGE_TABLE; - - cur_mem_paddr = ALIGNDOWN(dev_phy_mem_base, LEVEL2_PDE_SIZE); - for (size_t i = 0; i < NUM_LEVEL3_PDE; i++) { - boot_dev_l3pgdir[i] = (((uint64_t)cur_mem_paddr >> PAGE_SHIFT) << _PAGE_PFN_SHIFT) | PAGE_KERNEL; - cur_mem_paddr += LEVEL3_PDE_SIZE; - } - - // identical mem - boot_l2pgdir[(kern_phy_mem_base >> LEVEL2_PDE_SHIFT) & IDX_MASK] = (((uint64_t)boot_kern_l3pgdir >> PAGE_SHIFT) << _PAGE_PFN_SHIFT) | _PAGE_TABLE; - boot_l2pgdir[(P2V_WO(kern_phy_mem_base) >> LEVEL2_PDE_SHIFT) & IDX_MASK] = (((uint64_t)boot_kern_l3pgdir >> PAGE_SHIFT) << _PAGE_PFN_SHIFT) | _PAGE_TABLE; - - cur_mem_paddr = ALIGNDOWN(kern_phy_mem_base, PAGE_SIZE); - for (size_t i = 0; i < NUM_LEVEL3_PDE; i++) { - boot_kern_l3pgdir[i] = (((uint64_t)cur_mem_paddr >> PAGE_SHIFT) << _PAGE_PFN_SHIFT) | PAGE_KERNEL; - cur_mem_paddr += LEVEL3_PDE_SIZE; - } - - built = true; - } -} - - -static inline void local_flush_tlb_all(void) -{ - __asm__ __volatile__ ("sfence.vma" : : : "memory"); -} - -static void load_boot_pgdir() -{ - unsigned long satp_val = 0; - - satp_val = (unsigned long)(((uintptr_t)boot_l2pgdir >> PAGE_SHIFT) | SATP_MODE); - csr_write(CSR_SATP, satp_val); -} - -// +#if 0 static int test_access_map_address(void) { unsigned long address = KERN_MEM_BASE + (PHY_USER_FREEMEM_BASE - PHY_MEM_BASE) - 4096; @@ -143,6 +66,7 @@ static void test_mmu(void) test_access_map_address(); test_access_unmap_address(); } +#endif // extern void main(void); diff --git a/Ubiquitous/XiZi_AIoT/hardkernel/mmu/riscv/rv64gc/mmu_init.c b/Ubiquitous/XiZi_AIoT/hardkernel/mmu/riscv/rv64gc/mmu_init.c index 698ddee32..0188cc570 100644 --- a/Ubiquitous/XiZi_AIoT/hardkernel/mmu/riscv/rv64gc/mmu_init.c +++ b/Ubiquitous/XiZi_AIoT/hardkernel/mmu/riscv/rv64gc/mmu_init.c @@ -40,7 +40,6 @@ Modification: #define __page_aligned_bss __attribute__((section(".bss..page_aligned"))) __attribute__((aligned(PAGE_SIZE))) #define __initdata __attribute__((section(".init.data"))) #define __init __attribute__((section(".init.text"))) -#define __aligned(x) __attribute__((aligned__(x))) #define __maybe_unused __attribute__((__unused__)) @@ -76,8 +75,6 @@ static void __init create_pmd_mapping_early(pmd_t *pmdp, uintptr_t va, phys_addr_t pa, phys_addr_t sz, pgprot_t prot) { - pte_t *ptep; - phys_addr_t pte_phys; uintptr_t pmd_idx = pmd_index(va); if (sz == PMD_SIZE) { @@ -139,7 +136,7 @@ static void __init create_kernel_pgd_mapping_free_early(pgd_t *pgdp, uintptr_t start_pgd_idx = pgd_index(kernel_map.virt_addr); if (pgd_val(pgdp[pgd_idx]) == 0) { - next_phys = early_pmd_free[pgd_idx - start_pgd_idx]; + next_phys = (uintptr_t)early_pmd_free[pgd_idx - start_pgd_idx]; pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE); nextp = get_pmd_virt_early(next_phys); memset(nextp, 0, PAGE_SIZE); @@ -173,7 +170,7 @@ static void __init create_kernel_pgd_mapping_linear_map_early(pgd_t *pgdp, uintptr_t pgd_idx = pgd_index(va); if (pgd_val(pgdp[pgd_idx]) == 0) { - next_phys = early_pmd_inear_map; + next_phys = (uintptr_t)early_pmd_inear_map; pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE); nextp = get_pmd_virt_early(next_phys); memset(nextp, 0, PAGE_SIZE); @@ -211,7 +208,6 @@ static void __init create_kernel_page_table_linear_map_early(pgd_t *pgdir, bool void __init setup_vm_early(void) { - _debug_uart_printascii("setup_vm_early start\n"); kernel_map.virt_addr = KERN_MEM_BASE; kernel_map.phys_addr = (uintptr_t)(&_start); diff --git a/Ubiquitous/XiZi_AIoT/hardkernel/uart/riscv/rv64gc/uart_io_for_jh7110/ns16550.c b/Ubiquitous/XiZi_AIoT/hardkernel/uart/riscv/rv64gc/uart_io_for_jh7110/ns16550.c index 27f6592d0..b0447db7a 100644 --- a/Ubiquitous/XiZi_AIoT/hardkernel/uart/riscv/rv64gc/uart_io_for_jh7110/ns16550.c +++ b/Ubiquitous/XiZi_AIoT/hardkernel/uart/riscv/rv64gc/uart_io_for_jh7110/ns16550.c @@ -176,7 +176,7 @@ void _debug_uart_init(void) g_ns16550_uart_base = CONFIG_SYS_NS16550_UART_BASE_VIRT; ns16550_serial_init(); ns16550_serial_setbrg(baudrate); - _debug_uart_printascii("_debug_uart_init success.\n"); +// _debug_uart_printascii("_debug_uart_init success.\n"); } void _debug_uart_init_early(void) @@ -186,7 +186,7 @@ void _debug_uart_init_early(void) g_ns16550_uart_base = CONFIG_SYS_NS16550_UART_BASE; ns16550_serial_init(); ns16550_serial_setbrg(baudrate); - _debug_uart_printascii("_debug_uart_init_early success.\n"); +// _debug_uart_printascii("_debug_uart_init_early success.\n"); } void _debug_uart_putc(int ch)