add 3568

Ubiquitous/XiZi_AIoT/hardkernel/arch/arm/armv8-a/Makefile

@@ -1,6 +1,6 @@
 # The following three platforms support compatiable instructions.
-ifneq ($(findstring $(BOARD), ok1028a-c), )
-SRC_DIR := cortex-a72
+ifneq ($(findstring $(BOARD), 3568), )
+SRC_DIR := cortex-a55
 endif
 
 

Ubiquitous/XiZi_AIoT/hardkernel/arch/arm/armv8-a/cortex-a55/core.c

@@ -29,7 +29,7 @@ Modification:
 1. first version
 *************************************************/
 
-/*********cortex-a72 general register************
+/*********cortex-a55 general register************
    EL0            |         EL1        |       EL2      |       EL3
 
      x0;
@@ -63,7 +63,7 @@ Modification:
      x28;
      x29;
      x30;
-*********cortex-a72  special register************
+*********cortex-a55  special register************
                                                 XZR
                                                 PC
      SP_EL0             SP_EL1            SP_EL2           SP_EL3

Ubiquitous/XiZi_AIoT/hardkernel/arch/arm/armv8-a/cortex-a55/core.h

@@ -12,7 +12,7 @@
 
 /**
  * @file core.h
- * @brief cortex-a72 core function
+ * @brief cortex-a55 core function
  * @version 1.0
  * @author AIIT XUOS Lab
  * @date 2024.04.11
@@ -20,7 +20,7 @@
 
 /*************************************************
 File name: core.h
-Description: cortex-a72 core function
+Description: cortex-a55 core function
 Others:
 History:
 Author: AIIT XUOS Lab
@@ -71,7 +71,7 @@ Modification:
 #include <stdint.h>
 #include <string.h>
 
-#include "cortex_a72.h"
+#include "cortex_a55.h"
 
 #define NR_CPU 1 // maximum number of CPUs
 

Ubiquitous/XiZi_AIoT/hardkernel/arch/arm/armv8-a/cortex-a55/preboot_for_3568/Makefile

@@ -1,5 +1,5 @@
 SRC_FILES := boot.S \
 			 smp.c \
-			 cortexA72.S
+			 cortexA55.S
 
 include $(KERNEL_ROOT)/compiler.mk

Ubiquitous/XiZi_AIoT/hardkernel/arch/arm/armv8-a/cortex-a55/preboot_for_3568/config.mk

@@ -2,7 +2,7 @@ export CROSS_COMPILE ?= aarch64-none-elf-
 export DEVICE = -mtune=cortex-a55 -ffreestanding -fno-common -fno-stack-protector -fno-pie -no-pie
 export CFLAGS := $(DEVICE) -Wall -Werror -O0 -g -fno-omit-frame-pointer -fPIC
 # export AFLAGS := -c $(DEVICE) -x assembler-with-cpp -D__ASSEMBLY__ -gdwarf-2
-export LFLAGS := $(DEVICE) -Wl,-T -Wl,$(KERNEL_ROOT)/hardkernel/arch/arm/armv8-a/cortex-a72/preboot_for_ok1028a-c/nxp_ls1028.lds -Wl,--start-group,-lgcc,-lc,--end-group
+export LFLAGS := $(DEVICE) -Wl,-T -Wl,$(KERNEL_ROOT)/hardkernel/arch/arm/armv8-a/cortex-a55/preboot_for_3568/nxp_ls1028.lds -Wl,--start-group,-lgcc,-lc,--end-group
 export CXXFLAGS := 
 
 export DEFINES := -DHAVE_CCONFIG_H -DCHIP_LS1028

Ubiquitous/XiZi_AIoT/hardkernel/arch/arm/armv8-a/cortex-a55/preboot_for_3568/cortexA55.S

@@ -1,10 +1,10 @@
 /*!
- * @file cortexA72.s
- * @brief This file contains cortexA72 functions
+ * @file cortexA55.s
+ * @brief This file contains cortexA55 functions
  *
  */
 /*************************************************
-File name: cortexA72.S
+File name: cortexA55.S
 Description: This file contains cortexA9 functions
 Others: 
 History:

Ubiquitous/XiZi_AIoT/hardkernel/arch/arm/armv8-a/cortex-a55/preboot_for_3568/include/cortex_a55.h

@@ -28,7 +28,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 /**
- * @file cortex_a72.h
+ * @file cortex_a55.h
  * @brief some cortex A72 core functions
  * @version 1.0
  * @author AIIT XUOS Lab
@@ -36,7 +36,7 @@
  */
 
 /*************************************************
-File name: cortex_a72.h
+File name: cortex_a55.h
 Description: some cortex A72 core functions
 Others:
 History: