sync the upstream branch
This commit is contained in:
Wang_Weigen
@@ -0,0 +1,83 @@
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/**
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* @file board.h
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* @brief define imxrt1176-sbc-board init configure and start-up function
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2021-05-28
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*/
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/*************************************************
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File name: board.h
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Description: define imxrt1176-sbc board init function and struct
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Others:
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||||
History:
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1. Date: 2022-08-19
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Author: AIIT XUOS Lab
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Modification:
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1. define imxrt-board InitBoardHardware
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2. define imxrt-board heap struct
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*************************************************/
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#ifndef __BOARD_H__
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#define __BOARD_H__
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#include "fsl_common.h"
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#include "fsl_gpio.h"
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#include "fsl_clock.h"
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#include "fsl_enet.h"
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#include "clock_config.h"
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#include "pin_mux.h"
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#include <xizi.h>
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#include <arch_interrupt.h>
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#define BOARD_NET_COUNT (2)
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/* MAC address configuration. */
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#define configMAC_ADDR {0x02, 0x12, 0x13, 0x10, 0x15, 0x11}
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#define configMAC_ADDR_ETH1 {0x02, 0x12, 0x13, 0x10, 0x15, 0x12}
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/*! @brief The ENET0 PHY address. */
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#define BOARD_ENET0_PHY_ADDRESS (0x02U) /* Phy address of enet port 0. */
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/*! @brief The ENET1 PHY address. */
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#define BOARD_ENET1_PHY_ADDRESS (0x07U) /* Phy address of enet port 1. */
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#define BOARD_FLASH_SIZE (0x1000000U)
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extern int heap_start;
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extern int heap_end;
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#define HEAP_BEGIN (&heap_start)
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#define HEAP_END (&heap_end)
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#define HEAP_SIZE ((uint32_t)HEAP_END - (uint32_t)HEAP_BEGIN)
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void InitBoardHardware(void);
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @brief The board name */
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#define BOARD_NAME "IMXRT1050"
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#define NVIC_PRIORITYGROUP_0 0x00000007U /*!< 0 bits for pre-emption priority
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4 bits for subpriority */
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#define NVIC_PRIORITYGROUP_1 0x00000006U /*!< 1 bits for pre-emption priority
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3 bits for subpriority */
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#define NVIC_PRIORITYGROUP_2 0x00000005U /*!< 2 bits for pre-emption priority
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2 bits for subpriority */
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#define NVIC_PRIORITYGROUP_3 0x00000004U /*!< 3 bits for pre-emption priority
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1 bits for subpriority */
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#define NVIC_PRIORITYGROUP_4 0x00000003U /*!< 4 bits for pre-emption priority*/
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus */
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void BOARD_ConfigMPU(void);
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void BOARD_InitPins(void);
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#if defined(__cplusplus)
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}
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#endif /* __cplusplus */
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#endif /* _BOARD_H_ */
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@@ -0,0 +1,226 @@
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/*
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* Copyright 2020-2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/**
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* @file clock_config.c
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* @brief support imxrt1176-sbc clock configure
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2022-08-19
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*/
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/*************************************************
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File name: clock_config.c
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Description: support imxrt1176-sbc clock configure
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Others: take SDK_2_11_1_MIMXRT1170-EVK for references
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History:
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1. Date: 2022-08-19
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Author: AIIT XUOS Lab
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Modification:
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*************************************************/
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#ifndef _CLOCK_CONFIG_H_
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#define _CLOCK_CONFIG_H_
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#include "fsl_common.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */
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#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */
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/*******************************************************************************
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************************ BOARD_InitBootClocks function ************************
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus*/
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/*!
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* @brief This function executes default configuration of clocks.
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*
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*/
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void BOARD_InitBootClocks(void);
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#if defined(__cplusplus)
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}
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#endif /* __cplusplus*/
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/*******************************************************************************
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********************** Configuration BOARD_BootClockRUN ***********************
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******************************************************************************/
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/*******************************************************************************
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* Definitions for BOARD_BootClockRUN configuration
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******************************************************************************/
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#if __CORTEX_M == 7
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#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 996000000UL /*!< CM7 Core clock frequency: 996000000Hz */
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#else
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#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 392727272UL /*!< CM4 Core clock frequency: 392727272Hz */
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#endif
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/* Clock outputs (values are in Hz): */
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#define BOARD_BOOTCLOCKRUN_ACMP_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_ADC1_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_ADC2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_ARM_PLL_CLK 996000000UL
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#define BOARD_BOOTCLOCKRUN_ASRC_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_AXI_CLK_ROOT 996000000UL
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#define BOARD_BOOTCLOCKRUN_BUS_CLK_ROOT 240000000UL
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#define BOARD_BOOTCLOCKRUN_BUS_LPSR_CLK_ROOT 160000000UL
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#define BOARD_BOOTCLOCKRUN_CAN1_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_CAN2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_CAN3_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_CCM_CLKO1_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_CCM_CLKO2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL
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#define BOARD_BOOTCLOCKRUN_CSI2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_CSI2_ESC_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_CSI2_UI_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_CSSYS_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_CSTRACE_CLK_ROOT 132000000UL
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#define BOARD_BOOTCLOCKRUN_ELCDIF_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_EMV1_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_EMV2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_ENET1_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_ENET2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_ENET_1G_REF_CLK 0UL
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#define BOARD_BOOTCLOCKRUN_ENET_1G_TX_CLK 24000000UL
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#define BOARD_BOOTCLOCKRUN_ENET_25M_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_ENET_QOS_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_ENET_QOS_REF_CLK 0UL
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#define BOARD_BOOTCLOCKRUN_ENET_QOS_TX_CLK 0UL
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#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK 0UL
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#define BOARD_BOOTCLOCKRUN_ENET_TIMER1_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_ENET_TIMER2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_ENET_TIMER3_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK 0UL
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#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_FLEXSPI1_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_FLEXSPI2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_GC355_CLK_ROOT 492000012UL
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#define BOARD_BOOTCLOCKRUN_GPT1_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 24000000UL
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#define BOARD_BOOTCLOCKRUN_GPT2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 24000000UL
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#define BOARD_BOOTCLOCKRUN_GPT3_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_GPT3_IPG_CLK_HIGHFREQ 24000000UL
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#define BOARD_BOOTCLOCKRUN_GPT4_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_GPT4_IPG_CLK_HIGHFREQ 24000000UL
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#define BOARD_BOOTCLOCKRUN_GPT5_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_GPT5_IPG_CLK_HIGHFREQ 24000000UL
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#define BOARD_BOOTCLOCKRUN_GPT6_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_GPT6_IPG_CLK_HIGHFREQ 24000000UL
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#define BOARD_BOOTCLOCKRUN_LCDIFV2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPI2C1_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPI2C2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPI2C3_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPI2C4_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPI2C5_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPI2C6_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPSPI1_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPSPI2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPSPI3_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPSPI4_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPSPI5_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPSPI6_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPUART10_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPUART11_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPUART12_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPUART1_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPUART2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPUART3_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPUART4_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPUART5_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPUART6_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPUART7_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPUART8_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_LPUART9_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_M4_CLK_ROOT 392727272UL
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#define BOARD_BOOTCLOCKRUN_M4_SYSTICK_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_M7_CLK_ROOT 996000000UL
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#define BOARD_BOOTCLOCKRUN_M7_SYSTICK_CLK_ROOT 100000UL
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#define BOARD_BOOTCLOCKRUN_MIC_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_MIPI_DSI_TX_CLK_ESC_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_MIPI_ESC_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_MIPI_REF_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_MQS_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_MQS_MCLK 24000000UL
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#define BOARD_BOOTCLOCKRUN_OSC_24M 24000000UL
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#define BOARD_BOOTCLOCKRUN_OSC_32K 32768UL
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#define BOARD_BOOTCLOCKRUN_OSC_RC_16M 16000000UL
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#define BOARD_BOOTCLOCKRUN_OSC_RC_400M 400000000UL
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#define BOARD_BOOTCLOCKRUN_OSC_RC_48M 48000000UL
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#define BOARD_BOOTCLOCKRUN_OSC_RC_48M_DIV2 24000000UL
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#define BOARD_BOOTCLOCKRUN_PLL_AUDIO_CLK 0UL
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#define BOARD_BOOTCLOCKRUN_PLL_AUDIO_SS_MODULATION 0UL
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#define BOARD_BOOTCLOCKRUN_PLL_AUDIO_SS_RANGE 0UL
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#define BOARD_BOOTCLOCKRUN_PLL_VIDEO_CLK 984000025UL
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#define BOARD_BOOTCLOCKRUN_PLL_VIDEO_SS_MODULATION 0UL
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#define BOARD_BOOTCLOCKRUN_PLL_VIDEO_SS_RANGE 0UL
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#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 24000000UL
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#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 0UL
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#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 24000000UL
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#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 24000000UL
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#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL
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#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 24000000UL
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#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 24000000UL
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#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 24000000UL
|
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#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL
|
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#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 24000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI4_CLK_ROOT 24000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI4_MCLK1 24000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SAI4_MCLK2 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 198000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SPDIF_CLK_ROOT 24000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SPDIF_EXTCLK_OUT 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL1_CLK 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL1_DIV2_CLK 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL1_DIV5_CLK 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL1_SS_MODULATION 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL1_SS_RANGE 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL2_CLK 528000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL2_PFD0_CLK 352000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL2_PFD1_CLK 594000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL2_PFD2_CLK 396000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL2_PFD3_CLK 297000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL2_SS_MODULATION 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL2_SS_RANGE 0UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL3_CLK 480000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL3_DIV2_CLK 240000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL3_PFD0_CLK 664615384UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL3_PFD1_CLK 508235294UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL3_PFD2_CLK 270000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_SYS_PLL3_PFD3_CLK 392727272UL
|
||||
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 24000000UL
|
||||
#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 24000000UL
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* API for BOARD_BootClockRUN configuration
|
||||
******************************************************************************/
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*!
|
||||
* @brief This function executes configuration of clocks.
|
||||
*
|
||||
*/
|
||||
void BOARD_BootClockRUN(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
#endif /* _CLOCK_CONFIG_H_ */
|
||||
|
||||
@@ -0,0 +1,50 @@
|
||||
/*
|
||||
* Copyright 2020 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/**
|
||||
* @file dcd.h
|
||||
* @brief support imxrt1176-sbc dcd
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-08-19
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: dcd.h
|
||||
Description: support imxrt1176-sbc dcd
|
||||
Others: take SDK_2_11_1_MIMXRT1170-EVK for references
|
||||
History:
|
||||
1. Date: 2022-08-19
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
*************************************************/
|
||||
|
||||
#ifndef __DCD__
|
||||
#define __DCD__
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief XIP_BOARD driver version 2.0.1. */
|
||||
#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
|
||||
/*@}*/
|
||||
|
||||
/*************************************
|
||||
* DCD Data
|
||||
*************************************/
|
||||
#define DCD_TAG_HEADER (0xD2)
|
||||
#define DCD_VERSION (0x41)
|
||||
#define DCD_TAG_HEADER_SHIFT (24)
|
||||
#define DCD_ARRAY_SIZE 1
|
||||
|
||||
#endif /* __DCD__ */
|
||||
@@ -0,0 +1,95 @@
|
||||
/*
|
||||
* Copyright 2021 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file pin_mux.h
|
||||
* @brief support imxrt1176-sbc pinmux
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-08-19
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: pin_mux.h
|
||||
Description: support imxrt1176-sbc pinmux
|
||||
Others: take SDK_2_11_1_MIMXRT1170-EVK for references
|
||||
|
||||
History:
|
||||
1. Date: 2022-08-19
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
*************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef _PIN_MUX_H_
|
||||
#define _PIN_MUX_H_
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*! @brief Direction type */
|
||||
typedef enum _pin_mux_direction
|
||||
{
|
||||
kPIN_MUX_DirectionInput = 0U, /* Input direction */
|
||||
kPIN_MUX_DirectionOutput = 1U, /* Output direction */
|
||||
kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
|
||||
} pin_mux_direction_t;
|
||||
|
||||
/*!
|
||||
* @addtogroup pin_mux
|
||||
* @{
|
||||
*/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* API
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Calls initialization functions.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitBootPins(void);
|
||||
|
||||
|
||||
/*!
|
||||
* @brief Configures pin routing and optionally pin electrical features.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitPins(void);
|
||||
/*!
|
||||
* @brief Configures pin routing and optionally pin electrical features.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitEnetPins(void); /* Function assigned for the Cortex-M7F */
|
||||
|
||||
/*!
|
||||
* @brief Configures pin routing and optionally pin electrical features.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitEnet1GPins(void); /* Function assigned for the Cortex-M7F */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @}
|
||||
*/
|
||||
#endif /* _PIN_MUX_H_ */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* EOF
|
||||
**********************************************************************************************************************/
|
||||
Reference in New Issue
Block a user