Fix multithread awaking.

2024-06-23 08:59:51 +08:00
parent c2e21257d0
commit 99899900a1
42 changed files with 56 additions and 37 deletions
@@ -0,0 +1,91 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#include "hal_base.h"
+#include "soc.h"
+
+/* The frequency of SYSTEM_CLOCK is determined by the previous firmware. */
+#define  SYSTEM_CLOCK  816000000U
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+    SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System Initialization
+ *----------------------------------------------------------------------------*/
+// void SystemInit (void)
+// {
+// #if defined(HAL_AP_CORE) && defined(HAL_DCACHE_MODULE_ENABLED)
+// /* do not use global variables because this function is called before
+//    reaching pre-main. RW section may be overwritten afterwards.          */
+
+//     // Invalidate entire Unified TLB
+//     __set_TLBIALL(0);
+
+//     // Invalidate entire branch predictor array
+//     __set_BPIALL(0);
+//     __DSB();
+//     __ISB();
+
+//     //  Invalidate instruction cache and flush branch target cache
+//     __set_ICIALLU(0);
+//     __DSB();
+//     __ISB();
+
+//     //  Invalidate data cache
+//     L1C_InvalidateDCacheAll();
+// #endif
+
+// #if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
+//     // Enable FPU
+//     __FPU_Enable();
+// #endif
+
+// #if defined(HAL_AP_CORE) && defined(HAL_DCACHE_MODULE_ENABLED)
+//     // Create Translation Table
+//     MMU_CreateTranslationTable();
+
+//     // Enable MMU
+//     MMU_Enable();
+
+//     // Enable Caches
+//     L1C_EnableCaches();
+//     L1C_EnableBTAC();
+// #endif
+
+// #if defined(HAL_MCU_CORE) && defined(HAL_INTMUX_MODULE_ENABLED)
+//     HAL_INTMUX_Init();
+// #endif
+// }
+
+// void DataInit (void)
+// {
+// #ifdef HAL_AP_CORE
+
+//     typedef struct {
+//         unsigned long* dest;
+//         unsigned long  wlen;
+//     } __zero_table_t;
+
+//     extern const __zero_table_t __zero_table_start__;
+//     extern const __zero_table_t __zero_table_end__;
+
+//     for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
+//         for (unsigned long i = 0u; i < pTable->wlen; ++i) {
+//             pTable->dest[i] = 0u;
+//         }
+//     }
+// #endif /* HAL_AP_CORE */
+// }