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Modify uart

This commit is contained in:
songyanguang 2024-11-22 14:10:46 +08:00
parent 1eedb9d24e
commit 8795b4138e
4 changed files with 25 additions and 38 deletions
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5
Ubiquitous/XiZi_AIoT/hardkernel/arch/riscv/rv64gc/preboot_for_jh7110/boot.S
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@ -28,6 +28,10 @@ _boot_start:
csrw CSR_IE, zero csrw CSR_IE, zero
csrw CSR_IP, zero csrw CSR_IP, zero
j primary_cpu_init
/*
switch_mode:
csrr t0, sstatus csrr t0, sstatus
srli t0, t0, 8 srli t0, t0, 8
andi t0, t0, 1 andi t0, t0, 1
@ -43,6 +47,7 @@ _boot_start:
continue_execution: continue_execution:
j primary_cpu_init j primary_cpu_init
*/
primary_cpu_init: primary_cpu_init:
la t0, boot_start_addr la t0, boot_start_addr

22
Ubiquitous/XiZi_AIoT/hardkernel/mmu/riscv/rv64gc/bootmmu.c
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@ -59,12 +59,7 @@ extern uint64_t kernel_data_begin[];
#define IDX_MASK (0b111111111) #define IDX_MASK (0b111111111)
#define L3_PDE_INDEX(idx) ((idx << LEVEL3_PDE_SHIFT) & L3_IDX_MASK) #define L3_PDE_INDEX(idx) ((idx << LEVEL3_PDE_SHIFT) & L3_IDX_MASK)
#define _PAGE_KERNEL (_PAGE_READ \ #define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC | _PAGE_ACCESSED | _PAGE_GLOBAL | _PAGE_DIRTY)
| _PAGE_WRITE \
| _PAGE_PRESENT \
| _PAGE_ACCESSED \
| _PAGE_DIRTY \
| _PAGE_GLOBAL)
#define PAGE_KERNEL (_PAGE_KERNEL) #define PAGE_KERNEL (_PAGE_KERNEL)
#define PAGE_KERNEL_READ (_PAGE_KERNEL & ~_PAGE_WRITE) #define PAGE_KERNEL_READ (_PAGE_KERNEL & ~_PAGE_WRITE)
#define PAGE_KERNEL_EXEC (_PAGE_KERNEL | _PAGE_EXEC) #define PAGE_KERNEL_EXEC (_PAGE_KERNEL | _PAGE_EXEC)
@ -125,15 +120,11 @@ static inline void local_flush_tlb_all(void)
static void load_boot_pgdir() static void load_boot_pgdir()
{ {
unsigned long satp_val = (unsigned long)(((uintptr_t)boot_l2pgdir >> PAGE_SHIFT) | SATP_MODE); unsigned long satp_val = 0;
unsigned long status;
status = csr_read(CSR_STATUS); satp_val = (unsigned long)(((uintptr_t)boot_l2pgdir >> PAGE_SHIFT) | SATP_MODE);
if( !(status & 0x100) ) { #if 1 //to debug
_debug_uart_printascii("current is not S mode\n"); csr_write(CSR_SATP, satp_val);
}
#if 0 //to debug
csr_write(CSR_SATP, ((uintptr_t)boot_l2pgdir >> PAGE_SHIFT) | SATP_MODE);
#endif #endif
} }
@ -141,12 +132,11 @@ extern void main(void);
static bool _bss_inited = false; static bool _bss_inited = false;
void bootmain() void bootmain()
{ {
_debug_uart_init(); _debug_uart_phymem_init();
_debug_uart_printascii("bootmain start.\n"); _debug_uart_printascii("bootmain start.\n");
build_boot_pgdir(); build_boot_pgdir();
load_boot_pgdir(); load_boot_pgdir();
// _debug_uart_base_map();
_debug_uart_printascii("boot pgdir success\n"); _debug_uart_printascii("boot pgdir success\n");
__asm__ __volatile__("addi sp, sp, %0" ::"i"(KERN_OFFSET)); __asm__ __volatile__("addi sp, sp, %0" ::"i"(KERN_OFFSET));

2
Ubiquitous/XiZi_AIoT/hardkernel/uart/riscv/rv64gc/uart_io_for_jh7110/include/ns16550.h
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@ -214,6 +214,6 @@ void _debug_uart_init(void);
void _debug_uart_putc(int ch); void _debug_uart_putc(int ch);
int _debug_uart_getc(void); int _debug_uart_getc(void);
void _debug_uart_printascii(const char *str); void _debug_uart_printascii(const char *str);
void _debug_uart_base_map(void); void _debug_uart_phymem_init(void);
#endif /* __ns16550_h */ #endif /* __ns16550_h */

26
Ubiquitous/XiZi_AIoT/hardkernel/uart/riscv/rv64gc/uart_io_for_jh7110/ns16550.c
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@ -9,6 +9,7 @@
struct ns16550 g_ns16550_com_port = {0}; struct ns16550 g_ns16550_com_port = {0};
struct ns16550_plat g_ns16550_plat = {0}; struct ns16550_plat g_ns16550_plat = {0};
unsigned long g_ns16550_uart_base = {0};
#define CONFIG_SYS_NS16550_UART_BASE 0x10000000 #define CONFIG_SYS_NS16550_UART_BASE 0x10000000
#define CONFIG_BAUDRATE 115200 #define CONFIG_BAUDRATE 115200
@ -134,22 +135,12 @@ int ns16550_tstc(struct ns16550 *com_port)
return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0; return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
} }
static int ns16550_serial_assign_base(struct ns16550_plat *plat, unsigned long base)
{
plat->base = base;
return 0;
}
static void ns16550_plat_init(void) static void ns16550_plat_init(void)
{ {
struct ns16550_plat *plat = &g_ns16550_plat; struct ns16550_plat *plat = &g_ns16550_plat;
unsigned long addr;
addr = CONFIG_SYS_NS16550_UART_BASE;
ns16550_serial_assign_base(plat, addr);
/* refer jh7110 u-boot/arch/riscv/dts/jh7110.dtsi */ /* refer jh7110 u-boot/arch/riscv/dts/jh7110.dtsi */
plat->base = g_ns16550_uart_base;
plat->reg_offset = 0; plat->reg_offset = 0;
plat->reg_shift = 2; plat->reg_shift = 2;
plat->reg_width = 4; plat->reg_width = 4;
@ -181,19 +172,20 @@ void _debug_uart_init(void)
{ {
int baudrate = CONFIG_BAUDRATE; int baudrate = CONFIG_BAUDRATE;
g_ns16550_uart_base = CONFIG_SYS_NS16550_UART_BASE_MAP;
ns16550_serial_init(); ns16550_serial_init();
ns16550_serial_setbrg(baudrate); ns16550_serial_setbrg(baudrate);
_debug_uart_printascii("_debug_uart_init success.\n"); _debug_uart_printascii("_debug_uart_init success.\n");
} }
void _debug_uart_base_map(void) void _debug_uart_phymem_init(void)
{ {
struct ns16550_plat *plat = &g_ns16550_plat; int baudrate = CONFIG_BAUDRATE;
unsigned long addr;
addr = CONFIG_SYS_NS16550_UART_BASE_MAP; g_ns16550_uart_base = CONFIG_SYS_NS16550_UART_BASE;
ns16550_serial_assign_base(plat, addr); ns16550_serial_init();
_debug_uart_printascii("_debug_uart_init_mapped success.\n"); ns16550_serial_setbrg(baudrate);
_debug_uart_printascii("_debug_uart_phymem_init success.\n");
} }
void _debug_uart_putc(int ch) void _debug_uart_putc(int ch)