stm32h750 started successfully
This commit is contained in:
zhangjin1996
@@ -38,9 +38,10 @@ void InitBoardHardware()
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sys_stm32_clock_init(192, 5, 2, 4);
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//delay_init(480);
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InitBoardMemory((void*)HEAP_START, (void*)HEAP_END);
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InitHwUart();
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InitBoardMemory((void*)HEAP_START, (void*)HEAP_END);
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InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
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@@ -21,13 +21,13 @@
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#ifndef __BOARD_H__
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#define __BOARD_H__
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extern int __StackTop;
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void InitBoardHardware();
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#define HEAP_START 0x24030000
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#define HEAP_END 0x24060000
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#define HEAP_START (void *)(&__StackTop)
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#define HEAP_END 0x24080000
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@@ -1,287 +0,0 @@
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#
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# Automatically generated file; DO NOT EDIT.
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# XiZi_IIoT Project Configuration
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#
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CONFIG_BOARD_STM32H750=y
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CONFIG_ARCH_ARM=y
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#
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# stm32f103-nano feature
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#
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CONFIG_BSP_USING_UART=y
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# CONFIG_BSP_USING_UART1 is not set
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CONFIG_BSP_USING_UART1=y
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CONFIG_SERIAL_BUS_NAME_1="uart1"
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CONFIG_SERIAL_DRV_NAME_1="uart1_drv"
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CONFIG_SERIAL_1_DEVICE_NAME_0="uart1_dev1"
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#
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# config default board resources
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#
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#
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# config board app name
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#
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CONFIG_BOARD_APP_NAME="/XiUOS_stm32h750_app.bin"
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#
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# config board service table
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#
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CONFIG_SERVICE_TABLE_ADDRESS=0x24000000
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#
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# Hardware feature
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#
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CONFIG_RESOURCES_SERIAL=y
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# CONFIG_SERIAL_USING_DMA is not set
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CONFIG_SERIAL_RB_BUFSZ=128
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CONFIG_RESOURCES_CAN=y
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#
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# Kernel feature
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#
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#
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# separate compile(choose none for compile once)
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#
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# CONFIG_SEPARATE_COMPILE is not set
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# CONFIG_COMPILER_APP is not set
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# CONFIG_APP_STARTUP_FROM_SDCARD is not set
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CONFIG_APP_STARTUP_FROM_FLASH=y
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# CONFIG_COMPILER_KERNEL is not set
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#
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# Memory Management
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#
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# CONFIG_KERNEL_MEMBLOCK is not set
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CONFIG_MEM_ALIGN_SIZE=8
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# CONFIG_MEM_EXTERN_SRAM is not set
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CONFIG_MM_PAGE_SIZE=4096
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#
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# Using small memory allocator
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#
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CONFIG_KERNEL_SMALL_MEM_ALLOC=y
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CONFIG_SMALL_NUMBER_32B=64
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CONFIG_SMALL_NUMBER_64B=32
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#
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# Task feature
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#
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CONFIG_USER_APPLICATION=y
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# CONFIG_TASK_ISOLATION is not set
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#
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# Inter-Task communication
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#
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CONFIG_KERNEL_SEMAPHORE=y
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CONFIG_KERNEL_MUTEX=y
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CONFIG_KERNEL_EVENT=y
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CONFIG_KERNEL_MESSAGEQUEUE=y
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CONFIG_KERNEL_SOFTTIMER=y
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CONFIG_SCHED_POLICY_RR_REMAINSLICE=y
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# CONFIG_SCHED_POLICY_RR is not set
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# CONFIG_SCHED_POLICY_FIFO is not set
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# CONFIG_KTASK_PRIORITY_8 is not set
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CONFIG_KTASK_PRIORITY_32=y
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# CONFIG_KTASK_PRIORITY_256 is not set
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CONFIG_KTASK_PRIORITY_MAX=32
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CONFIG_TICK_PER_SECOND=1000
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CONFIG_KERNEL_STACK_OVERFLOW_CHECK=y
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CONFIG_IDLE_KTASK_STACKSIZE=256
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CONFIG_ZOMBIE_KTASK_STACKSIZE=512
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#
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# Kernel Console
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#
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CONFIG_KERNEL_CONSOLE=y
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CONFIG_KERNEL_BANNER=y
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CONFIG_KERNEL_CONSOLEBUF_SIZE=128
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#
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# Kernel Hook
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#
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# CONFIG_KERNEL_HOOK is not set
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#
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# Command shell
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#
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CONFIG_TOOL_SHELL=y
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CONFIG_SHELL_ENTER_CR=y
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CONFIG_SHELL_ENTER_LF=y
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CONFIG_SHELL_ENTER_CR_AND_LF=y
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# CONFIG_SHELL_ENTER_CRLF is not set
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#
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# Set shell user control
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#
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CONFIG_SHELL_DEFAULT_USER="letter"
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CONFIG_SHELL_DEFAULT_USER_PASSWORD=""
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CONFIG_SHELL_LOCK_TIMEOUT=10000
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#
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# Set shell config param
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#
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CONFIG_SHELL_TASK_STACK_SIZE=512
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CONFIG_SHELL_TASK_PRIORITY=20
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CONFIG_SHELL_MAX_NUMBER=5
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CONFIG_SHELL_PARAMETER_MAX_NUMBER=8
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CONFIG_SHELL_HISTORY_MAX_NUMBER=5
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CONFIG_SHELL_PRINT_BUFFER=128
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CONFIG_SHELL_HELP_SHOW_PERMISSION=y
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# CONFIG_SHELL_HELP_LIST_USER is not set
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# CONFIG_SHELL_HELP_LIST_VAR is not set
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# CONFIG_SHELL_HELP_LIST_KEY is not set
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#
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# Kernel data structure Manage
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#
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CONFIG_KERNEL_QUEUEMANAGE=y
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CONFIG_KERNEL_WORKQUEUE=y
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CONFIG_WORKQUEUE_KTASK_STACKSIZE=2048
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CONFIG_WORKQUEUE_KTASK_PRIORITY=23
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CONFIG_QUEUE_MAX=16
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CONFIG_KERNEL_WAITQUEUE=y
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CONFIG_KERNEL_DATAQUEUE=y
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# CONFIG_KERNEL_CIRCULAR_AREA is not set
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# CONFIG_KERNEL_AVL_TREE is not set
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#
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# Kernel components init
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#
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CONFIG_KERNEL_COMPONENTS_INIT=y
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CONFIG_ENV_INIT_KTASK_STACK_SIZE=512
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CONFIG_KERNEL_USER_MAIN=y
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CONFIG_NAME_NUM_MAX=32
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# CONFIG_KERNEL_DEBUG is not set
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# CONFIG_ARCH_SMP is not set
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#
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# hash table config
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#
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CONFIG_ID_HTABLE_SIZE=16
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CONFIG_ID_NUM_MAX=128
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# CONFIG_KERNEL_TEST is not set
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#
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# Kernel Lib
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#
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CONFIG_LIB=y
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CONFIG_LIB_POSIX=y
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CONFIG_LIB_NEWLIB=y
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# CONFIG_LIB_MUSLLIB is not set
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# CONFIG_LIB_OTHER is not set
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#
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# C++ features
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#
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# CONFIG_LIB_CPLUSPLUS is not set
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#
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# File system
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#
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# CONFIG_FS_VFS is not set
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#
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# Tool feature
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#
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#
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# OTA function
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#
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# CONFIG_TOOL_USING_OTA is not set
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#
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# APP_Framework
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#
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#
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# Framework
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#
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CONFIG_TRANSFORM_LAYER_ATTRIUBUTE=y
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CONFIG_ADD_XIZI_FEATURES=y
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# CONFIG_ADD_NUTTX_FEATURES is not set
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# CONFIG_ADD_RTTHREAD_FEATURES is not set
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# CONFIG_SUPPORT_SENSOR_FRAMEWORK is not set
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# CONFIG_SUPPORT_CONNECTION_FRAMEWORK is not set
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# CONFIG_SUPPORT_KNOWING_FRAMEWORK is not set
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# CONFIG_SUPPORT_CONTROL_FRAMEWORK is not set
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#
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# Security
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#
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# CONFIG_CRYPTO is not set
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# CONFIG_MBEDTLS is not set
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#
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# Applications
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#
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#
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# config stack size and priority of main task
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#
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CONFIG_MAIN_KTASK_STACK_SIZE=256
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CONFIG_MAIN_KTASK_PRIORITY=16
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#
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# ota app
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#
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# CONFIG_APPLICATION_OTA is not set
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#
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# test app
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#
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# CONFIG_USER_TEST is not set
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#
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# connection app
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#
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# CONFIG_APPLICATION_CONNECTION is not set
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#
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# control app
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#
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#
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# knowing app
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#
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# CONFIG_APPLICATION_KNOWING is not set
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#
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# sensor app
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#
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# CONFIG_APPLICATION_SENSOR is not set
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# CONFIG_USING_EMBEDDED_DATABASE_APP is not set
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# CONFIG_APP_USING_WEBNET is not set
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#
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# app lib
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#
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CONFIG_APP_SELECT_NEWLIB=y
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# CONFIG_APP_SELECT_OTHER_LIB is not set
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#
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# lib using cJSON
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#
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# CONFIG_LIB_USING_CJSON is not set
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#
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# lib using queue
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#
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# CONFIG_LIB_USING_QUEUE is not set
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#
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# lib using LVGL
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#
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# CONFIG_LIB_LV is not set
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#
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# lib using embedded_database
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#
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# CONFIG_USING_EMBEDDED_DATABASE is not set
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#
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# lib using LoRaWan
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#
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# CONFIG_LIB_USING_LORAWAN is not set
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@@ -11,7 +11,7 @@ MEMORY
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OUTPUT_ARCH(arm)
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ENTRY(Reset_Handler)
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_system_stack_size = 0x10000;
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_system_stack_size = 0x1000;
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SECTIONS
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{
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@@ -49,19 +49,18 @@ SECTIONS
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} > flash = 0
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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__exidx_start = .;
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__exidx_start = .;
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.ARM.exidx :
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{
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PROVIDE(__exidx_start = ABSOLUTE(.));
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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/* This is used by the startup in order to initialize the .data secion */
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_sidata = .;
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PROVIDE(__exidx_end = ABSOLUTE(.));
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} > flash
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__exidx_end = .;
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/* .data section which is used for initialized data */
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.data : AT (_sidata)
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.data : AT (__exidx_end )
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{
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .data secion */
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@@ -1,7 +1,7 @@
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SRC_DIR := libraries
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ifeq ($(CONFIG_BSP_USING_UART),y)
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SRC_DIR += usart sys
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SRC_DIR += usart sys delay
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endif
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include $(KERNEL_ROOT)/compiler.mk
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@@ -1,157 +1,82 @@
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/**
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****************************************************************************************************
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* @file delay.c
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* @author ����ԭ���Ŷ�(ALIENTEK)
|
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* @version V1.1
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* @date 2023-02-27
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* @brief ʹ��SysTick����ͨ����ģʽ���ӳٽ��й���(֧��OS)
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* �ṩdelay_init��ʼ�������� delay_us��delay_ms����ʱ����
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* @license Copyright (c) 2022-2032, �������������ӿƼ�����˾
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****************************************************************************************************
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* @attention
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*
|
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* ʵ��ƽ̨:����ԭ�� STM32������
|
||||
* ������Ƶ:www.yuanzige.com
|
||||
* ������̳:www.openedv.com
|
||||
* ��˾��ַ:www.alientek.com
|
||||
* �����ַ:openedv.taobao.com
|
||||
*
|
||||
* ��˵��
|
||||
* V1.0 20221222
|
||||
* ��һ�η���
|
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* V1.1 20230227
|
||||
* ��SYS_SUPPORT_OS���ִ���, Ĭ�Ͻ�֧��UCOSII 2.93.01�汾, ����OS��ο�ʵ��
|
||||
* ��delay_init����ʹ��8��Ƶ,ȫ��ͳһʹ��MCUʱ��
|
||||
* ��delay_usʹ��ʱ��ժȡ����ʱ, ����OS
|
||||
* ��delay_msֱ��ʹ��delay_us��ʱʵ��.
|
||||
*
|
||||
****************************************************************************************************
|
||||
*/
|
||||
|
||||
#include "sys.h"
|
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#include "delay.h"
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|
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|
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static uint32_t g_fac_us = 0; /* us��ʱ������ */
|
||||
static uint32_t g_fac_us = 0;
|
||||
|
||||
/* ���SYS_SUPPORT_OS������,˵��Ҫ֧��OS��(������UCOS) */
|
||||
#if SYS_SUPPORT_OS
|
||||
|
||||
/* ���ӹ���ͷ�ļ� ( ucos��Ҫ�õ�) */
|
||||
#include "os.h"
|
||||
|
||||
/* ����g_fac_ms����, ��ʾms��ʱ�ı�����, ����ÿ�����ĵ�ms��, (����ʹ��os��ʱ��,��Ҫ�õ�) */
|
||||
static uint16_t g_fac_ms = 0;
|
||||
|
||||
/*
|
||||
* ��delay_us/delay_ms��Ҫ֧��OS��ʱ����Ҫ������OS��صĺ궨��ͺ�����֧��
|
||||
* ������3���궨��:
|
||||
* delay_osrunning :���ڱ�ʾOS��ǰ�Ƿ���������,�Ծ����Ƿ����ʹ����غ���
|
||||
* delay_ostickspersec:���ڱ�ʾOS�趨��ʱ�ӽ���,delay_init�����������������ʼ��systick
|
||||
* delay_osintnesting :���ڱ�ʾOS�ж�Ƕ����,��Ϊ�ж����治���Ե���,delay_msʹ�øò����������������
|
||||
* Ȼ����3������:
|
||||
* delay_osschedlock :��������OS�������,��ֹ����
|
||||
* delay_osschedunlock:���ڽ���OS�������,���¿�������
|
||||
* delay_ostimedly :����OS��ʱ,���������������.
|
||||
*
|
||||
* �����̽���UCOSII��֧��,����OS,�����вο�����ֲ
|
||||
*/
|
||||
|
||||
/* ֧��UCOSII */
|
||||
#define delay_osrunning OSRunning /* OS�Ƿ����б��,0,������;1,������ */
|
||||
#define delay_ostickspersec OS_TICKS_PER_SEC /* OSʱ�ӽ���,��ÿ����ȴ��� */
|
||||
#define delay_osintnesting OSIntNesting /* �ж�Ƕ����,���ж�Ƕ�״��� */
|
||||
#define delay_osrunning OSRunning
|
||||
#define delay_ostickspersec OS_TICKS_PER_SEC
|
||||
#define delay_osintnesting OSIntNesting
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief us����ʱʱ,�ر��������(��ֹ���us���ӳ�)
|
||||
* @param ��
|
||||
* @retval ��
|
||||
*/
|
||||
void delay_osschedlock(void)
|
||||
{
|
||||
OSSchedLock(); /* UCOSII�ķ�ʽ,��ֹ���ȣ���ֹ���us��ʱ */
|
||||
}
|
||||
OSSchedLock();
|
||||
|
||||
|
||||
/**
|
||||
* @brief us����ʱʱ,�ָ��������
|
||||
* @param ��
|
||||
* @retval ��
|
||||
*/
|
||||
void delay_osschedunlock(void)
|
||||
{
|
||||
OSSchedUnlock(); /* UCOSII�ķ�ʽ,�ָ����� */
|
||||
OSSchedUnlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief us����ʱʱ,�ָ��������
|
||||
* @param ticks: ��ʱ�Ľ�����
|
||||
* @retval ��
|
||||
*/
|
||||
|
||||
void delay_ostimedly(uint32_t ticks)
|
||||
{
|
||||
OSTimeDly(ticks); /* UCOSII��ʱ */
|
||||
OSTimeDly(ticks);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief systick�жϷ�����,ʹ��OSʱ�õ�
|
||||
* @param ticks : ��ʱ�Ľ�����
|
||||
* @retval ��
|
||||
*/
|
||||
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* OS ��ʼ����,��ִ�������ĵ��ȴ��� */
|
||||
|
||||
if (delay_osrunning == OS_TRUE)
|
||||
{
|
||||
/* ���� uC/OS-II �� SysTick �жϷ����� */
|
||||
|
||||
OS_CPU_SysTickHandler();
|
||||
}
|
||||
HAL_IncTick();
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief ��ʼ���ӳٺ���
|
||||
* @param sysclk: ϵͳʱ��Ƶ��, ��CPUƵ��(rcc_c_ck), 480MHz
|
||||
* @retval ��
|
||||
*/
|
||||
|
||||
void delay_init(uint16_t sysclk)
|
||||
{
|
||||
#if SYS_SUPPORT_OS /* �����Ҫ֧��OS */
|
||||
#if SYS_SUPPORT_OS
|
||||
uint32_t reload;
|
||||
#endif
|
||||
g_fac_us = sysclk; /* ������HAL_Init���Ѷ�systick�������ã��������������������� */
|
||||
#if SYS_SUPPORT_OS /* �����Ҫ֧��OS. */
|
||||
reload = sysclk; /* ÿ���ӵļ������� ��λΪM */
|
||||
reload *= 1000000 / delay_ostickspersec; /* ����delay_ostickspersec�趨���ʱ��,reloadΪ24λ
|
||||
* �Ĵ���,���ֵ:16777216,��480M��,Լ��0.03495s����
|
||||
*/
|
||||
g_fac_ms = 1000 / delay_ostickspersec; /* ����OS������ʱ�����ٵ�λ */
|
||||
SysTick->CTRL |= 1 << 1; /* ����SYSTICK�ж� */
|
||||
SysTick->LOAD = reload; /* ÿ1/delay_ostickspersec���ж�һ�� */
|
||||
SysTick->CTRL |= 1 << 0; /* ����SYSTICK */
|
||||
g_fac_us = sysclk;
|
||||
#if SYS_SUPPORT_OS
|
||||
reload = sysclk;
|
||||
reload *= 1000000 / delay_ostickspersec;
|
||||
|
||||
g_fac_ms = 1000 / delay_ostickspersec;
|
||||
SysTick->CTRL |= 1 << 1;
|
||||
SysTick->LOAD = reload;
|
||||
SysTick->CTRL |= 1 << 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ��ʱnus
|
||||
* @note �����Ƿ�ʹ��OS, ������ʱ��ժȡ������us��ʱ
|
||||
* @param nus: Ҫ��ʱ��us��
|
||||
* @note nusȡֵ��Χ: 0 ~ (2^32 / fac_us) (fac_usһ�����ϵͳ��Ƶ, �����������)
|
||||
* @retval ��
|
||||
*/
|
||||
|
||||
void delay_us(uint32_t nus)
|
||||
{
|
||||
uint32_t ticks;
|
||||
uint32_t told, tnow, tcnt = 0;
|
||||
uint32_t reload = SysTick->LOAD; /* LOAD��ֵ */
|
||||
ticks = nus * g_fac_us; /* ��Ҫ�Ľ����� */
|
||||
uint32_t reload = SysTick->LOAD;
|
||||
ticks = nus * g_fac_us;
|
||||
|
||||
#if SYS_SUPPORT_OS /* �����Ҫ֧��OS */
|
||||
delay_osschedlock(); /* ���� OS ����������� */
|
||||
#if SYS_SUPPORT_OS
|
||||
delay_osschedlock();
|
||||
#endif
|
||||
|
||||
told = SysTick->VAL; /* �ս���ʱ�ļ�����ֵ */
|
||||
told = SysTick->VAL;
|
||||
while (1)
|
||||
{
|
||||
tnow = SysTick->VAL;
|
||||
@@ -159,7 +84,7 @@ void delay_us(uint32_t nus)
|
||||
{
|
||||
if (tnow < told)
|
||||
{
|
||||
tcnt += told - tnow; /* ����ע��һ��SYSTICK��һ���ݼ��ļ������Ϳ����� */
|
||||
tcnt += told - tnow;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -168,46 +93,37 @@ void delay_us(uint32_t nus)
|
||||
told = tnow;
|
||||
if (tcnt >= ticks)
|
||||
{
|
||||
break; /* ʱ�䳬��/����Ҫ�ӳٵ�ʱ��,���˳� */
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#if SYS_SUPPORT_OS /* �����Ҫ֧��OS */
|
||||
delay_osschedunlock(); /* �ָ� OS ����������� */
|
||||
#if SYS_SUPPORT_OS
|
||||
delay_osschedunlock();
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ��ʱnms
|
||||
* @param nms: Ҫ��ʱ��ms�� (0< nms <= (2^32 / fac_us / 1000))(fac_usһ�����ϵͳ��Ƶ, �����������)
|
||||
* @retval ��
|
||||
*/
|
||||
|
||||
void delay_ms(uint16_t nms)
|
||||
{
|
||||
|
||||
#if SYS_SUPPORT_OS /* �����Ҫ֧��OS, ������������os��ʱ���ͷ�CPU */
|
||||
if (delay_osrunning && delay_osintnesting == 0) /* ���OS�Ѿ�������,���Ҳ������ж�����(�ж����治���������) */
|
||||
#if SYS_SUPPORT_OS
|
||||
if (delay_osrunning && delay_osintnesting == 0)
|
||||
{
|
||||
if (nms >= g_fac_ms) /* ��ʱ��ʱ�����OS������ʱ������ */
|
||||
if (nms >= g_fac_ms)
|
||||
{
|
||||
delay_ostimedly(nms / g_fac_ms); /* OS��ʱ */
|
||||
delay_ostimedly(nms / g_fac_ms);
|
||||
}
|
||||
|
||||
nms %= g_fac_ms; /* OS�Ѿ����ṩ��ôС����ʱ��,������ͨ��ʽ��ʱ */
|
||||
nms %= g_fac_ms;
|
||||
}
|
||||
#endif
|
||||
|
||||
delay_us((uint32_t)(nms * 1000)); /* ��ͨ��ʽ��ʱ */
|
||||
delay_us((uint32_t)(nms * 1000));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief HAL���ڲ������õ�����ʱ
|
||||
* @note HAL�����ʱĬ����Systick���������û�п�Systick���жϻᵼ�µ��������ʱ�����˳�
|
||||
* @param Delay : Ҫ��ʱ�ĺ�����
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void HAL_Delay(uint32_t Delay)
|
||||
{
|
||||
delay_ms(Delay);
|
||||
|
||||
@@ -34,9 +34,9 @@
|
||||
#include "sys.h"
|
||||
|
||||
|
||||
void delay_init(uint16_t sysclk); /* ��ʼ���ӳٺ��� */
|
||||
void delay_ms(uint16_t nms); /* ��ʱnms */
|
||||
void delay_us(uint32_t nus); /* ��ʱnus */
|
||||
void delay_init(uint16_t sysclk);
|
||||
void delay_ms(uint16_t nms);
|
||||
void delay_us(uint32_t nus);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -1,22 +1,3 @@
|
||||
/**
|
||||
****************************************************************************************************
|
||||
* @file sys.h
|
||||
* @author ����ԭ���Ŷ�(ALIENTEK)
|
||||
* @version V1.0
|
||||
* @date 2023-06-12
|
||||
* @brief ϵͳ��ʼ������
|
||||
* @license Copyright (c) 2020-2032, �������������ӿƼ�����˾
|
||||
****************************************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* ʵ��ƽ̨:����ԭ�� ������ H750������
|
||||
* ������Ƶ:www.yuanzige.com
|
||||
* ������̳:www.openedv.com
|
||||
* ��˾��ַ:www.alientek.com
|
||||
* �����ַ:openedv.taobao.com
|
||||
*
|
||||
****************************************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __SYS_H
|
||||
#define __SYS_H
|
||||
@@ -24,19 +5,15 @@
|
||||
#include "stm32h7xx_hal.h"
|
||||
#include "stm32h7xx_hal_rcc_ex.h"
|
||||
|
||||
/**
|
||||
* SYS_SUPPORT_OS���ڶ���ϵͳ�ļ����Ƿ�֧��OS
|
||||
* 0,��֧��OS
|
||||
* 1,֧��OS
|
||||
*/
|
||||
|
||||
#define SYS_SUPPORT_OS 0
|
||||
|
||||
/* �������ø�����ʱ�� */
|
||||
|
||||
extern RCC_PeriphCLKInitTypeDef rcc_periph_clk_init_struct;
|
||||
|
||||
/* �������� */
|
||||
void sys_cache_enable(void); /* ʹ��STM32H7��L1-Cache */
|
||||
uint8_t sys_stm32_clock_init(uint32_t plln, uint32_t pllm, uint32_t pllp, uint32_t pllq); /* ����ʱ�� */
|
||||
void sys_qspi_enable_memmapmode(void); /* ʹ��QSPI�ڴ�ӳ��ģʽ */
|
||||
|
||||
void sys_cache_enable(void);
|
||||
uint8_t sys_stm32_clock_init(uint32_t plln, uint32_t pllm, uint32_t pllp, uint32_t pllq);
|
||||
void sys_qspi_enable_memmapmode(void);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,28 +1,4 @@
|
||||
/**
|
||||
****************************************************************************************************
|
||||
* @file usart.h
|
||||
* @author ����ԭ���Ŷ�(ALIENTEK)
|
||||
* @version V1.1
|
||||
* @date 2023-06-05
|
||||
* @brief ���ڳ�ʼ������(һ���Ǵ���1)��֧��printf
|
||||
* @license Copyright (c) 2020-2032, �������������ӿƼ�����˾
|
||||
****************************************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* ʵ��ƽ̨:����ԭ�� STM32H750������
|
||||
* ������Ƶ:www.yuanzige.com
|
||||
* ������̳:www.openedv.com
|
||||
* ��˾��ַ:www.alientek.com
|
||||
* �����ַ:openedv.taobao.com
|
||||
*
|
||||
* ��˵��
|
||||
* V1.0 20200312
|
||||
* ��һ�η���
|
||||
* V1.1 20230605
|
||||
* ɾ��USART_UX_IRQHandler()�����ij�ʱ��������HAL_UART_RxCpltCallback()
|
||||
*
|
||||
****************************************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _USART_H
|
||||
#define _USART_H
|
||||
@@ -31,41 +7,36 @@
|
||||
#include "sys.h"
|
||||
#include "stm32h7xx_hal_rcc.h"
|
||||
|
||||
/*******************************************************************************************************/
|
||||
/* ���� �� ���� ����
|
||||
* Ĭ�������USART1��.
|
||||
* ע��: ͨ������12���궨��,����֧��USART1~UART7����һ������.
|
||||
*/
|
||||
|
||||
#define USART_TX_GPIO_PORT GPIOA
|
||||
#define USART_TX_GPIO_PIN GPIO_PIN_9
|
||||
#define USART_TX_GPIO_AF GPIO_AF7_USART1
|
||||
#define USART_TX_GPIO_CLK_ENABLE() do{ __HAL_RCC_GPIOA_CLK_ENABLE(); }while(0) /* ��������ʱ��ʹ�� */
|
||||
#define USART_TX_GPIO_CLK_ENABLE() do{ __HAL_RCC_GPIOA_CLK_ENABLE(); }while(0)
|
||||
|
||||
#define USART_RX_GPIO_PORT GPIOA
|
||||
#define USART_RX_GPIO_PIN GPIO_PIN_10
|
||||
#define USART_RX_GPIO_AF GPIO_AF7_USART1
|
||||
#define USART_RX_GPIO_CLK_ENABLE() do{ __HAL_RCC_GPIOA_CLK_ENABLE(); }while(0) /* ��������ʱ��ʹ�� */
|
||||
#define USART_RX_GPIO_CLK_ENABLE() do{ __HAL_RCC_GPIOA_CLK_ENABLE(); }while(0)
|
||||
|
||||
#define USART_UX USART1
|
||||
#define USART_UX_IRQn USART1_IRQn
|
||||
#define USART_UX_IRQHandler USART1_IRQHandler
|
||||
#define USART_UX_CLK_ENABLE() do{ __HAL_RCC_USART1_CLK_ENABLE(); }while(0) /* USART1 ʱ��ʹ�� */
|
||||
|
||||
/*******************************************************************************************************/
|
||||
|
||||
#define USART_REC_LEN 200 /* �����������ֽ��� 200 */
|
||||
#define USART_EN_RX 1 /* ʹ�ܣ�1��/��ֹ��0������1���� */
|
||||
#define RXBUFFERSIZE 1 /* �����С */
|
||||
|
||||
extern UART_HandleTypeDef g_uart1_handle; /* UART��� */
|
||||
|
||||
extern uint8_t g_usart_rx_buf[USART_REC_LEN]; /* ���ջ���,���USART_REC_LEN���ֽ�.ĩ�ֽ�Ϊ���з� */
|
||||
extern uint16_t g_usart_rx_sta; /* ����״̬��� */
|
||||
extern uint8_t g_rx_buffer[RXBUFFERSIZE]; /* HAL��USART����Buffer */
|
||||
#define USART_UX_CLK_ENABLE() do{ __HAL_RCC_USART1_CLK_ENABLE(); }while(0)
|
||||
|
||||
|
||||
void usart_init(uint32_t baudrate); /* ���ڳ�ʼ������ */
|
||||
|
||||
#define USART_REC_LEN 200
|
||||
#define USART_EN_RX 1
|
||||
#define RXBUFFERSIZE 1
|
||||
|
||||
extern UART_HandleTypeDef g_uart1_handle;
|
||||
|
||||
extern uint8_t g_usart_rx_buf[USART_REC_LEN];
|
||||
extern uint16_t g_usart_rx_sta;
|
||||
extern uint8_t g_rx_buffer[RXBUFFERSIZE];
|
||||
|
||||
|
||||
void usart_init(uint32_t baudrate);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -1,22 +1,3 @@
|
||||
/**
|
||||
****************************************************************************************************
|
||||
* @file sys.c
|
||||
* @author ����ԭ���Ŷ�(ALIENTEK)
|
||||
* @version V1.0
|
||||
* @date 2023-06-12
|
||||
* @brief ϵͳ��ʼ������
|
||||
* @license Copyright (c) 2020-2032, �������������ӿƼ�����˾
|
||||
****************************************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* ʵ��ƽ̨:����ԭ�� ������ H750������
|
||||
* ������Ƶ:www.yuanzige.com
|
||||
* ������̳:www.openedv.com
|
||||
* ��˾��ַ:www.alientek.com
|
||||
* ������?:openedv.taobao.com
|
||||
*
|
||||
****************************************************************************************************
|
||||
*/
|
||||
|
||||
#include "sys.h"
|
||||
#include "stm32h7xx_hal_rcc.h"
|
||||
@@ -26,51 +7,36 @@
|
||||
#include "stm32h7xx_hal_pwr.h"
|
||||
#include "stm32h7xx_hal_flash_ex.h"
|
||||
#include "stm32h7xx_hal_gpio.h"
|
||||
/* �������ø�����ʱ�� */
|
||||
|
||||
RCC_PeriphCLKInitTypeDef rcc_periph_clk_init_struct = {0};
|
||||
|
||||
|
||||
|
||||
void sys_cache_enable(void)
|
||||
{
|
||||
SCB_EnableICache(); /* ʹÄÜI-Cache */
|
||||
SCB_EnableDCache(); /* ʹÄÜD-Cache */
|
||||
SCB->CACR |= SCB_CACR_FORCEWT_Msk; /* ʹÄÜD-CacheÇ¿ÖÆ͸д */
|
||||
SCB_EnableICache();
|
||||
SCB_EnableDCache();
|
||||
SCB->CACR |= SCB_CACR_FORCEWT_Msk;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief ?????��??
|
||||
* @param plln: PLL1??��????��?????����??��??4~512??
|
||||
* @param pllm: PLL1???�衤????��?????����??��??1~63??
|
||||
* @param pllp: PLL1??P?????����????��?????����??��??2~128?��????????
|
||||
* @param pllq: PLL1??Q?????����????��?????����??��??1~128??
|
||||
* @note ?��?????��????????25MHz?��??????????plln=192 pllm=5 pllp=2 pllq=4
|
||||
* @retval ?????��??
|
||||
* @arg 0: ????
|
||||
* @arg 1: ?���?
|
||||
*/
|
||||
|
||||
uint8_t sys_stm32_clock_init(uint32_t plln, uint32_t pllm, uint32_t pllp, uint32_t pllq)
|
||||
{
|
||||
RCC_OscInitTypeDef rcc_osc_init_struct = {0};
|
||||
RCC_ClkInitTypeDef rcc_clk_init_struct = {0};
|
||||
|
||||
/* ����ΪLDO Supply��ʽΪ�ں��� */
|
||||
|
||||
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
|
||||
|
||||
/* ����ΪVOS0��1.26V~1.40V�� */
|
||||
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY));
|
||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
|
||||
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY));
|
||||
|
||||
/* ����PLL1��ʹ��HSI48
|
||||
* PLL1ʱ��Դ��HSE��hse_ck��
|
||||
* PLL1 P�����pll1_p_ck = hse_ck / pllm * plln / pllp
|
||||
* PLL1 Q�����pll1_q_ck = hse_ck / pllm * plln / pllq
|
||||
* PLL1 R�����pll1_r_ck = hse_ck / pllm * plln / 2
|
||||
*/
|
||||
|
||||
rcc_osc_init_struct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48;
|
||||
rcc_osc_init_struct.HSEState = RCC_HSE_ON;
|
||||
rcc_osc_init_struct.HSI48State = RCC_HSI48_ON;
|
||||
@@ -88,16 +54,7 @@ uint8_t sys_stm32_clock_init(uint32_t plln, uint32_t pllm, uint32_t pllp, uint32
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* ����CPU��AHB���ߺ�APB����ʱ��
|
||||
* ʱ��Դ��PLL1P�����pll1_p_ck��
|
||||
* ϵͳʱ�ӣ�sys_ck = pll1_p_ck
|
||||
* AHB����ʱ�ӣ�rcc_ahb_ck��rcc_hclk[4:1]�� = sys_ck / 2
|
||||
* APB1����ʱ�ӣ�rcc_pclk1 = rcc_ahb_ck / 2
|
||||
* APB2����ʱ�ӣ�rcc_pclk2 = rcc_ahb_ck / 2
|
||||
* APB3����ʱ�ӣ�rcc_pclk3 = rcc_ahb_ck / 2
|
||||
* APB4����ʱ�ӣ�rcc_pclk4 = rcc_ahb_ck / 2
|
||||
*/
|
||||
|
||||
rcc_clk_init_struct.ClockType = RCC_CLOCKTYPE_SYSCLK |
|
||||
RCC_CLOCKTYPE_HCLK |
|
||||
RCC_CLOCKTYPE_D1PCLK1 |
|
||||
@@ -113,12 +70,7 @@ uint8_t sys_stm32_clock_init(uint32_t plln, uint32_t pllm, uint32_t pllp, uint32
|
||||
rcc_clk_init_struct.APB4CLKDivider = RCC_APB4_DIV2;
|
||||
HAL_RCC_ClockConfig(&rcc_clk_init_struct, FLASH_LATENCY_4);
|
||||
|
||||
/* ����PLL2
|
||||
* ʱ��Դ��HSE��hse_ck��
|
||||
* P�����pll2_p_ck = hse_ck / 5 * 192 / 12
|
||||
* Q�����pll2_q_ck = hse_ck / 5 * 192 / 2
|
||||
* R�����pll2_r_ck = hse_ck / 5 * 192 / 2
|
||||
*/
|
||||
|
||||
rcc_periph_clk_init_struct.PeriphClockSelection = RCC_PERIPHCLK_PLL2_DIVP |
|
||||
RCC_PERIPHCLK_PLL2_DIVQ |
|
||||
RCC_PERIPHCLK_PLL2_DIVR;
|
||||
@@ -132,21 +84,16 @@ uint8_t sys_stm32_clock_init(uint32_t plln, uint32_t pllm, uint32_t pllp, uint32
|
||||
rcc_periph_clk_init_struct.PLL2.PLL2FRACN = 0;
|
||||
HAL_RCCEx_PeriphCLKConfig(&rcc_periph_clk_init_struct);
|
||||
|
||||
/* ʹ��QSPI�ڴ�ӳ��ģʽ */
|
||||
sys_qspi_enable_memmapmode();
|
||||
|
||||
/* ʹ��I/O������Ԫ */
|
||||
|
||||
HAL_SYSCFG_CompensationCodeSelect(SYSCFG_CELL_CODE);
|
||||
HAL_EnableCompensationCell();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ʹ��QSPI�ڴ�ӳ��ģʽ
|
||||
* @param ��
|
||||
* @retval ��
|
||||
*/
|
||||
|
||||
void sys_qspi_enable_memmapmode(void)
|
||||
{
|
||||
QSPI_HandleTypeDef qspi_handle = {0};
|
||||
@@ -155,7 +102,7 @@ void sys_qspi_enable_memmapmode(void)
|
||||
QSPI_MemoryMappedTypeDef qspi_memory_mapped_struct = {0};
|
||||
MPU_Region_InitTypeDef mpu_region_init_struct = {0};
|
||||
|
||||
/* ��ʼ��QSPI */
|
||||
|
||||
qspi_handle.Instance = QUADSPI;
|
||||
qspi_handle.Init.ClockPrescaler = 2 - 1;
|
||||
qspi_handle.Init.FifoThreshold = 32;
|
||||
@@ -167,8 +114,7 @@ void sys_qspi_enable_memmapmode(void)
|
||||
qspi_handle.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
|
||||
HAL_QSPI_DeInit(&qspi_handle);
|
||||
HAL_QSPI_Init(&qspi_handle);
|
||||
|
||||
/* дʹ��Flash��06h�� */
|
||||
|
||||
qspi_command_struct.InstructionMode = QSPI_INSTRUCTION_1_LINE;
|
||||
qspi_command_struct.Instruction = 0x06;
|
||||
qspi_command_struct.AddressMode = QSPI_ADDRESS_NONE;
|
||||
@@ -180,7 +126,6 @@ void sys_qspi_enable_memmapmode(void)
|
||||
qspi_command_struct.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
|
||||
HAL_QSPI_Command(&qspi_handle, &qspi_command_struct, HAL_QSPI_TIMEOUT_DEFAULT_VALUE);
|
||||
|
||||
/* ��ѯ�ȴ�Flashдʹ�ܣ�05h�� */
|
||||
qspi_command_struct.InstructionMode = QSPI_INSTRUCTION_1_LINE;
|
||||
qspi_command_struct.Instruction = 0x05;
|
||||
qspi_command_struct.AddressMode = QSPI_ADDRESS_NONE;
|
||||
@@ -198,7 +143,7 @@ void sys_qspi_enable_memmapmode(void)
|
||||
qspi_autopolling_struct.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE;
|
||||
HAL_QSPI_AutoPolling(&qspi_handle, &qspi_command_struct, &qspi_autopolling_struct, HAL_QSPI_TIMEOUT_DEFAULT_VALUE);
|
||||
|
||||
/* ����MPU����QSPI�ڴ�ӳ������ */
|
||||
|
||||
mpu_region_init_struct.Enable = MPU_REGION_ENABLE;
|
||||
mpu_region_init_struct.Number = MPU_REGION_NUMBER0;
|
||||
mpu_region_init_struct.BaseAddress = QSPI_BASE;
|
||||
@@ -214,7 +159,7 @@ void sys_qspi_enable_memmapmode(void)
|
||||
HAL_MPU_ConfigRegion(&mpu_region_init_struct);
|
||||
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
|
||||
|
||||
/* Flash�����ݿڿ��ٶ���EBh���ڴ�ӳ��ģʽ */
|
||||
|
||||
qspi_command_struct.InstructionMode = QSPI_INSTRUCTION_1_LINE;
|
||||
qspi_command_struct.Instruction = 0xEB;
|
||||
qspi_command_struct.AddressMode = QSPI_ADDRESS_4_LINES;
|
||||
@@ -229,36 +174,24 @@ void sys_qspi_enable_memmapmode(void)
|
||||
HAL_QSPI_MemoryMapped(&qspi_handle, &qspi_command_struct, &qspi_memory_mapped_struct);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief HAL��QSPI��ʼ��MSP����
|
||||
* @param ��
|
||||
* @retval ��
|
||||
*/
|
||||
|
||||
void HAL_QSPI_MspInit(QSPI_HandleTypeDef *hqspi)
|
||||
{
|
||||
GPIO_InitTypeDef gpio_init_struct;
|
||||
|
||||
if (hqspi->Instance == QUADSPI)
|
||||
{
|
||||
/* ����ʱ�� */
|
||||
|
||||
rcc_periph_clk_init_struct.PeriphClockSelection |= RCC_PERIPHCLK_QSPI;
|
||||
rcc_periph_clk_init_struct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK;
|
||||
HAL_RCCEx_PeriphCLKConfig(&rcc_periph_clk_init_struct);
|
||||
|
||||
/* ʹ��ʱ�� */
|
||||
|
||||
__HAL_RCC_QSPI_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
|
||||
/* ��ʼ��GPIO
|
||||
* QSPI Signal MCU Pin
|
||||
* QUADSPI_BK1_IO0 <--> PF8
|
||||
* QUADSPI_BK1_IO1 <--> PF9
|
||||
* QUADSPI_BK1_IO2 <--> PF7
|
||||
* QUADSPI_BK1_IO3 <--> PF6
|
||||
* QUADSPI_BK1_NCS <--> PB6
|
||||
* QUADSPI_CLK <--> PB2
|
||||
*/
|
||||
|
||||
gpio_init_struct.Pin = GPIO_PIN_6;
|
||||
gpio_init_struct.Mode = GPIO_MODE_AF_PP;
|
||||
gpio_init_struct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
@@ -280,27 +213,14 @@ void HAL_QSPI_MspInit(QSPI_HandleTypeDef *hqspi)
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief HAL��QSPI����ʼ��MSP����
|
||||
* @param ��
|
||||
* @retval ��
|
||||
*/
|
||||
|
||||
void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi)
|
||||
{
|
||||
if (hqspi->Instance == QUADSPI)
|
||||
{
|
||||
/* ʹ��ʱ�� */
|
||||
__HAL_RCC_QSPI_CLK_DISABLE();
|
||||
|
||||
/* ����ʼ��GPIO
|
||||
* QSPI Signal MCU Pin
|
||||
* QUADSPI_BK1_IO0 <--> PF8
|
||||
* QUADSPI_BK1_IO1 <--> PF9
|
||||
* QUADSPI_BK1_IO2 <--> PF7
|
||||
* QUADSPI_BK1_IO3 <--> PF6
|
||||
* QUADSPI_BK1_NCS <--> PB6
|
||||
* QUADSPI_CLK <--> PB2
|
||||
*/
|
||||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_2 | GPIO_PIN_6);
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9);
|
||||
}
|
||||
|
||||
@@ -94,7 +94,6 @@ void UartIsr1(int vector, void *param)
|
||||
DECLARE_HW_IRQ(USART1_IRQn, UartIsr1, NONE);
|
||||
|
||||
|
||||
|
||||
static uint32 SerialInit(struct SerialDriver *serial_drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(serial_drv);
|
||||
@@ -117,58 +116,15 @@ static uint32 SerialInit(struct SerialDriver *serial_drv, struct BusConfigureInf
|
||||
// config serial receive sem timeout
|
||||
dev_param->serial_timeout = serial_cfg->data_cfg.serial_timeout;
|
||||
|
||||
serial_hw_cfg->uart_handle.Instance = serial_hw_cfg->uart_device;
|
||||
serial_hw_cfg->uart_handle.Init.BaudRate = serial_cfg->data_cfg.serial_baud_rate;
|
||||
serial_hw_cfg->uart_handle.Instance = USART_UX;
|
||||
serial_hw_cfg->uart_handle.Init.BaudRate = 115200;
|
||||
serial_hw_cfg->uart_handle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||
serial_hw_cfg->uart_handle.Init.Mode = UART_MODE_TX_RX;
|
||||
serial_hw_cfg->uart_handle.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||
|
||||
switch (serial_cfg->data_cfg.serial_data_bits)
|
||||
{
|
||||
case DATA_BITS_8:
|
||||
if (serial_cfg->data_cfg.serial_parity_mode == PARITY_ODD || serial_cfg->data_cfg.serial_parity_mode == PARITY_EVEN)
|
||||
serial_hw_cfg->uart_handle.Init.WordLength = UART_WORDLENGTH_9B;
|
||||
else
|
||||
serial_hw_cfg->uart_handle.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
break;
|
||||
case DATA_BITS_9:
|
||||
serial_hw_cfg->uart_handle.Init.WordLength = UART_WORDLENGTH_9B;
|
||||
break;
|
||||
default:
|
||||
serial_hw_cfg->uart_handle.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (serial_cfg->data_cfg.serial_stop_bits)
|
||||
{
|
||||
case STOP_BITS_1:
|
||||
serial_hw_cfg->uart_handle.Init.StopBits = UART_STOPBITS_1;
|
||||
break;
|
||||
case STOP_BITS_2:
|
||||
serial_hw_cfg->uart_handle.Init.StopBits = UART_STOPBITS_2;
|
||||
break;
|
||||
default:
|
||||
serial_hw_cfg->uart_handle.Init.StopBits = UART_STOPBITS_1;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (serial_cfg->data_cfg.serial_parity_mode)
|
||||
{
|
||||
case PARITY_NONE:
|
||||
serial_hw_cfg->uart_handle.Init.Parity = UART_PARITY_NONE;
|
||||
break;
|
||||
case PARITY_ODD:
|
||||
serial_hw_cfg->uart_handle.Init.Parity = UART_PARITY_ODD;
|
||||
break;
|
||||
case PARITY_EVEN:
|
||||
serial_hw_cfg->uart_handle.Init.Parity = UART_PARITY_EVEN;
|
||||
break;
|
||||
default:
|
||||
serial_hw_cfg->uart_handle.Init.Parity = UART_PARITY_NONE;
|
||||
break;
|
||||
}
|
||||
usart_init(115200);
|
||||
|
||||
serial_hw_cfg->uart_handle.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
serial_hw_cfg->uart_handle.Init.Parity = UART_PARITY_NONE;
|
||||
serial_hw_cfg->uart_handle.Init.StopBits = UART_STOPBITS_1;
|
||||
usart_init(115200);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
@@ -229,12 +185,11 @@ static int SerialPutChar(struct SerialHardwareDevice *serial_dev, char c)
|
||||
{
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
struct Stm32UartHwCfg *serial_hw_cfg = (struct Stm32UartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
/* Polling mode. */
|
||||
HAL_UART_Transmit(&(serial_hw_cfg->uart_handle), (uint8_t *)&c, 1, 100);
|
||||
// UART_INSTANCE_CLEAR_FUNCTION(&(serial_hw_cfg->uart_handle), UART_FLAG_TC);
|
||||
|
||||
|
||||
// serial_hw_cfg->uart_handle.Instance->TDR = c;
|
||||
// while (__HAL_UART_GET_FLAG(&(serial_hw_cfg->uart_handle), UART_FLAG_TC) == RESET);
|
||||
while ((serial_hw_cfg->uart_handle.Instance->ISR & 0X40) == 0);
|
||||
|
||||
serial_hw_cfg->uart_handle.Instance->TDR = (uint8_t)c;
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
@@ -1,133 +1,89 @@
|
||||
/**
|
||||
****************************************************************************************************
|
||||
* @file usart.c
|
||||
* @author ����ԭ���Ŷ�(ALIENTEK)
|
||||
* @version V1.1
|
||||
* @date 2023-06-05
|
||||
* @brief ���ڳ�ʼ������(һ���Ǵ���1)��֧��printf
|
||||
* @license Copyright (c) 2020-2032, �������������ӿƼ�����˾
|
||||
****************************************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* ʵ��ƽ̨:����ԭ�� STM32H750������
|
||||
* ������Ƶ:www.yuanzige.com
|
||||
* ������̳:www.openedv.com
|
||||
* ��˾��ַ:www.alientek.com
|
||||
* �����ַ:openedv.taobao.com
|
||||
*
|
||||
* ��˵��
|
||||
* V1.0 20200312
|
||||
* ��һ�η���
|
||||
* V1.1 20230605
|
||||
* ɾ��USART_UX_IRQHandler()�����ij�ʱ��������HAL_UART_RxCpltCallback()
|
||||
*
|
||||
****************************************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
#include "sys.h"
|
||||
#include "usart.h"
|
||||
#include "stm32h7xx_hal_gpio.h"
|
||||
#include "stm32h7xx_hal_cortex.h"
|
||||
|
||||
/* ���ջ���, ���USART_REC_LEN���ֽ�. */
|
||||
|
||||
uint8_t g_usart_rx_buf[USART_REC_LEN];
|
||||
|
||||
/* ����״̬
|
||||
* bit15�� ������ɱ�־
|
||||
* bit14�� ���յ�0x0d
|
||||
* bit13~0�� ���յ�����Ч�ֽ���Ŀ
|
||||
*/
|
||||
|
||||
uint16_t g_usart_rx_sta = 0;
|
||||
|
||||
uint8_t g_rx_buffer[RXBUFFERSIZE]; /* HAL��ʹ�õĴ��ڽ��ջ��� */
|
||||
uint8_t g_rx_buffer[RXBUFFERSIZE];
|
||||
|
||||
UART_HandleTypeDef g_uart1_handle;
|
||||
|
||||
UART_HandleTypeDef g_uart1_handle; /* UART��� */
|
||||
|
||||
|
||||
/**
|
||||
* @brief ����X��ʼ������
|
||||
* @param baudrate: ������, �����Լ���Ҫ���ò�����ֵ
|
||||
* @note ע��: ����������ȷ��ʱ��Դ, ���ڲ����ʾͻ������쳣.
|
||||
* �����USART��ʱ��Դ��sys_stm32_clock_init()�������Ѿ����ù���.
|
||||
* @retval ��
|
||||
*/
|
||||
void usart_init(uint32_t baudrate)
|
||||
{
|
||||
g_uart1_handle.Instance = USART_UX; /* USART1 */
|
||||
g_uart1_handle.Init.BaudRate = baudrate; /* ������ */
|
||||
g_uart1_handle.Init.WordLength = UART_WORDLENGTH_8B; /* �ֳ�Ϊ8λ���ݸ�ʽ */
|
||||
g_uart1_handle.Init.StopBits = UART_STOPBITS_1; /* һ��ֹͣλ */
|
||||
g_uart1_handle.Init.Parity = UART_PARITY_NONE; /* ����żУ��λ */
|
||||
g_uart1_handle.Init.HwFlowCtl = UART_HWCONTROL_NONE; /* ��Ӳ������ */
|
||||
g_uart1_handle.Init.Mode = UART_MODE_TX_RX; /* �շ�ģʽ */
|
||||
HAL_UART_Init(&g_uart1_handle); /* HAL_UART_Init()��ʹ��UART1 */
|
||||
g_uart1_handle.Instance = USART_UX;
|
||||
g_uart1_handle.Init.BaudRate = baudrate;
|
||||
g_uart1_handle.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
g_uart1_handle.Init.StopBits = UART_STOPBITS_1;
|
||||
g_uart1_handle.Init.Parity = UART_PARITY_NONE;
|
||||
g_uart1_handle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||
g_uart1_handle.Init.Mode = UART_MODE_TX_RX;
|
||||
HAL_UART_Init(&g_uart1_handle);
|
||||
|
||||
/* �ú����Ὺ�������жϣ���־λUART_IT_RXNE���������ý��ջ����Լ����ջ��������������� */
|
||||
|
||||
HAL_UART_Receive_IT(&g_uart1_handle, (uint8_t *)g_rx_buffer, RXBUFFERSIZE);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART�ײ��ʼ������
|
||||
* @param huart: UART�������ָ��
|
||||
* @note �˺����ᱻHAL_UART_Init()����
|
||||
* ���ʱ��ʹ�ܣ��������ã��ж�����
|
||||
* @retval ��
|
||||
*/
|
||||
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef *huart)
|
||||
{
|
||||
GPIO_InitTypeDef gpio_init_struct;
|
||||
|
||||
if(huart->Instance == USART1) /* ����Ǵ���1�����д���1 MSP��ʼ�� */
|
||||
if(huart->Instance == USART1)
|
||||
{
|
||||
rcc_periph_clk_init_struct.PeriphClockSelection |= RCC_PERIPHCLK_USART1;
|
||||
rcc_periph_clk_init_struct.Usart16ClockSelection = RCC_USART16CLKSOURCE_PCLK2;
|
||||
HAL_RCCEx_PeriphCLKConfig(&rcc_periph_clk_init_struct);
|
||||
|
||||
USART_UX_CLK_ENABLE(); /* USART1 ʱ��ʹ�� */
|
||||
USART_TX_GPIO_CLK_ENABLE(); /* ��������ʱ��ʹ�� */
|
||||
USART_RX_GPIO_CLK_ENABLE(); /* ��������ʱ��ʹ�� */
|
||||
USART_UX_CLK_ENABLE();
|
||||
USART_TX_GPIO_CLK_ENABLE();
|
||||
USART_RX_GPIO_CLK_ENABLE();
|
||||
|
||||
gpio_init_struct.Pin = USART_TX_GPIO_PIN; /* TX���� */
|
||||
gpio_init_struct.Mode = GPIO_MODE_AF_PP; /* ����������� */
|
||||
gpio_init_struct.Pull = GPIO_PULLUP; /* ���� */
|
||||
gpio_init_struct.Speed = GPIO_SPEED_FREQ_HIGH; /* ���� */
|
||||
gpio_init_struct.Alternate = USART_TX_GPIO_AF; /* ����ΪUSART1 */
|
||||
HAL_GPIO_Init(USART_TX_GPIO_PORT, &gpio_init_struct); /* ��ʼ���������� */
|
||||
|
||||
gpio_init_struct.Pin = USART_RX_GPIO_PIN; /* RX���� */
|
||||
gpio_init_struct.Alternate = USART_RX_GPIO_AF; /* ����ΪUSART1 */
|
||||
HAL_GPIO_Init(USART_RX_GPIO_PORT, &gpio_init_struct); /* ��ʼ���������� */
|
||||
gpio_init_struct.Pin = USART_TX_GPIO_PIN;
|
||||
gpio_init_struct.Mode = GPIO_MODE_AF_PP;
|
||||
gpio_init_struct.Pull = GPIO_PULLUP;
|
||||
gpio_init_struct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
gpio_init_struct.Alternate = USART_TX_GPIO_AF;
|
||||
HAL_GPIO_Init(USART_TX_GPIO_PORT, &gpio_init_struct);
|
||||
gpio_init_struct.Pin = USART_RX_GPIO_PIN;
|
||||
gpio_init_struct.Alternate = USART_RX_GPIO_AF;
|
||||
HAL_GPIO_Init(USART_RX_GPIO_PORT, &gpio_init_struct);
|
||||
|
||||
#if USART_EN_RX
|
||||
HAL_NVIC_EnableIRQ(USART_UX_IRQn); /* ʹ��USART1�ж�ͨ�� */
|
||||
HAL_NVIC_SetPriority(USART_UX_IRQn, 3, 3); /* ��ռ���ȼ�3�������ȼ�3 */
|
||||
#endif
|
||||
HAL_NVIC_EnableIRQ(USART_UX_IRQn);
|
||||
HAL_NVIC_SetPriority(USART_UX_IRQn, 3, 3);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Rx����ص�����
|
||||
* @param huart: UART�������ָ��
|
||||
* @retval ��
|
||||
*/
|
||||
|
||||
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
if(huart->Instance == USART1) /* ����Ǵ���1 */
|
||||
if(huart->Instance == USART1)
|
||||
{
|
||||
if((g_usart_rx_sta & 0x8000) == 0) /* ������ */
|
||||
if((g_usart_rx_sta & 0x8000) == 0)
|
||||
{
|
||||
if(g_usart_rx_sta & 0x4000) /* ���յ���0x0d */
|
||||
if(g_usart_rx_sta & 0x4000)
|
||||
{
|
||||
if(g_rx_buffer[0] != 0x0a)
|
||||
{
|
||||
g_usart_rx_sta = 0; /* ���մ���,���¿�ʼ */
|
||||
g_usart_rx_sta = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
g_usart_rx_sta |= 0x8000; /* ��������� */
|
||||
g_usart_rx_sta |= 0x8000;
|
||||
}
|
||||
}
|
||||
else /* ��û�յ�0X0D */
|
||||
else
|
||||
{
|
||||
if(g_rx_buffer[0] == 0x0d)
|
||||
{
|
||||
@@ -139,7 +95,7 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
g_usart_rx_sta++;
|
||||
if(g_usart_rx_sta > (USART_REC_LEN - 1))
|
||||
{
|
||||
g_usart_rx_sta = 0; /* �������ݴ���,���¿�ʼ���� */
|
||||
g_usart_rx_sta = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user