[RT1602xB] support nxp rt1602xb board, support for uart

2025-05-26 17:09:18 +08:00
parent d8b4719781
commit 0f8bad3bb2
122 changed files with 90376 additions and 0 deletions
@@ -0,0 +1,88 @@
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PIN_MUX_H_
+#define _PIN_MUX_H_
+
+/***********************************************************************************************************************
+ * Definitions
+ **********************************************************************************************************************/
+
+/*! @brief Direction type  */
+typedef enum _pin_mux_direction
+{
+  kPIN_MUX_DirectionInput = 0U,         /* Input direction */
+  kPIN_MUX_DirectionOutput = 1U,        /* Output direction */
+  kPIN_MUX_DirectionInputOrOutput = 2U  /* Input or output direction */
+} pin_mux_direction_t;
+
+/*!
+ * @addtogroup pin_mux
+ * @{
+ */
+
+/***********************************************************************************************************************
+ * API
+ **********************************************************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief Calls initialization functions.
+ *
+ */
+void BOARD_InitBootPins(void);
+
+#define BOARD_INITPINS_IOMUXC_GPR_GPR27_GPIO_MUX2_GPIO_SEL_MASK 0x80U /*!< GPIO2 and GPIO7 share same IO MUX function, GPIO_MUX2 selects one GPIO function: affected bits mask */
+
+/* GPIO_AD_B0_13 (coord L14), UART1_RXD/J11[2] */
+/* Routed pin properties */
+#define BOARD_INITPINS_UART1_RXD_PERIPHERAL                              LPUART1   /*!< Peripheral name */
+#define BOARD_INITPINS_UART1_RXD_SIGNAL                                       RX   /*!< Signal name */
+
+/* GPIO_AD_B0_12 (coord K14), UART1_TXD/J13[2] */
+/* Routed pin properties */
+#define BOARD_INITPINS_UART1_TXD_PERIPHERAL                              LPUART1   /*!< Peripheral name */
+#define BOARD_INITPINS_UART1_TXD_SIGNAL                                       TX   /*!< Signal name */
+
+/* GPIO_AD_B0_10 (coord G13), JTAG_TDO/J2[13]/J3[2]/ENET_INT/U18[21]/INT1_COMBO/U12[11]/DC_I2S2_MCLK/J19[1]/J16[6] */
+/* Routed pin properties */
+#define BOARD_INITPINS_INT1_COMBO_PERIPHERAL                                 ARM   /*!< Peripheral name */
+#define BOARD_INITPINS_INT1_COMBO_SIGNAL                           arm_trace_swo   /*!< Signal name */
+
+/* GPIO_B0_07 (coord A9), LCDIF_D3/BT_CFG[3]/J49[A27] */
+/* Routed pin properties */
+#define BOARD_INITPINS_LCDIF_D3_PERIPHERAL                                 GPIO2   /*!< Peripheral name */
+#define BOARD_INITPINS_LCDIF_D3_SIGNAL                                   gpio_io   /*!< Signal name */
+#define BOARD_INITPINS_LCDIF_D3_CHANNEL                                       7U   /*!< Signal channel */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITPINS_LCDIF_D3_GPIO                                       GPIO2   /*!< GPIO peripheral base pointer */
+#define BOARD_INITPINS_LCDIF_D3_GPIO_PIN                                      7U   /*!< GPIO pin number */
+#define BOARD_INITPINS_LCDIF_D3_GPIO_PIN_MASK                         (1U << 7U)   /*!< GPIO pin mask */
+#define BOARD_INITPINS_LCDIF_D3_PORT                                       GPIO2   /*!< PORT peripheral base pointer */
+#define BOARD_INITPINS_LCDIF_D3_PIN                                           7U   /*!< PORT pin number */
+#define BOARD_INITPINS_LCDIF_D3_PIN_MASK                              (1U << 7U)   /*!< PORT pin mask */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitPins(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+/*!
+ * @}
+ */
+#endif /* _PIN_MUX_H_ */
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/