Modify mmu, delete invalid headers
This commit is contained in:
songyanguang
parent
32977dd301
commit
0d05dab7b3
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@ -1,186 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2009 Chen Liqin <liqin.chen@sunplusct.com>
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* Copyright (C) 2012 Regents of the University of California
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* Copyright (C) 2017 SiFive
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* Copyright (C) 2017 XiaojingZhu <zhuxiaoj@ict.ac.cn>
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*/
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#ifndef _ASM_RISCV_PAGE_H
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#define _ASM_RISCV_PAGE_H
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#include "autoconf.h"
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#include <asm/const.h>
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#include <asm/pfn.h>
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#ifdef CONFIG_PHYS_ADDR_T_64BIT
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typedef uint64_t phys_addr_t;
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#else
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typedef uint64_t phys_addr_t;
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#endif
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#define PAGE_SHIFT (12)
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#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
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#define PAGE_MASK (~(PAGE_SIZE - 1))
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#ifdef CONFIG_64BIT
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#define HUGE_MAX_HSTATE 2
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#else
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#define HUGE_MAX_HSTATE 1
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#endif
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#define HPAGE_SHIFT PMD_SHIFT
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#define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT)
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#define HPAGE_MASK (~(HPAGE_SIZE - 1))
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#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
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/*
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* PAGE_OFFSET -- the first address of the first page of memory.
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* When not using MMU this corresponds to the first free page in
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* physical memory (aligned on a page boundary).
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*/
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#define PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
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#define KERN_VIRT_SIZE (-PAGE_OFFSET)
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#ifndef __ASSEMBLY__
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#define clear_page(pgaddr) memset((pgaddr), 0, PAGE_SIZE)
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#define copy_page(to, from) memcpy((to), (from), PAGE_SIZE)
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#define clear_user_page(pgaddr, vaddr, page) memset((pgaddr), 0, PAGE_SIZE)
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#define copy_user_page(vto, vfrom, vaddr, topg) \
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memcpy((vto), (vfrom), PAGE_SIZE)
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/*
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* Use struct definitions to apply C type checking
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*/
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/* Page Global Directory entry */
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typedef struct {
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unsigned long pgd;
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} pgd_t;
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/* Page Table entry */
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typedef struct {
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unsigned long pte;
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} pte_t;
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typedef struct {
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unsigned long pgprot;
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} pgprot_t;
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typedef struct page *pgtable_t;
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#define pte_val(x) ((x).pte)
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#define pgd_val(x) ((x).pgd)
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#define pgprot_val(x) ((x).pgprot)
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#define __pte(x) ((pte_t) { (x) })
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#define __pgd(x) ((pgd_t) { (x) })
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#define __pgprot(x) ((pgprot_t) { (x) })
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#ifdef CONFIG_64BIT
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#define PTE_FMT "%016lx"
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#else
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#define PTE_FMT "%08lx"
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#endif
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#ifdef CONFIG_MMU
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extern unsigned long riscv_pfn_base;
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#define ARCH_PFN_OFFSET (riscv_pfn_base)
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#else
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#define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT)
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#endif /* CONFIG_MMU */
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struct kernel_mapping {
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unsigned long virt_addr;
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uintptr_t phys_addr;
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uintptr_t size;
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/* Offset between linear mapping virtual address and kernel load address */
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unsigned long va_pa_offset;
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/* Offset between kernel mapping virtual address and kernel load address */
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unsigned long va_kernel_pa_offset;
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unsigned long va_kernel_xip_pa_offset;
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#ifdef CONFIG_XIP_KERNEL
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uintptr_t xiprom;
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uintptr_t xiprom_sz;
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#endif
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};
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extern struct kernel_mapping kernel_map;
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extern phys_addr_t phys_ram_base;
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#define is_kernel_mapping(x) \
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((x) >= kernel_map.virt_addr && (x) < (kernel_map.virt_addr + kernel_map.size))
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#define is_linear_mapping(x) \
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((x) >= PAGE_OFFSET && (!IS_ENABLED(CONFIG_64BIT) || (x) < kernel_map.virt_addr))
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#define linear_mapping_pa_to_va(x) ((void *)((unsigned long)(x) + kernel_map.va_pa_offset))
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#define kernel_mapping_pa_to_va(y) ({ \
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unsigned long _y = y; \
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(IS_ENABLED(CONFIG_XIP_KERNEL) && _y < phys_ram_base) ? \
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(void *)((unsigned long)(_y) + kernel_map.va_kernel_xip_pa_offset) : \
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(void *)((unsigned long)(_y) + kernel_map.va_kernel_pa_offset + XIP_OFFSET); \
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})
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#define __pa_to_va_nodebug(x) linear_mapping_pa_to_va(x)
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#define linear_mapping_va_to_pa(x) ((unsigned long)(x) - kernel_map.va_pa_offset)
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#define kernel_mapping_va_to_pa(y) ({ \
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unsigned long _y = y; \
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(IS_ENABLED(CONFIG_XIP_KERNEL) && _y < kernel_map.virt_addr + XIP_OFFSET) ? \
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((unsigned long)(_y) - kernel_map.va_kernel_xip_pa_offset) : \
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((unsigned long)(_y) - kernel_map.va_kernel_pa_offset - XIP_OFFSET); \
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})
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#define __va_to_pa_nodebug(x) ({ \
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unsigned long _x = x; \
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is_linear_mapping(_x) ? \
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linear_mapping_va_to_pa(_x) : kernel_mapping_va_to_pa(_x); \
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})
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#ifdef CONFIG_DEBUG_VIRTUAL
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extern phys_addr_t __virt_to_phys(unsigned long x);
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extern phys_addr_t __phys_addr_symbol(unsigned long x);
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#else
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#define __virt_to_phys(x) __va_to_pa_nodebug(x)
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#define __phys_addr_symbol(x) __va_to_pa_nodebug(x)
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#endif /* CONFIG_DEBUG_VIRTUAL */
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#define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0))
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#define __pa(x) __virt_to_phys((unsigned long)(x))
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#define __va(x) ((void *)__pa_to_va_nodebug((phys_addr_t)(x)))
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#define phys_to_pfn(phys) (PFN_DOWN(phys))
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#define pfn_to_phys(pfn) (PFN_PHYS(pfn))
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#define virt_to_pfn(vaddr) (phys_to_pfn(__pa(vaddr)))
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#define pfn_to_virt(pfn) (__va(pfn_to_phys(pfn)))
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#define virt_to_page(vaddr) (pfn_to_page(virt_to_pfn(vaddr)))
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#define page_to_virt(page) (pfn_to_virt(page_to_pfn(page)))
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#define page_to_phys(page) (pfn_to_phys(page_to_pfn(page)))
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#define page_to_bus(page) (page_to_phys(page))
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#define phys_to_page(paddr) (pfn_to_page(phys_to_pfn(paddr)))
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#define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x))
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#ifdef CONFIG_FLATMEM
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#define pfn_valid(pfn) \
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(((pfn) >= ARCH_PFN_OFFSET) && (((pfn) - ARCH_PFN_OFFSET) < max_mapnr))
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#endif
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#endif /* __ASSEMBLY__ */
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#define virt_addr_valid(vaddr) ({ \
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unsigned long _addr = (unsigned long)vaddr; \
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(unsigned long)(_addr) >= PAGE_OFFSET && pfn_valid(virt_to_pfn(_addr)); \
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})
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#define VM_DATA_DEFAULT_FLAGS VM_DATA_FLAGS_NON_EXEC
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#endif /* _ASM_RISCV_PAGE_H */
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@ -1,23 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _LINUX_PFN_H_
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#define _LINUX_PFN_H_
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#ifndef __ASSEMBLER__
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#include <stdint.h>
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/*
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* pfn_t: encapsulates a page-frame number that is optionally backed
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* by memmap (struct page). Whether a pfn_t has a 'struct page'
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* backing is indicated by flags in the high bits of the value.
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*/
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typedef struct {
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uint64_t val;
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} pfn_t;
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#endif
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#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
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#define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT)
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#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
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#define PFN_PHYS(x) ((phys_addr_t)(x) << PAGE_SHIFT)
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#define PHYS_PFN(x) ((unsigned long)((x) >> PAGE_SHIFT))
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#endif
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@ -1,47 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 Regents of the University of California
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*/
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#ifndef _ASM_RISCV_PGTABLE_64_H
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#define _ASM_RISCV_PGTABLE_64_H
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#include <asm/const.h>
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#include <asm/pgtable-bits.h>
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#define PGDIR_SHIFT 30
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/* Size of region mapped by a page global directory */
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#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE - 1))
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#define PMD_SHIFT 21
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/* Size of region mapped by a page middle directory */
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#define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
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#define PMD_MASK (~(PMD_SIZE - 1))
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/* Page Middle Directory entry */
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typedef struct {
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unsigned long pmd;
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} pmd_t;
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#define pmd_val(x) ((x).pmd)
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#define __pmd(x) ((pmd_t) { (x) })
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#define PTRS_PER_PMD (PAGE_SIZE / sizeof(pmd_t))
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static inline pmd_t pfn_pmd(unsigned long pfn, pgprot_t prot)
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{
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return __pmd((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot));
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}
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static inline unsigned long _pmd_pfn(pmd_t pmd)
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{
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return pmd_val(pmd) >> _PAGE_PFN_SHIFT;
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}
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#define mk_pmd(page, prot) pfn_pmd(page_to_pfn(page), prot)
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#define pmd_ERROR(e) \
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pr_err("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
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#endif /* _ASM_RISCV_PGTABLE_64_H */
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@ -1,598 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 Regents of the University of California
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*/
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#ifndef _ASM_RISCV_PGTABLE_H
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#define _ASM_RISCV_PGTABLE_H
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#include "autoconf.h"
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#include <asm/pgtable-bits.h>
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#include <asm/sizes.h>
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#ifndef CONFIG_MMU
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#define KERNEL_LINK_ADDR PAGE_OFFSET
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#else
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#define ADDRESS_SPACE_END (UL(-1))
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#ifdef CONFIG_64BIT
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/* Leave 2GB for kernel and BPF at the end of the address space */
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#define KERNEL_LINK_ADDR (ADDRESS_SPACE_END - SZ_2G + 1)
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#else
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#define KERNEL_LINK_ADDR PAGE_OFFSET
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#endif
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#define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
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#define VMALLOC_END (PAGE_OFFSET - 1)
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#define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE)
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#define BPF_JIT_REGION_SIZE (SZ_128M)
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#ifdef CONFIG_64BIT
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#define BPF_JIT_REGION_START (BPF_JIT_REGION_END - BPF_JIT_REGION_SIZE)
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#define BPF_JIT_REGION_END (MODULES_END)
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#else
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#define BPF_JIT_REGION_START (PAGE_OFFSET - BPF_JIT_REGION_SIZE)
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#define BPF_JIT_REGION_END (VMALLOC_END)
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#endif
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/* Modules always live before the kernel */
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#ifdef CONFIG_64BIT
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#define MODULES_VADDR (PFN_ALIGN((unsigned long)&_end) - SZ_2G)
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#define MODULES_END (PFN_ALIGN((unsigned long)&_start))
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#endif
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/*
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* Roughly size the vmemmap space to be large enough to fit enough
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* struct pages to map half the virtual address space. Then
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* position vmemmap directly below the VMALLOC region.
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*/
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#define STRUCT_PAGE_MAX_SHIFT 0 //syg
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#define VMEMMAP_SHIFT \
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(CONFIG_VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
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#define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT)
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#define VMEMMAP_END (VMALLOC_START - 1)
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#define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE)
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/*
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* Define vmemmap for pfn_to_page & page_to_pfn calls. Needed if kernel
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* is configured with CONFIG_SPARSEMEM_VMEMMAP enabled.
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*/
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#define vmemmap ((struct page *)VMEMMAP_START)
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#define PCI_IO_SIZE SZ_16M
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#define PCI_IO_END VMEMMAP_START
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#define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE)
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#define FIXADDR_TOP PCI_IO_START
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#ifdef CONFIG_64BIT
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#define FIXADDR_SIZE PMD_SIZE
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#else
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#define FIXADDR_SIZE PGDIR_SIZE
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#endif
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#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
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#endif
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#ifdef CONFIG_XIP_KERNEL
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#define XIP_OFFSET SZ_8M
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#else
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#define XIP_OFFSET 0
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#endif
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#ifndef __ASSEMBLY__
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/* Page Upper Directory not used in RISC-V */
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//#include <asm-generic/pgtable-nopud.h>
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#include <asm/page.h>
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#ifdef CONFIG_64BIT
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#include <asm/pgtable-64.h>
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#else
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#include <asm/pgtable-32.h>
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#endif /* CONFIG_64BIT */
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#ifdef CONFIG_XIP_KERNEL
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#define XIP_FIXUP(addr) ({ \
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uintptr_t __a = (uintptr_t)(addr); \
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(__a >= CONFIG_XIP_PHYS_ADDR && __a < CONFIG_XIP_PHYS_ADDR + SZ_16M) ? \
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__a - CONFIG_XIP_PHYS_ADDR + CONFIG_PHYS_RAM_BASE - XIP_OFFSET :\
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__a; \
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})
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#else
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#define XIP_FIXUP(addr) (addr)
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#endif /* CONFIG_XIP_KERNEL */
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#ifdef CONFIG_MMU
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/* Number of entries in the page global directory */
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#define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t))
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/* Number of entries in the page table */
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#define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t))
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/* Number of PGD entries that a user-mode program can use */
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#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
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/* Page protection bits */
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#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_USER)
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#define PAGE_NONE __pgprot(_PAGE_PROT_NONE)
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#define PAGE_READ __pgprot(_PAGE_BASE | _PAGE_READ)
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#define PAGE_WRITE __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE)
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#define PAGE_EXEC __pgprot(_PAGE_BASE | _PAGE_EXEC)
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#define PAGE_READ_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
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#define PAGE_WRITE_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | \
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_PAGE_EXEC | _PAGE_WRITE)
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#define PAGE_COPY PAGE_READ
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#define PAGE_COPY_EXEC PAGE_EXEC
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#define PAGE_COPY_READ_EXEC PAGE_READ_EXEC
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#define PAGE_SHARED PAGE_WRITE
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#define PAGE_SHARED_EXEC PAGE_WRITE_EXEC
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#define _PAGE_KERNEL (_PAGE_READ \
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| _PAGE_WRITE \
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| _PAGE_PRESENT \
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| _PAGE_ACCESSED \
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| _PAGE_DIRTY \
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| _PAGE_GLOBAL)
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#define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
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#define PAGE_KERNEL_READ __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
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#define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL | _PAGE_EXEC)
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#define PAGE_KERNEL_READ_EXEC __pgprot((_PAGE_KERNEL & ~_PAGE_WRITE) \
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| _PAGE_EXEC)
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#define PAGE_TABLE __pgprot(_PAGE_TABLE)
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/*
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* The RISC-V ISA doesn't yet specify how to query or modify PMAs, so we can't
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* change the properties of memory regions.
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*/
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#define _PAGE_IOREMAP _PAGE_KERNEL
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extern pgd_t swapper_pg_dir[];
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/* MAP_PRIVATE permissions: xwr (copy-on-write) */
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#define __P000 PAGE_NONE
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#define __P001 PAGE_READ
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#define __P010 PAGE_COPY
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#define __P011 PAGE_COPY
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#define __P100 PAGE_EXEC
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#define __P101 PAGE_READ_EXEC
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#define __P110 PAGE_COPY_EXEC
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#define __P111 PAGE_COPY_READ_EXEC
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/* MAP_SHARED permissions: xwr */
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#define __S000 PAGE_NONE
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#define __S001 PAGE_READ
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#define __S010 PAGE_SHARED
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#define __S011 PAGE_SHARED
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#define __S100 PAGE_EXEC
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#define __S101 PAGE_READ_EXEC
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#define __S110 PAGE_SHARED_EXEC
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#define __S111 PAGE_SHARED_EXEC
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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static inline int pmd_present(pmd_t pmd)
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{
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/*
|
||||
* Checking for _PAGE_LEAF is needed too because:
|
||||
* When splitting a THP, split_huge_page() will temporarily clear
|
||||
* the present bit, in this situation, pmd_present() and
|
||||
* pmd_trans_huge() still needs to return true.
|
||||
*/
|
||||
return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE | _PAGE_LEAF));
|
||||
}
|
||||
#else
|
||||
static inline int pmd_present(pmd_t pmd)
|
||||
{
|
||||
return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE));
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline int pmd_none(pmd_t pmd)
|
||||
{
|
||||
return (pmd_val(pmd) == 0);
|
||||
}
|
||||
|
||||
static inline int pmd_bad(pmd_t pmd)
|
||||
{
|
||||
return !pmd_present(pmd) || (pmd_val(pmd) & _PAGE_LEAF);
|
||||
}
|
||||
|
||||
#define pmd_leaf pmd_leaf
|
||||
static inline int pmd_leaf(pmd_t pmd)
|
||||
{
|
||||
return pmd_present(pmd) && (pmd_val(pmd) & _PAGE_LEAF);
|
||||
}
|
||||
|
||||
static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
|
||||
{
|
||||
*pmdp = pmd;
|
||||
}
|
||||
|
||||
static inline void pmd_clear(pmd_t *pmdp)
|
||||
{
|
||||
set_pmd(pmdp, __pmd(0));
|
||||
}
|
||||
|
||||
static inline pgd_t pfn_pgd(unsigned long pfn, pgprot_t prot)
|
||||
{
|
||||
return __pgd((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot));
|
||||
}
|
||||
|
||||
static inline unsigned long _pgd_pfn(pgd_t pgd)
|
||||
{
|
||||
return pgd_val(pgd) >> _PAGE_PFN_SHIFT;
|
||||
}
|
||||
|
||||
#if 0
|
||||
static inline struct page *pmd_page(pmd_t pmd)
|
||||
{
|
||||
return pfn_to_page(pmd_val(pmd) >> _PAGE_PFN_SHIFT);
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline unsigned long pmd_page_vaddr(pmd_t pmd)
|
||||
{
|
||||
return (unsigned long)pfn_to_virt(pmd_val(pmd) >> _PAGE_PFN_SHIFT);
|
||||
}
|
||||
|
||||
static inline pte_t pmd_pte(pmd_t pmd)
|
||||
{
|
||||
return __pte(pmd_val(pmd));
|
||||
}
|
||||
|
||||
/* Yields the page frame number (PFN) of a page table entry */
|
||||
static inline unsigned long pte_pfn(pte_t pte)
|
||||
{
|
||||
return (pte_val(pte) >> _PAGE_PFN_SHIFT);
|
||||
}
|
||||
|
||||
#define pte_page(x) pfn_to_page(pte_pfn(x))
|
||||
|
||||
/* Constructs a page table entry */
|
||||
static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
|
||||
{
|
||||
return __pte((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot));
|
||||
}
|
||||
|
||||
#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
|
||||
|
||||
static inline int pte_present(pte_t pte)
|
||||
{
|
||||
return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE));
|
||||
}
|
||||
|
||||
static inline int pte_none(pte_t pte)
|
||||
{
|
||||
return (pte_val(pte) == 0);
|
||||
}
|
||||
|
||||
static inline int pte_write(pte_t pte)
|
||||
{
|
||||
return pte_val(pte) & _PAGE_WRITE;
|
||||
}
|
||||
|
||||
static inline int pte_exec(pte_t pte)
|
||||
{
|
||||
return pte_val(pte) & _PAGE_EXEC;
|
||||
}
|
||||
|
||||
static inline int pte_huge(pte_t pte)
|
||||
{
|
||||
return pte_present(pte) && (pte_val(pte) & _PAGE_LEAF);
|
||||
}
|
||||
|
||||
static inline int pte_dirty(pte_t pte)
|
||||
{
|
||||
return pte_val(pte) & _PAGE_DIRTY;
|
||||
}
|
||||
|
||||
static inline int pte_young(pte_t pte)
|
||||
{
|
||||
return pte_val(pte) & _PAGE_ACCESSED;
|
||||
}
|
||||
|
||||
static inline int pte_special(pte_t pte)
|
||||
{
|
||||
return pte_val(pte) & _PAGE_SPECIAL;
|
||||
}
|
||||
|
||||
/* static inline pte_t pte_rdprotect(pte_t pte) */
|
||||
|
||||
static inline pte_t pte_wrprotect(pte_t pte)
|
||||
{
|
||||
return __pte(pte_val(pte) & ~(_PAGE_WRITE));
|
||||
}
|
||||
|
||||
/* static inline pte_t pte_mkread(pte_t pte) */
|
||||
|
||||
static inline pte_t pte_mkwrite(pte_t pte)
|
||||
{
|
||||
return __pte(pte_val(pte) | _PAGE_WRITE);
|
||||
}
|
||||
|
||||
/* static inline pte_t pte_mkexec(pte_t pte) */
|
||||
|
||||
static inline pte_t pte_mkdirty(pte_t pte)
|
||||
{
|
||||
return __pte(pte_val(pte) | _PAGE_DIRTY);
|
||||
}
|
||||
|
||||
static inline pte_t pte_mkclean(pte_t pte)
|
||||
{
|
||||
return __pte(pte_val(pte) & ~(_PAGE_DIRTY));
|
||||
}
|
||||
|
||||
static inline pte_t pte_mkyoung(pte_t pte)
|
||||
{
|
||||
return __pte(pte_val(pte) | _PAGE_ACCESSED);
|
||||
}
|
||||
|
||||
static inline pte_t pte_mkold(pte_t pte)
|
||||
{
|
||||
return __pte(pte_val(pte) & ~(_PAGE_ACCESSED));
|
||||
}
|
||||
|
||||
static inline pte_t pte_mkspecial(pte_t pte)
|
||||
{
|
||||
return __pte(pte_val(pte) | _PAGE_SPECIAL);
|
||||
}
|
||||
|
||||
static inline pte_t pte_mkhuge(pte_t pte)
|
||||
{
|
||||
return pte;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_NUMA_BALANCING
|
||||
/*
|
||||
* See the comment in include/asm-generic/pgtable.h
|
||||
*/
|
||||
static inline int pte_protnone(pte_t pte)
|
||||
{
|
||||
return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)) == _PAGE_PROT_NONE;
|
||||
}
|
||||
|
||||
static inline int pmd_protnone(pmd_t pmd)
|
||||
{
|
||||
return pte_protnone(pmd_pte(pmd));
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Modify page protection bits */
|
||||
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
||||
{
|
||||
return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
|
||||
}
|
||||
|
||||
#define pgd_ERROR(e) \
|
||||
pr_err("%s:%d: bad pgd " PTE_FMT ".\n", __FILE__, __LINE__, pgd_val(e))
|
||||
|
||||
|
||||
/* Commit new configuration to MMU hardware */
|
||||
static inline void update_mmu_cache(struct vm_area_struct *vma,
|
||||
unsigned long address, pte_t *ptep)
|
||||
{
|
||||
/*
|
||||
* The kernel assumes that TLBs don't cache invalid entries, but
|
||||
* in RISC-V, SFENCE.VMA specifies an ordering constraint, not a
|
||||
* cache flush; it is necessary even after writing invalid entries.
|
||||
* Relying on flush_tlb_fix_spurious_fault would suffice, but
|
||||
* the extra traps reduce performance. So, eagerly SFENCE.VMA.
|
||||
*/
|
||||
#if 0 //syg
|
||||
local_flush_tlb_page(address);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
|
||||
unsigned long address, pmd_t *pmdp)
|
||||
{
|
||||
pte_t *ptep = (pte_t *)pmdp;
|
||||
|
||||
update_mmu_cache(vma, address, ptep);
|
||||
}
|
||||
|
||||
#define __HAVE_ARCH_PTE_SAME
|
||||
static inline int pte_same(pte_t pte_a, pte_t pte_b)
|
||||
{
|
||||
return pte_val(pte_a) == pte_val(pte_b);
|
||||
}
|
||||
|
||||
/*
|
||||
* Certain architectures need to do special things when PTEs within
|
||||
* a page table are directly modified. Thus, the following hook is
|
||||
* made available.
|
||||
*/
|
||||
static inline void set_pte(pte_t *ptep, pte_t pteval)
|
||||
{
|
||||
*ptep = pteval;
|
||||
}
|
||||
|
||||
void flush_icache_pte(pte_t pte);
|
||||
|
||||
static inline void set_pte_at(struct mm_struct *mm,
|
||||
unsigned long addr, pte_t *ptep, pte_t pteval)
|
||||
{
|
||||
if (pte_present(pteval) && pte_exec(pteval))
|
||||
flush_icache_pte(pteval);
|
||||
|
||||
set_pte(ptep, pteval);
|
||||
}
|
||||
|
||||
static inline void pte_clear(struct mm_struct *mm,
|
||||
unsigned long addr, pte_t *ptep)
|
||||
{
|
||||
set_pte_at(mm, addr, ptep, __pte(0));
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* THP functions
|
||||
*/
|
||||
static inline pmd_t pte_pmd(pte_t pte)
|
||||
{
|
||||
return __pmd(pte_val(pte));
|
||||
}
|
||||
|
||||
static inline pmd_t pmd_mkhuge(pmd_t pmd)
|
||||
{
|
||||
return pmd;
|
||||
}
|
||||
|
||||
static inline pmd_t pmd_mkinvalid(pmd_t pmd)
|
||||
{
|
||||
return __pmd(pmd_val(pmd) & ~(_PAGE_PRESENT|_PAGE_PROT_NONE));
|
||||
}
|
||||
|
||||
#define __pmd_to_phys(pmd) (pmd_val(pmd) >> _PAGE_PFN_SHIFT << PAGE_SHIFT)
|
||||
|
||||
static inline unsigned long pmd_pfn(pmd_t pmd)
|
||||
{
|
||||
return ((__pmd_to_phys(pmd) & PMD_MASK) >> PAGE_SHIFT);
|
||||
}
|
||||
|
||||
static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
|
||||
{
|
||||
return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
|
||||
}
|
||||
|
||||
#define pmd_write pmd_write
|
||||
static inline int pmd_write(pmd_t pmd)
|
||||
{
|
||||
return pte_write(pmd_pte(pmd));
|
||||
}
|
||||
|
||||
static inline int pmd_dirty(pmd_t pmd)
|
||||
{
|
||||
return pte_dirty(pmd_pte(pmd));
|
||||
}
|
||||
|
||||
static inline int pmd_young(pmd_t pmd)
|
||||
{
|
||||
return pte_young(pmd_pte(pmd));
|
||||
}
|
||||
|
||||
static inline pmd_t pmd_mkold(pmd_t pmd)
|
||||
{
|
||||
return pte_pmd(pte_mkold(pmd_pte(pmd)));
|
||||
}
|
||||
|
||||
static inline pmd_t pmd_mkyoung(pmd_t pmd)
|
||||
{
|
||||
return pte_pmd(pte_mkyoung(pmd_pte(pmd)));
|
||||
}
|
||||
|
||||
static inline pmd_t pmd_mkwrite(pmd_t pmd)
|
||||
{
|
||||
return pte_pmd(pte_mkwrite(pmd_pte(pmd)));
|
||||
}
|
||||
|
||||
static inline pmd_t pmd_wrprotect(pmd_t pmd)
|
||||
{
|
||||
return pte_pmd(pte_wrprotect(pmd_pte(pmd)));
|
||||
}
|
||||
|
||||
static inline pmd_t pmd_mkclean(pmd_t pmd)
|
||||
{
|
||||
return pte_pmd(pte_mkclean(pmd_pte(pmd)));
|
||||
}
|
||||
|
||||
static inline pmd_t pmd_mkdirty(pmd_t pmd)
|
||||
{
|
||||
return pte_pmd(pte_mkdirty(pmd_pte(pmd)));
|
||||
}
|
||||
|
||||
static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
|
||||
pmd_t *pmdp, pmd_t pmd)
|
||||
{
|
||||
return set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd));
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Encode and decode a swap entry
|
||||
*
|
||||
* Format of swap PTE:
|
||||
* bit 0: _PAGE_PRESENT (zero)
|
||||
* bit 1: _PAGE_PROT_NONE (zero)
|
||||
* bits 2 to 6: swap type
|
||||
* bits 7 to XLEN-1: swap offset
|
||||
*/
|
||||
#define __SWP_TYPE_SHIFT 2
|
||||
#define __SWP_TYPE_BITS 5
|
||||
#define __SWP_TYPE_MASK ((1UL << __SWP_TYPE_BITS) - 1)
|
||||
#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
|
||||
|
||||
#define MAX_SWAPFILES_CHECK() \
|
||||
BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
|
||||
|
||||
#define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
|
||||
#define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT)
|
||||
#define __swp_entry(type, offset) ((swp_entry_t) \
|
||||
{ ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
|
||||
|
||||
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
|
||||
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
|
||||
|
||||
/*
|
||||
* In the RV64 Linux scheme, we give the user half of the virtual-address space
|
||||
* and give the kernel the other (upper) half.
|
||||
*/
|
||||
#ifdef CONFIG_64BIT
|
||||
#define KERN_VIRT_START (-(BIT(CONFIG_VA_BITS)) + TASK_SIZE)
|
||||
#else
|
||||
#define KERN_VIRT_START FIXADDR_START
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32.
|
||||
* Note that PGDIR_SIZE must evenly divide TASK_SIZE.
|
||||
*/
|
||||
#ifdef CONFIG_64BIT
|
||||
#define TASK_SIZE (PGDIR_SIZE * PTRS_PER_PGD / 2)
|
||||
#else
|
||||
#define TASK_SIZE FIXADDR_START
|
||||
#endif
|
||||
|
||||
#else /* CONFIG_MMU */
|
||||
|
||||
#define PAGE_SHARED __pgprot(0)
|
||||
#define PAGE_KERNEL __pgprot(0)
|
||||
#define swapper_pg_dir NULL
|
||||
#define TASK_SIZE 0xffffffffUL
|
||||
#define VMALLOC_START 0
|
||||
#define VMALLOC_END TASK_SIZE
|
||||
|
||||
#endif /* !CONFIG_MMU */
|
||||
|
||||
#define kern_addr_valid(addr) (1) /* FIXME */
|
||||
|
||||
extern char _start[];
|
||||
extern char _end[];
|
||||
extern void *_dtb_early_va;
|
||||
extern uintptr_t _dtb_early_pa;
|
||||
#if defined(CONFIG_XIP_KERNEL) && defined(CONFIG_MMU)
|
||||
#define dtb_early_va (*(void **)XIP_FIXUP(&_dtb_early_va))
|
||||
#define dtb_early_pa (*(uintptr_t *)XIP_FIXUP(&_dtb_early_pa))
|
||||
#else
|
||||
#define dtb_early_va _dtb_early_va
|
||||
#define dtb_early_pa _dtb_early_pa
|
||||
#endif /* CONFIG_XIP_KERNEL */
|
||||
|
||||
void paging_init(void);
|
||||
void misc_mem_init(void);
|
||||
|
||||
/*
|
||||
* ZERO_PAGE is a global shared page that is always zero,
|
||||
* used for zero-mapped memory areas, etc.
|
||||
*/
|
||||
extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
|
||||
#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASM_RISCV_PGTABLE_H */
|
||||
|
|
@ -1,52 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* include/linux/sizes.h
|
||||
*/
|
||||
#ifndef __LINUX_SIZES_H__
|
||||
#define __LINUX_SIZES_H__
|
||||
|
||||
#include <asm/const.h>
|
||||
|
||||
#define SZ_1 0x00000001
|
||||
#define SZ_2 0x00000002
|
||||
#define SZ_4 0x00000004
|
||||
#define SZ_8 0x00000008
|
||||
#define SZ_16 0x00000010
|
||||
#define SZ_32 0x00000020
|
||||
#define SZ_64 0x00000040
|
||||
#define SZ_128 0x00000080
|
||||
#define SZ_256 0x00000100
|
||||
#define SZ_512 0x00000200
|
||||
|
||||
#define SZ_1K 0x00000400
|
||||
#define SZ_2K 0x00000800
|
||||
#define SZ_4K 0x00001000
|
||||
#define SZ_8K 0x00002000
|
||||
#define SZ_16K 0x00004000
|
||||
#define SZ_32K 0x00008000
|
||||
#define SZ_64K 0x00010000
|
||||
#define SZ_128K 0x00020000
|
||||
#define SZ_256K 0x00040000
|
||||
#define SZ_512K 0x00080000
|
||||
|
||||
#define SZ_1M 0x00100000
|
||||
#define SZ_2M 0x00200000
|
||||
#define SZ_4M 0x00400000
|
||||
#define SZ_8M 0x00800000
|
||||
#define SZ_16M 0x01000000
|
||||
#define SZ_32M 0x02000000
|
||||
#define SZ_64M 0x04000000
|
||||
#define SZ_128M 0x08000000
|
||||
#define SZ_256M 0x10000000
|
||||
#define SZ_512M 0x20000000
|
||||
|
||||
#define SZ_1G 0x40000000
|
||||
#define SZ_2G 0x80000000
|
||||
|
||||
#define SZ_4G _AC(0x100000000, ULL)
|
||||
#define SZ_8G _AC(0x200000000, ULL)
|
||||
#define SZ_16G _AC(0x400000000, ULL)
|
||||
#define SZ_32G _AC(0x800000000, ULL)
|
||||
#define SZ_64T _AC(0x400000000000, ULL)
|
||||
|
||||
#endif /* __LINUX_SIZES_H__ */
|
||||
|
|
@ -69,47 +69,7 @@ Enable MMU, cache, write buffer, etc.
|
|||
/*
|
||||
Read and write mmu pagetable register base addr
|
||||
*/
|
||||
//#define TTBR0_R(val) __asm__ volatile("mrs %0, ttbr0_el1" : "=r"(val)::"memory")
|
||||
//#define TTBR0_W(val) __asm__ volatile("msr ttbr0_el1, %0" ::"r"(val) : "memory")
|
||||
#define TTBR0_R(val) 0
|
||||
#define TTBR0_W(val) 0
|
||||
|
||||
/*
|
||||
Read and write mmu pagetable register base addr
|
||||
*/
|
||||
//#define TTBR1_R(val) __asm__ volatile("mrs %0, ttbr1_el1" : "=r"(val)::"memory")
|
||||
//#define TTBR1_W(val) __asm__ volatile("msr ttbr1_el1, %0" ::"r"(val) : "memory")
|
||||
#define TTBR1_R(val) 0
|
||||
#define TTBR1_W(val) 0
|
||||
|
||||
/*
|
||||
Translation Control Register（TCR）
|
||||
*/
|
||||
//#define TCR_R(val) __asm__ volatile("mrs %0, tcr_el1" : "=r"(val)::"memory")
|
||||
//#define TCR_W(val) __asm__ volatile("msr tcr_el1, %0" ::"r"(val) : "memory")
|
||||
#define TCR_R(val) 0
|
||||
#define TCR_W(val) 0
|
||||
|
||||
//#define MAIR_R(val) __asm__ volatile("mrs %0, mair_el1" : "=r"(val)::"memory")
|
||||
//#define MAIR_W(val) __asm__ volatile("msr mair_el1, %0" ::"r"(val) : "memory")
|
||||
#define MAIR_R(val) 0
|
||||
#define MAIR_W(val) 0
|
||||
/*
|
||||
Flush TLB when loading a new page table.
|
||||
@note If nG is not set in the pte attribute, process switching need flush tlb.
|
||||
*/
|
||||
// #define CLEARTLB(val) __asm__ volatile("tlbi vmalle1" ::: "memory")
|
||||
//#define CLEARTLB(val) __asm__ volatile("tlbi vmalle1is" ::: "memory")
|
||||
#define CLEARTLB(val) 0
|
||||
|
||||
/*
|
||||
When nG is set in the pte attribute, the process is assigned an ASID, which is stored in the lower 8 bits of the CONTEXTIDR register.
|
||||
When the process switches, the flush TLB is no longer required anymore.
|
||||
*/
|
||||
//#define CONTEXTIDR_R(val) __asm__ volatile("mrs %0, contextidr_el1" : "=r"(val))
|
||||
//#define CONTEXTIDR_W(val) __asm__ volatile("msr contextidr_el1, %0" ::"r"(val))
|
||||
#define CONTEXTIDR_R(val) 0
|
||||
#define CONTEXTIDR_W(val) 0
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
#include <stdint.h>
|
||||
|
|
|
|||
|
|
@ -1,76 +0,0 @@
|
|||
#ifndef _XIUOS_PGTABLE_H
|
||||
#define _XIUOS_PGTABLE_H
|
||||
|
||||
#include <asm/pfn.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
|
||||
/*
|
||||
* On almost all architectures and configurations, 0 can be used as the
|
||||
* upper ceiling to free_pgtables(): on many architectures it has the same
|
||||
* effect as using TASK_SIZE. However, there is one configuration which
|
||||
* must impose a more careful limit, to avoid freeing kernel pgtables.
|
||||
*/
|
||||
#ifndef USER_PGTABLES_CEILING
|
||||
#define USER_PGTABLES_CEILING 0UL
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This defines the first usable user address. Platforms
|
||||
* can override its value with custom FIRST_USER_ADDRESS
|
||||
* defined in their respective <asm/pgtable.h>.
|
||||
*/
|
||||
#ifndef FIRST_USER_ADDRESS
|
||||
#define FIRST_USER_ADDRESS 0UL
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This defines the generic helper for accessing PMD page
|
||||
* table page. Although platforms can still override this
|
||||
* via their respective <asm/pgtable.h>.
|
||||
*/
|
||||
#ifndef pmd_pgtable
|
||||
#define pmd_pgtable(pmd) pmd_page(pmd)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD]
|
||||
*
|
||||
* The pXx_index() functions return the index of the entry in the page
|
||||
* table page which would control the given virtual address
|
||||
*
|
||||
* As these functions may be used by the same code for different levels of
|
||||
* the page table folding, they are always available, regardless of
|
||||
* CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0
|
||||
* because in such cases PTRS_PER_PxD equals 1.
|
||||
*/
|
||||
|
||||
static inline unsigned long pte_index(unsigned long address)
|
||||
{
|
||||
return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
|
||||
}
|
||||
|
||||
#ifndef pmd_index
|
||||
static inline unsigned long pmd_index(unsigned long address)
|
||||
{
|
||||
return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
|
||||
}
|
||||
#define pmd_index pmd_index
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef pgd_index
|
||||
/* Must be a compile-time constant, so implement it as a macro */
|
||||
#define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
|
||||
#endif
|
||||
|
||||
#ifndef pte_offset_kernel
|
||||
static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
|
||||
{
|
||||
return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
|
||||
}
|
||||
#define pte_offset_kernel pte_offset_kernel
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* _XIUOS_PGTABLE_H */
|
||||
|
|
@ -36,7 +36,6 @@ Modification:
|
|||
#include "trap_common.h"
|
||||
|
||||
#include "asm/csr.h"
|
||||
#include "asm/pfn.h"
|
||||
#include "printf.h"
|
||||
|
||||
|
||||
|
|
@ -50,7 +49,7 @@ void load_pgdir(uintptr_t pgdir_paddr)
|
|||
struct ICacheDone* p_icache_done = AchieveResource(&right_group.icache_driver_tag);
|
||||
struct DCacheDone* p_dcache_done = AchieveResource(&right_group.dcache_driver_tag);
|
||||
|
||||
csr_write(CSR_SATP, PFN_DOWN(pgdir_paddr) | SATP_MODE);
|
||||
csr_write(CSR_SATP, (pgdir_paddr >> PAGE_SHIFT) | SATP_MODE);
|
||||
__asm__ __volatile__ ("sfence.vma" : : : "memory");
|
||||
|
||||
p_icache_done->invalidateall();
|
||||
|
|
@ -60,7 +59,7 @@ void load_pgdir(uintptr_t pgdir_paddr)
|
|||
|
||||
__attribute__((always_inline)) inline static void _tlb_flush(uintptr_t va)
|
||||
{
|
||||
// __asm__ volatile("tlbi vae1is, %0" ::"r"(va));
|
||||
;
|
||||
}
|
||||
|
||||
static void tlb_flush_range(uintptr_t vstart, int len)
|
||||
|
|
@ -74,7 +73,7 @@ static void tlb_flush_range(uintptr_t vstart, int len)
|
|||
|
||||
static void tlb_flush_all()
|
||||
{
|
||||
CLEARTLB(0);
|
||||
;
|
||||
}
|
||||
|
||||
static struct MmuCommonDone mmu_common_done = {
|
||||
|
|
|
|||
|
|
@ -29,16 +29,50 @@ Modification:
|
|||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include <stdbool.h>
|
||||
#include "asm/page.h"
|
||||
#include "pgtable.h"
|
||||
#include "memlayout.h"
|
||||
#include "ns16550.h"
|
||||
#include "asm/pgtable-bits.h"
|
||||
#include <asm/pgtable-bits.h>
|
||||
|
||||
|
||||
#define PTRS_PER_PGD NUM_LEVEL2_PDE
|
||||
#define PTRS_PER_PMD NUM_LEVEL3_PDE
|
||||
#define PGDIR_SHIFT LEVEL2_PDE_SHIFT
|
||||
#define PGDIR_SIZE (1 << PGDIR_SHIFT)
|
||||
#define PMD_SHIFT LEVEL3_PDE_SHIFT
|
||||
#define PMD_SIZE (1 << PMD_SHIFT)
|
||||
|
||||
#define _PAGE_KERNEL (_PAGE_READ \
|
||||
| _PAGE_WRITE \
|
||||
| _PAGE_PRESENT \
|
||||
| _PAGE_ACCESSED \
|
||||
| _PAGE_DIRTY \
|
||||
| _PAGE_GLOBAL)
|
||||
|
||||
#define PFN_PD(x, prot) (((x) << _PAGE_PFN_SHIFT) | (prot))
|
||||
#define _PD_PFN(x) ((x) >> _PAGE_PFN_SHIFT)
|
||||
|
||||
#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
|
||||
#define PFN_PHYS(x) ((x) << PAGE_SHIFT)
|
||||
|
||||
#define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
|
||||
#define pmd_index(a) (((a) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
|
||||
|
||||
|
||||
extern char _start[];
|
||||
extern char _end[];
|
||||
|
||||
|
||||
struct kernel_mapping {
|
||||
unsigned long virt_addr;
|
||||
uintptr_t phys_addr;
|
||||
uintptr_t size;
|
||||
/* Offset between linear mapping virtual address and kernel load address */
|
||||
unsigned long va_pa_offset;
|
||||
/* Offset between kernel mapping virtual address and kernel load address */
|
||||
unsigned long va_kernel_pa_offset;
|
||||
unsigned long va_kernel_xip_pa_offset;
|
||||
};
|
||||
typedef uint64_t phys_addr_t;
|
||||
|
||||
|
||||
struct kernel_mapping kernel_map;
|
||||
|
||||
|
|
@ -49,11 +83,9 @@ static uintptr_t trampoline_pmd[PTRS_PER_PMD] __attribute__((aligned(PAGE_SIZE))
|
|||
static uintptr_t early_pmd[PTRS_PER_PMD] __attribute__((aligned(PAGE_SIZE)));
|
||||
static uintptr_t early_uart_pmd[PTRS_PER_PMD] __attribute__((aligned(PAGE_SIZE)));
|
||||
static uintptr_t early_pmd_free[((PHY_USER_FREEMEM_BASE - PHY_MEM_BASE) >> PGDIR_SHIFT) + 1][PTRS_PER_PMD] __attribute__((aligned(PAGE_SIZE)));
|
||||
static uintptr_t early_pmd_inear_map[PTRS_PER_PMD] __attribute__((aligned(PAGE_SIZE)));
|
||||
static uintptr_t early_plic_pmd[PTRS_PER_PMD] __attribute__((aligned(PAGE_SIZE)));
|
||||
|
||||
|
||||
|
||||
static uintptr_t *get_pmd_virt_early(phys_addr_t pa)
|
||||
{
|
||||
/* Before MMU is enabled */
|
||||
|
|
@ -185,7 +217,7 @@ void setup_vm_early(void)
|
|||
kernel_map.phys_addr = (uintptr_t)(&_start);
|
||||
kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr;
|
||||
|
||||
kernel_map.va_pa_offset = PAGE_OFFSET - kernel_map.phys_addr;
|
||||
kernel_map.va_pa_offset = KERN_OFFSET - kernel_map.phys_addr;
|
||||
kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr;
|
||||
|
||||
/* Setup trampoline PGD and PMD */
|
||||
|
|
|
|||
Loading…
Reference in New Issue