forked from xuos/xiuos
update rt-thread bsp(xidatong riscv）and webnet from Tian_chunyu
it is OK
This commit is contained in:
xuedongliang
commit
c6bef5fbec
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|
@ -19,3 +19,6 @@
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|||
[submodule "APP_Framework/Applications/webnet/WebNet_XiUOS"]
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path = APP_Framework/Applications/webnet/WebNet_XiUOS
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url = https://gitlink.org.cn/xuos/WebNet_XiUOS.git
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[submodule "Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/xidatong-riscv64/kendryte-sdk/kendryte-sdk-source"]
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path = Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/xidatong-riscv64/kendryte-sdk/kendryte-sdk-source
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url = https://code.gitlink.org.cn/chunyexixiaoyu/kendryte-sdk-source.git
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|
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@ -1 +1 @@
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Subproject commit d7ac9f271158d1f8ed1ebaddcb8c2ce4b0927d19
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Subproject commit 956eafa24bb65f5bb84d293ab35bf27084473edf
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@ -5,6 +5,6 @@ cwd = GetCurrentDir()
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src = Glob('*.c')
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group = DefineGroup('yolov2_json', src, depend = ['LIB_USING_CJSON'], CPPPATH = [cwd])
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group = DefineGroup('yolov2_json', src, depend = ['LIB_USING_CJSON'] + ['USING_YOLOV2'], CPPPATH = [cwd])
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Return('group')
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@ -111,6 +111,36 @@ uint32_t PrivGetTickTime()
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/*********************fs**************************/
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/*********************message queue***********************************/
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mqd_t PrivMqueueOpen(const char *name, int oflag)
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{
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return mq_open(name, oflag);
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}
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mqd_t PrivMqueueCreate(const char *name, int oflag, mode_t mode,struct mq_attr *attr)
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{
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return mq_open(name, oflag,mode,attr);
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}
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int PrivMqueueSend(mqd_t mqdes, const char *msg_ptr, size_t msg_len, unsigned msg_prio)
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{
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return mq_send(mqdes,msg_ptr,msg_len, msg_prio);
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}
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int PrivMqueueUnlink(const char *name)
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{
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return mq_unlink(name);
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}
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int PrivMqueueClose(mqd_t mqdes)
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{
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return mq_close(mqdes);
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}
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ssize_t PrivMqueueReceive(mqd_t mqdes, char *msg_ptr, size_t msg_len, unsigned *msg_prio)
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{
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return mq_receive(mqdes, msg_ptr,msg_len, msg_prio);
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}
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/************************Driver Posix Transform***********************/
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int PrivOpen(const char *path, int flags)
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{
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@ -32,6 +32,8 @@
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#include <pthread.h>
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#include <pthread_internal.h>
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#include <semaphore.h>
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#include <sys/signal.h>
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#include <mqueue.h>
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#include <sched.h>
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#include <unistd.h>
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#include <dfs_poll.h>
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@ -56,12 +58,15 @@
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#include <dmac.h>
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#include <dmalock.h>
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#endif
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#include <netdev_ipaddr.h>
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#include <netdev.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef _STDBOOL_H
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typedef signed char bool;
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#endif
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typedef signed char int8;
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typedef signed short int16;
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typedef signed int int32;
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@ -87,10 +92,10 @@ typedef unsigned long long uint64;
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#define GPIO_HIGH 0x01
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#define GPIO_CFG_OUTPUT 0x00
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#define GPIO_CFG_INPUT 0x01
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#define GPIO_CFG_INPUT_PULLUP 0x02
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#define GPIO_CFG_INPUT_PULLDOWN 0x03
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#define GPIO_CFG_OUTPUT_OD 0x04
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#define GPIO_CFG_INPUT 0x01
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#define GPIO_CFG_INPUT_PULLUP 0x02
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#define GPIO_CFG_INPUT_PULLDOWN 0x03
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#define GPIO_CFG_OUTPUT_OD 0x04
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#define GPIO_CONFIG_MODE 0xffffffff
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#ifndef SERIAL_RB_BUFSZ
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@ -186,6 +191,14 @@ void PrivTaskQuit(void *value_ptr);
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int PrivTaskDelay(int32_t ms);
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uint32_t PrivGetTickTime();
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/****************message queue***********************/
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mqd_t PrivMqueueOpen(const char *name, int oflag);
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mqd_t PrivMqueueCreate(const char *name, int oflag, mode_t mode,struct mq_attr *attr);
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int PrivMqueueSend(mqd_t mqdes, const char *msg_ptr, size_t msg_len, unsigned msg_prio);
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int PrivMqueueUnlink(const char *name);
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int PrivMqueueClose(mqd_t mqdes);
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ssize_t PrivMqueueReceive(mqd_t mqdes, char *msg_ptr, size_t msg_len, unsigned *msg_prio);
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/*********************driver*************************/
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int PrivOpen(const char *path, int flags);
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|
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@ -81,37 +81,23 @@
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## 编译说明
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编译K210，需要有RT-Thread的代码，因为K210的sdk是以软件包方式，所以需要在bsp/k210下做软件包更新。Windows下推进使用[env工具][1]，然后在console下进入bsp/k210目录中，运行：
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cd bsp/k210
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pkgs --update
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如果在Linux平台下，可以先执行
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scons --menuconfig
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它会自动下载env相关脚本到~/.env目录，然后执行
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source ~/.env/env.sh
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先下载源码，进入xiuos根目录：
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cd bsp/k210
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pkgs --update
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git submodule init
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git submodule update Ubiquitous/RT-Thread_Fusion_XiUOS/rt-thread
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git submodule update Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/k210/kendryte-sdk/kendryte-sdk-source
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下载好相应的源码以及勘智官方K210 sdk到指定目录
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下载risc-v的工具链，[下载地址](https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases)
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更新完软件包后，在`rtconfig.py`中将risc-v工具链的本地路径加入文档。
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注：
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1. 工具链建议使用上方提供的，`kendryte的官方工具链`会报浮点类型不兼容的错误，`risc-v工具链8.2.0之前的版本`会出现头文件不兼容的问题。
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||||
2. 网上传需要开启C++ 17,认为k210的神经网络编译器nncase多数语法由C++ 17,故需要开启C++ 17。个人认为没有必要，nncase是在PC端独立使用的，
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作用是将神经网络模型转为kmodel格式，此格式文件为已经编译的二进制文件.
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在`rtconfig.py`中将risc-v工具链的本地路径加入文档。
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然后执行scons编译：
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set RTT_EXEC_PATH=your_toolchains
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scons
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来编译这个板级支持包。如果编译正确无误，会产生rtthread.elf、rtthread.bin文件。其中rtthread.bin需要烧写到设备中进行运行。
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注：如果初次使用编译报错，可能是使用的SDK过老，使用`menuconfig`命令，在→ RT-Thread online packages → peripheral libraries
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and drivers → the kendryte-sdk package for rt-thread中将SDK改为latest版本即可。
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也可以利用env工具编译，指定工具链路径
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set RTT_EXEC_PATH=D:\xpack-riscv-none-embed-gcc-8.2.0-3.1-win32-x64\xPack\RISC-V Embedded GCC\8.2.0-3.1\bin
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scons
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@ -149,7 +149,7 @@ CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
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CONFIG_RT_DFS_ELM_REENTRANT=y
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CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000
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CONFIG_RT_USING_DFS_DEVFS=y
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CONFIG_RT_USING_DFS_ROMFS=y
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# CONFIG_RT_USING_DFS_ROMFS is not set
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# CONFIG_RT_USING_DFS_RAMFS is not set
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# CONFIG_RT_USING_DFS_NFS is not set
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@ -284,7 +284,7 @@ CONFIG_RT_LWIP_TCP_SND_BUF=8196
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CONFIG_RT_LWIP_TCP_WND=8196
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CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=10
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CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=8
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CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=1024
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CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=4096
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# CONFIG_LWIP_NO_RX_THREAD is not set
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# CONFIG_LWIP_NO_TX_THREAD is not set
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CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
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@ -359,6 +359,8 @@ CONFIG_BSP_USING_SDIO=y
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#
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CONFIG_BSP_USING_SDRAM=y
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CONFIG_BSP_USING_SDCARD=y
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||||
# CONFIG_BSP_USB0_HOST is not set
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||||
# CONFIG_BSP_USB1_HOST is not set
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CONFIG_BSP_USING_ETH=y
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CONFIG_BSP_USING_PHY=y
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CONFIG_PHY_DEVICE_ADDRESS=0
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@ -438,14 +440,34 @@ CONFIG_MAIN_KTASK_STACK_SIZE=1024
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#
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# CONFIG_APPLICATION_SENSOR is not set
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# CONFIG_USING_EMBEDDED_DATABASE_APP is not set
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# CONFIG_APP_USING_WEBNET is not set
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CONFIG_APP_USING_WEBNET=y
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CONFIG_PKG_WEBNET_PATH="/packages/iot/webnet"
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CONFIG_WEBNET_PORT=80
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CONFIG_WEBNET_CONN_MAX=16
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CONFIG_WEBNET_ROOT="/webnet"
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#
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# Select supported modules
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#
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CONFIG_WEBNET_USING_LOG=y
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CONFIG_WEBNET_USING_AUTH=y
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CONFIG_WEBNET_USING_CGI=y
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CONFIG_WEBNET_USING_ASP=y
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CONFIG_WEBNET_USING_SSI=y
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CONFIG_WEBNET_USING_INDEX=y
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CONFIG_WEBNET_USING_ALIAS=y
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# CONFIG_WEBNET_USING_DAV is not set
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CONFIG_WEBNET_USING_UPLOAD=y
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# CONFIG_WEBNET_USING_GZIP is not set
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CONFIG_WEBNET_CACHE_LEVEL=0
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CONFIG_WEBNET_USING_SAMPLES=y
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#
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# lib
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#
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CONFIG_APP_SELECT_NEWLIB=y
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# CONFIG_APP_SELECT_OTHER_LIB is not set
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# CONFIG_LIB_USING_CJSON is not set
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CONFIG_LIB_USING_CJSON=y
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||||
# CONFIG_LIB_USING_QUEUE is not set
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||||
# CONFIG_LIB_LV is not set
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|
|
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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@ -101,7 +101,6 @@
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#define RT_DFS_ELM_REENTRANT
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#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
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#define RT_USING_DFS_DEVFS
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||||
#define RT_USING_DFS_ROMFS
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||||
|
||||
/* Device Drivers */
|
||||
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||||
|
|
@ -189,7 +188,7 @@
|
|||
#define RT_LWIP_TCP_WND 8196
|
||||
#define RT_LWIP_TCPTHREAD_PRIORITY 10
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||||
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
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||||
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
|
||||
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
|
||||
#define RT_LWIP_ETHTHREAD_PRIORITY 12
|
||||
#define RT_LWIP_ETHTHREAD_STACKSIZE 1024
|
||||
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
|
||||
|
|
@ -276,10 +275,28 @@
|
|||
|
||||
/* sensor app */
|
||||
|
||||
#define APP_USING_WEBNET
|
||||
#define WEBNET_PORT 80
|
||||
#define WEBNET_CONN_MAX 16
|
||||
#define WEBNET_ROOT "/webnet"
|
||||
|
||||
/* Select supported modules */
|
||||
|
||||
#define WEBNET_USING_LOG
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||||
#define WEBNET_USING_AUTH
|
||||
#define WEBNET_USING_CGI
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||||
#define WEBNET_USING_ASP
|
||||
#define WEBNET_USING_SSI
|
||||
#define WEBNET_USING_INDEX
|
||||
#define WEBNET_USING_ALIAS
|
||||
#define WEBNET_USING_UPLOAD
|
||||
#define WEBNET_CACHE_LEVEL 0
|
||||
#define WEBNET_USING_SAMPLES
|
||||
|
||||
/* lib */
|
||||
|
||||
#define APP_SELECT_NEWLIB
|
||||
#define LIB_USING_CJSON
|
||||
|
||||
/* LVGL configuration */
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,410 @@
|
|||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# XIUOS Rt-thread Configuration
|
||||
#
|
||||
CONFIG_ROOT_DIR="../../../.."
|
||||
CONFIG_BSP_DIR="."
|
||||
CONFIG_RT_Thread_DIR="../.."
|
||||
CONFIG_RTT_DIR="../../rt-thread"
|
||||
CONFIG_BOARD_K210_EVB=y
|
||||
|
||||
#
|
||||
# RT-Thread Kernel
|
||||
#
|
||||
CONFIG_RT_NAME_MAX=8
|
||||
# CONFIG_RT_USING_BIG_ENDIAN is not set
|
||||
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
|
||||
CONFIG_RT_USING_SMP=y
|
||||
CONFIG_RT_CPUS_NR=2
|
||||
CONFIG_RT_ALIGN_SIZE=8
|
||||
# CONFIG_RT_THREAD_PRIORITY_8 is not set
|
||||
CONFIG_RT_THREAD_PRIORITY_32=y
|
||||
# CONFIG_RT_THREAD_PRIORITY_256 is not set
|
||||
CONFIG_RT_THREAD_PRIORITY_MAX=32
|
||||
CONFIG_RT_TICK_PER_SECOND=100
|
||||
CONFIG_RT_USING_OVERFLOW_CHECK=y
|
||||
CONFIG_RT_USING_HOOK=y
|
||||
CONFIG_RT_USING_IDLE_HOOK=y
|
||||
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
|
||||
CONFIG_IDLE_THREAD_STACK_SIZE=4096
|
||||
CONFIG_SYSTEM_THREAD_STACK_SIZE=4096
|
||||
# CONFIG_RT_USING_TIMER_SOFT is not set
|
||||
|
||||
#
|
||||
# kservice optimization
|
||||
#
|
||||
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
|
||||
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
|
||||
# CONFIG_RT_USING_ASM_MEMCPY is not set
|
||||
CONFIG_RT_DEBUG=y
|
||||
CONFIG_RT_DEBUG_COLOR=y
|
||||
CONFIG_RT_DEBUG_INIT_CONFIG=y
|
||||
CONFIG_RT_DEBUG_INIT=1
|
||||
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
|
||||
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
|
||||
|
||||
#
|
||||
# Inter-Thread communication
|
||||
#
|
||||
CONFIG_RT_USING_SEMAPHORE=y
|
||||
CONFIG_RT_USING_MUTEX=y
|
||||
CONFIG_RT_USING_EVENT=y
|
||||
CONFIG_RT_USING_MAILBOX=y
|
||||
CONFIG_RT_USING_MESSAGEQUEUE=y
|
||||
CONFIG_RT_USING_SIGNALS=y
|
||||
|
||||
#
|
||||
# Memory Management
|
||||
#
|
||||
CONFIG_RT_USING_MEMPOOL=y
|
||||
CONFIG_RT_USING_MEMHEAP=y
|
||||
# CONFIG_RT_USING_NOHEAP is not set
|
||||
# CONFIG_RT_USING_SMALL_MEM is not set
|
||||
CONFIG_RT_USING_SLAB=y
|
||||
# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
|
||||
# CONFIG_RT_USING_USERHEAP is not set
|
||||
# CONFIG_RT_USING_MEMTRACE is not set
|
||||
CONFIG_RT_USING_HEAP=y
|
||||
|
||||
#
|
||||
# Kernel Device Object
|
||||
#
|
||||
CONFIG_RT_USING_DEVICE=y
|
||||
# CONFIG_RT_USING_DEVICE_OPS is not set
|
||||
# CONFIG_RT_USING_INTERRUPT_INFO is not set
|
||||
CONFIG_RT_USING_CONSOLE=y
|
||||
CONFIG_RT_CONSOLEBUF_SIZE=128
|
||||
CONFIG_RT_CONSOLE_DEVICE_NAME="uarths"
|
||||
# CONFIG_RT_PRINTF_LONGLONG is not set
|
||||
CONFIG_RT_VER_NUM=0x40004
|
||||
CONFIG_ARCH_CPU_64BIT=y
|
||||
# CONFIG_RT_USING_CPU_FFS is not set
|
||||
CONFIG_ARCH_RISCV=y
|
||||
CONFIG_ARCH_RISCV_FPU=y
|
||||
CONFIG_ARCH_RISCV_FPU_S=y
|
||||
CONFIG_ARCH_RISCV64=y
|
||||
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
|
||||
|
||||
#
|
||||
# RT-Thread Components
|
||||
#
|
||||
CONFIG_RT_USING_COMPONENTS_INIT=y
|
||||
CONFIG_RT_USING_USER_MAIN=y
|
||||
CONFIG_RT_MAIN_THREAD_STACK_SIZE=8192
|
||||
CONFIG_RT_MAIN_THREAD_PRIORITY=10
|
||||
|
||||
#
|
||||
# C++ features
|
||||
#
|
||||
CONFIG_RT_USING_CPLUSPLUS=y
|
||||
# CONFIG_RT_USING_CPLUSPLUS11 is not set
|
||||
|
||||
#
|
||||
# Command shell
|
||||
#
|
||||
CONFIG_RT_USING_FINSH=y
|
||||
CONFIG_RT_USING_MSH=y
|
||||
CONFIG_FINSH_USING_MSH=y
|
||||
CONFIG_FINSH_THREAD_NAME="tshell"
|
||||
CONFIG_FINSH_THREAD_PRIORITY=20
|
||||
CONFIG_FINSH_THREAD_STACK_SIZE=16384
|
||||
CONFIG_FINSH_USING_HISTORY=y
|
||||
CONFIG_FINSH_HISTORY_LINES=5
|
||||
CONFIG_FINSH_USING_SYMTAB=y
|
||||
CONFIG_FINSH_CMD_SIZE=80
|
||||
CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
|
||||
CONFIG_FINSH_USING_DESCRIPTION=y
|
||||
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
|
||||
# CONFIG_FINSH_USING_AUTH is not set
|
||||
CONFIG_FINSH_ARG_MAX=10
|
||||
|
||||
#
|
||||
# Device virtual file system
|
||||
#
|
||||
CONFIG_RT_USING_DFS=y
|
||||
CONFIG_DFS_USING_WORKDIR=y
|
||||
CONFIG_DFS_FILESYSTEMS_MAX=16
|
||||
CONFIG_DFS_FILESYSTEM_TYPES_MAX=16
|
||||
CONFIG_DFS_FD_MAX=64
|
||||
# CONFIG_RT_USING_DFS_MNTTABLE is not set
|
||||
CONFIG_RT_USING_DFS_ELMFAT=y
|
||||
|
||||
#
|
||||
# elm-chan's FatFs, Generic FAT Filesystem Module
|
||||
#
|
||||
CONFIG_RT_DFS_ELM_CODE_PAGE=437
|
||||
CONFIG_RT_DFS_ELM_WORD_ACCESS=y
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
|
||||
CONFIG_RT_DFS_ELM_USE_LFN_3=y
|
||||
CONFIG_RT_DFS_ELM_USE_LFN=3
|
||||
CONFIG_RT_DFS_ELM_LFN_UNICODE_0=y
|
||||
# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set
|
||||
# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set
|
||||
# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set
|
||||
CONFIG_RT_DFS_ELM_LFN_UNICODE=0
|
||||
CONFIG_RT_DFS_ELM_MAX_LFN=255
|
||||
CONFIG_RT_DFS_ELM_DRIVES=2
|
||||
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096
|
||||
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
|
||||
CONFIG_RT_DFS_ELM_REENTRANT=y
|
||||
CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000
|
||||
CONFIG_RT_USING_DFS_DEVFS=y
|
||||
# CONFIG_RT_USING_DFS_ROMFS is not set
|
||||
# CONFIG_RT_USING_DFS_RAMFS is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
CONFIG_RT_USING_DEVICE_IPC=y
|
||||
CONFIG_RT_PIPE_BUFSZ=512
|
||||
CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
|
||||
CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048
|
||||
CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23
|
||||
CONFIG_RT_USING_SERIAL=y
|
||||
CONFIG_RT_USING_SERIAL_V1=y
|
||||
# CONFIG_RT_USING_SERIAL_V2 is not set
|
||||
CONFIG_RT_SERIAL_USING_DMA=y
|
||||
CONFIG_RT_SERIAL_RB_BUFSZ=64
|
||||
# CONFIG_RT_USING_CAN is not set
|
||||
# CONFIG_RT_USING_HWTIMER is not set
|
||||
# CONFIG_RT_USING_CPUTIME is not set
|
||||
# CONFIG_RT_USING_I2C is not set
|
||||
# CONFIG_RT_USING_PHY is not set
|
||||
CONFIG_RT_USING_PIN=y
|
||||
# CONFIG_RT_USING_ADC is not set
|
||||
# CONFIG_RT_USING_DAC is not set
|
||||
# CONFIG_RT_USING_PWM is not set
|
||||
# CONFIG_RT_USING_MTD_NOR is not set
|
||||
# CONFIG_RT_USING_MTD_NAND is not set
|
||||
# CONFIG_RT_USING_PM is not set
|
||||
# CONFIG_RT_USING_RTC is not set
|
||||
# CONFIG_RT_USING_SDIO is not set
|
||||
CONFIG_RT_USING_SPI=y
|
||||
# CONFIG_RT_USING_QSPI is not set
|
||||
# CONFIG_RT_USING_SPI_MSD is not set
|
||||
# CONFIG_RT_USING_SFUD is not set
|
||||
# CONFIG_RT_USING_ENC28J60 is not set
|
||||
# CONFIG_RT_USING_SPI_WIFI is not set
|
||||
# CONFIG_RT_USING_WDT is not set
|
||||
# CONFIG_RT_USING_AUDIO is not set
|
||||
# CONFIG_RT_USING_SENSOR is not set
|
||||
# CONFIG_RT_USING_TOUCH is not set
|
||||
# CONFIG_RT_USING_HWCRYPTO is not set
|
||||
# CONFIG_RT_USING_PULSE_ENCODER is not set
|
||||
# CONFIG_RT_USING_INPUT_CAPTURE is not set
|
||||
# CONFIG_RT_USING_WIFI is not set
|
||||
|
||||
#
|
||||
# Using USB
|
||||
#
|
||||
# CONFIG_RT_USING_USB_HOST is not set
|
||||
# CONFIG_RT_USING_USB_DEVICE is not set
|
||||
|
||||
#
|
||||
# POSIX layer and C standard library
|
||||
#
|
||||
CONFIG_RT_USING_LIBC=y
|
||||
CONFIG_RT_USING_PTHREADS=y
|
||||
CONFIG_PTHREAD_NUM_MAX=8
|
||||
CONFIG_RT_USING_POSIX=y
|
||||
# CONFIG_RT_USING_POSIX_MMAP is not set
|
||||
# CONFIG_RT_USING_POSIX_TERMIOS is not set
|
||||
# CONFIG_RT_USING_POSIX_GETLINE is not set
|
||||
# CONFIG_RT_USING_POSIX_AIO is not set
|
||||
CONFIG_RT_LIBC_USING_TIME=y
|
||||
# CONFIG_RT_USING_MODULE is not set
|
||||
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
|
||||
|
||||
#
|
||||
# Network
|
||||
#
|
||||
|
||||
#
|
||||
# Socket abstraction layer
|
||||
#
|
||||
# CONFIG_RT_USING_SAL is not set
|
||||
|
||||
#
|
||||
# Network interface device
|
||||
#
|
||||
# CONFIG_RT_USING_NETDEV is not set
|
||||
|
||||
#
|
||||
# light weight TCP/IP stack
|
||||
#
|
||||
# CONFIG_RT_USING_LWIP is not set
|
||||
|
||||
#
|
||||
# AT commands
|
||||
#
|
||||
# CONFIG_RT_USING_AT is not set
|
||||
|
||||
#
|
||||
# VBUS(Virtual Software BUS)
|
||||
#
|
||||
# CONFIG_RT_USING_VBUS is not set
|
||||
|
||||
#
|
||||
# Utilities
|
||||
#
|
||||
# CONFIG_RT_USING_RYM is not set
|
||||
# CONFIG_RT_USING_ULOG is not set
|
||||
# CONFIG_RT_USING_UTEST is not set
|
||||
# CONFIG_RT_USING_VAR_EXPORT is not set
|
||||
# CONFIG_RT_USING_RT_LINK is not set
|
||||
|
||||
#
|
||||
# RT-Thread Utestcases
|
||||
#
|
||||
# CONFIG_RT_USING_UTESTCASES is not set
|
||||
|
||||
#
|
||||
# Board Drivers Config
|
||||
#
|
||||
|
||||
#
|
||||
# On-chip Peripheral Drivers
|
||||
#
|
||||
CONFIG___STACKSIZE__=4096
|
||||
CONFIG_BSP_USING_UART_HS=y
|
||||
# CONFIG_BSP_USING_UART1 is not set
|
||||
# CONFIG_BSP_USING_UART2 is not set
|
||||
# CONFIG_BSP_USING_UART3 is not set
|
||||
# CONFIG_BSP_USING_I2C1 is not set
|
||||
# CONFIG_BSP_USING_SPI1 is not set
|
||||
|
||||
#
|
||||
# Onboard Peripheral Drivers
|
||||
#
|
||||
CONFIG_BSP_USING_LCD=y
|
||||
CONFIG_BSP_LCD_CS_PIN=41
|
||||
CONFIG_BSP_LCD_WR_PIN=38
|
||||
CONFIG_BSP_LCD_DC_PIN=39
|
||||
CONFIG_BSP_LCD_RST_PIN=37
|
||||
CONFIG_BSP_LCD_BACKLIGHT_PIN=-1
|
||||
CONFIG_BSP_LCD_BACKLIGHT_ACTIVE_LOW=y
|
||||
# CONFIG_BSP_LCD_BACKLIGHT_ACTIVE_HIGH is not set
|
||||
CONFIG_BSP_LCD_CLK_FREQ=15000000
|
||||
# CONFIG_BSP_BOARD_KD233 is not set
|
||||
CONFIG_BSP_BOARD_K210_OPENMV_TEST=y
|
||||
# CONFIG_BSP_BOARD_USER is not set
|
||||
CONFIG_BSP_LCD_X_MAX=480
|
||||
CONFIG_BSP_LCD_Y_MAX=272
|
||||
# CONFIG_BSP_USING_CH438 is not set
|
||||
|
||||
#
|
||||
# Kendryte SDK Config
|
||||
#
|
||||
CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
|
||||
|
||||
#
|
||||
# MicroPython
|
||||
#
|
||||
# CONFIG_PKG_USING_MICROPYTHON is not set
|
||||
|
||||
#
|
||||
# More Drivers
|
||||
#
|
||||
# CONFIG_PKG_USING_RW007 is not set
|
||||
# CONFIG_DRV_USING_OV2640 is not set
|
||||
# CONFIG_DRV_USING_HS300X is not set
|
||||
# CONFIG_DRV_USING_SX1278 is not set
|
||||
|
||||
#
|
||||
# APP_Framework
|
||||
#
|
||||
|
||||
#
|
||||
# Framework
|
||||
#
|
||||
CONFIG_TRANSFORM_LAYER_ATTRIUBUTE=y
|
||||
# CONFIG_ADD_XIZI_FETURES is not set
|
||||
# CONFIG_ADD_NUTTX_FETURES is not set
|
||||
CONFIG_ADD_RTTHREAD_FETURES=y
|
||||
# CONFIG_SUPPORT_SENSOR_FRAMEWORK is not set
|
||||
# CONFIG_SUPPORT_CONNECTION_FRAMEWORK is not set
|
||||
# CONFIG_SUPPORT_KNOWING_FRAMEWORK is not set
|
||||
# CONFIG_SUPPORT_CONTROL_FRAMEWORK is not set
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
# CONFIG_CRYPTO is not set
|
||||
|
||||
#
|
||||
# Applications
|
||||
#
|
||||
|
||||
#
|
||||
# config stack size and priority of main task
|
||||
#
|
||||
CONFIG_MAIN_KTASK_STACK_SIZE=1024
|
||||
|
||||
#
|
||||
# ota app
|
||||
#
|
||||
# CONFIG_APPLICATION_OTA is not set
|
||||
|
||||
#
|
||||
# test app
|
||||
#
|
||||
# CONFIG_USER_TEST is not set
|
||||
|
||||
#
|
||||
# connection app
|
||||
#
|
||||
# CONFIG_APPLICATION_CONNECTION is not set
|
||||
|
||||
#
|
||||
# control app
|
||||
#
|
||||
|
||||
#
|
||||
# knowing app
|
||||
#
|
||||
# CONFIG_APPLICATION_KNOWING is not set
|
||||
|
||||
#
|
||||
# sensor app
|
||||
#
|
||||
CONFIG_APPLICATION_SENSOR=y
|
||||
# CONFIG_APPLICATION_SENSOR_HCHO is not set
|
||||
# CONFIG_APPLICATION_SENSOR_TVOC is not set
|
||||
# CONFIG_APPLICATION_SENSOR_IAQ is not set
|
||||
# CONFIG_APPLICATION_SENSOR_CH4 is not set
|
||||
# CONFIG_APPLICATION_SENSOR_CO2 is not set
|
||||
# CONFIG_APPLICATION_SENSOR_PM1_0 is not set
|
||||
# CONFIG_APPLICATION_SENSOR_PM2_5 is not set
|
||||
# CONFIG_APPLICATION_SENSOR_PM10 is not set
|
||||
# CONFIG_APPLICATION_SENSOR_VOICE is not set
|
||||
# CONFIG_APPLICATION_SENSOR_TEMPERATURE is not set
|
||||
# CONFIG_APPLICATION_SENSOR_HUMIDITY is not set
|
||||
# CONFIG_APPLICATION_SENSOR_WINDDIRECTION is not set
|
||||
# CONFIG_APPLICATION_SENSOR_WINDSPEED is not set
|
||||
# CONFIG_APPLICATION_SENSOR_ALTITUDE is not set
|
||||
# CONFIG_USING_EMBEDDED_DATABASE_APP is not set
|
||||
# CONFIG_APP_USING_WEBNET is not set
|
||||
|
||||
#
|
||||
# lib
|
||||
#
|
||||
CONFIG_APP_SELECT_NEWLIB=y
|
||||
# CONFIG_APP_SELECT_OTHER_LIB is not set
|
||||
# CONFIG_LIB_USING_CJSON is not set
|
||||
# CONFIG_LIB_USING_QUEUE is not set
|
||||
# CONFIG_LIB_LV is not set
|
||||
|
||||
#
|
||||
# LVGL configuration
|
||||
#
|
||||
# CONFIG_LV_CONF_MINIMAL is not set
|
||||
# CONFIG_USING_EMBEDDED_DATABASE is not set
|
||||
|
|
@ -0,0 +1,228 @@
|
|||
# this
|
||||
*.old
|
||||
*.dblite
|
||||
cconfig.h
|
||||
*.bin
|
||||
*.map
|
||||
# rtconfig.h
|
||||
# .config
|
||||
|
||||
# General
|
||||
.DS_Store
|
||||
.AppleDouble
|
||||
.LSOverride
|
||||
|
||||
# Icon must end with two \r
|
||||
Icon
|
||||
|
||||
|
||||
# Thumbnails
|
||||
._*
|
||||
|
||||
# Files that might appear in the root of a volume
|
||||
.DocumentRevisions-V100
|
||||
.fseventsd
|
||||
.Spotlight-V100
|
||||
.TemporaryItems
|
||||
.Trashes
|
||||
.VolumeIcon.icns
|
||||
.com.apple.timemachine.donotpresent
|
||||
|
||||
# Directories potentially created on remote AFP share
|
||||
.AppleDB
|
||||
.AppleDesktop
|
||||
Network Trash Folder
|
||||
Temporary Items
|
||||
.apdisk
|
||||
|
||||
# Byte-compiled / optimized / DLL files
|
||||
__pycache__/
|
||||
*.py[cod]
|
||||
*$py.class
|
||||
|
||||
# C extensions
|
||||
*.so
|
||||
|
||||
# Distribution / packaging
|
||||
.Python
|
||||
build/
|
||||
develop-eggs/
|
||||
dist/
|
||||
downloads/
|
||||
eggs/
|
||||
.eggs/
|
||||
lib/
|
||||
lib64/
|
||||
parts/
|
||||
sdist/
|
||||
var/
|
||||
wheels/
|
||||
share/python-wheels/
|
||||
*.egg-info/
|
||||
.installed.cfg
|
||||
*.egg
|
||||
MANIFEST
|
||||
|
||||
# PyInstaller
|
||||
# Usually these files are written by a python script from a template
|
||||
# before PyInstaller builds the exe, so as to inject date/other infos into it.
|
||||
*.manifest
|
||||
*.spec
|
||||
|
||||
# Installer logs
|
||||
pip-log.txt
|
||||
pip-delete-this-directory.txt
|
||||
|
||||
# Unit test / coverage reports
|
||||
htmlcov/
|
||||
.tox/
|
||||
.nox/
|
||||
.coverage
|
||||
.coverage.*
|
||||
.cache
|
||||
nosetests.xml
|
||||
coverage.xml
|
||||
*.cover
|
||||
*.py,cover
|
||||
.hypothesis/
|
||||
.pytest_cache/
|
||||
cover/
|
||||
|
||||
# Translations
|
||||
*.mo
|
||||
*.pot
|
||||
|
||||
# Django stuff:
|
||||
*.log
|
||||
local_settings.py
|
||||
db.sqlite3
|
||||
db.sqlite3-journal
|
||||
|
||||
# Flask stuff:
|
||||
instance/
|
||||
.webassets-cache
|
||||
|
||||
# Scrapy stuff:
|
||||
.scrapy
|
||||
|
||||
# Sphinx documentation
|
||||
docs/_build/
|
||||
|
||||
# PyBuilder
|
||||
.pybuilder/
|
||||
target/
|
||||
|
||||
# Jupyter Notebook
|
||||
.ipynb_checkpoints
|
||||
|
||||
# IPython
|
||||
profile_default/
|
||||
ipython_config.py
|
||||
|
||||
# pyenv
|
||||
# For a library or package, you might want to ignore these files since the code is
|
||||
# intended to run in multiple environments; otherwise, check them in:
|
||||
# .python-version
|
||||
|
||||
# pipenv
|
||||
# According to pypa/pipenv#598, it is recommended to include Pipfile.lock in version control.
|
||||
# However, in case of collaboration, if having platform-specific dependencies or dependencies
|
||||
# having no cross-platform support, pipenv may install dependencies that don't work, or not
|
||||
# install all needed dependencies.
|
||||
#Pipfile.lock
|
||||
|
||||
# PEP 582; used by e.g. github.com/David-OConnor/pyflow
|
||||
__pypackages__/
|
||||
|
||||
# Celery stuff
|
||||
celerybeat-schedule
|
||||
celerybeat.pid
|
||||
|
||||
# SageMath parsed files
|
||||
*.sage.py
|
||||
|
||||
# Environments
|
||||
.env
|
||||
.venv
|
||||
env/
|
||||
venv/
|
||||
ENV/
|
||||
env.bak/
|
||||
venv.bak/
|
||||
|
||||
# Spyder project settings
|
||||
.spyderproject
|
||||
.spyproject
|
||||
|
||||
# Rope project settings
|
||||
.ropeproject
|
||||
|
||||
# mkdocs documentation
|
||||
/site
|
||||
|
||||
# mypy
|
||||
.mypy_cache/
|
||||
.dmypy.json
|
||||
dmypy.json
|
||||
|
||||
# Pyre type checker
|
||||
.pyre/
|
||||
|
||||
# pytype static type analyzer
|
||||
.pytype/
|
||||
|
||||
# Cython debug symbols
|
||||
cython_debug/
|
||||
|
||||
# Prerequisites
|
||||
*.d
|
||||
|
||||
# Object files
|
||||
*.o
|
||||
*.ko
|
||||
*.obj
|
||||
*.elf
|
||||
|
||||
# Linker output
|
||||
*.ilk
|
||||
*.map
|
||||
*.exp
|
||||
|
||||
# Precompiled Headers
|
||||
*.gch
|
||||
*.pch
|
||||
|
||||
# Libraries
|
||||
*.lib
|
||||
*.a
|
||||
*.la
|
||||
*.lo
|
||||
|
||||
# Shared objects (inc. Windows DLLs)
|
||||
*.dll
|
||||
*.so
|
||||
*.so.*
|
||||
*.dylib
|
||||
|
||||
# Executables
|
||||
*.exe
|
||||
*.out
|
||||
*.app
|
||||
*.i*86
|
||||
*.x86_64
|
||||
*.hex
|
||||
|
||||
# Debug files
|
||||
*.dSYM/
|
||||
*.su
|
||||
*.idb
|
||||
*.pdb
|
||||
|
||||
# Kernel Module Compile Results
|
||||
*.mod*
|
||||
*.cmd
|
||||
.tmp_versions/
|
||||
modules.order
|
||||
Module.symvers
|
||||
Mkfile.old
|
||||
dkms.con
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
mainmenu "XIUOS Rt-thread Configuration"
|
||||
|
||||
config ROOT_DIR
|
||||
string
|
||||
default "../../../.."
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
default "."
|
||||
|
||||
config RT_Thread_DIR
|
||||
string
|
||||
default "../.."
|
||||
|
||||
config RTT_DIR
|
||||
string
|
||||
default "../../rt-thread"
|
||||
|
||||
config BOARD_K210_EVB
|
||||
bool
|
||||
select ARCH_RISCV64
|
||||
select ARCH_RISCV_FPU_S
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
config APP_DIR
|
||||
string
|
||||
default "../../../../APP_Framework"
|
||||
|
||||
source "$RTT_DIR/Kconfig"
|
||||
source "base-drivers/Kconfig"
|
||||
source "kendryte-sdk/Kconfig"
|
||||
source "$RT_Thread_DIR/micropython/Kconfig"
|
||||
source "$RT_Thread_DIR/app_match_rt-thread/Kconfig"
|
||||
source "$ROOT_DIR/APP_Framework/Kconfig"
|
||||
|
||||
|
|
@ -0,0 +1,70 @@
|
|||
# 矽达通-RISCV智能盒子说明
|
||||
|
||||
|
||||
|
||||
| 功能 | **引脚序号**<br />（并非原理图连接线序号） | 引脚定义 |
|
||||
| :-------------------: | :----------------------------------------: | :------------: |
|
||||
| 高速串口作为shell | 5 | ISP_RX |
|
||||
| | 6 | ISP_TX |
|
||||
| W5500 | 9 | SPI1_ENET_SCLK |
|
||||
| | 10 | SPI1_ENET_MISO |
|
||||
| | 11 | SPI1_ENET_MOSI |
|
||||
| | 12 | SPI1_ENET_nCS |
|
||||
| | 13 | SPI1_ENET_nRST |
|
||||
| | 14 | ENET_nINT |
|
||||
| LCD-043MCU-TP touch | 15 | I2C_SDA |
|
||||
| | 16 | |
|
||||
| | 17 | I2C_SCL |
|
||||
| can模块 | 18 | UART1_RXD |
|
||||
| | 19 | UART1_TXD |
|
||||
| 4G模块 | 20 | UART2_TXD |
|
||||
| | 21 | UART2_RXD |
|
||||
| CH376 = USB + TF | 22 | UART3_TXD |
|
||||
| | 23 | UART3_RXD |
|
||||
| CH438 | 24 | CH438_ALE |
|
||||
| | 25 | CH438_NWR |
|
||||
| | 26 | CH438_NRD |
|
||||
| | 27 | CH438_D0 |
|
||||
| | 28 | CH438_D1 |
|
||||
| | 29 | CH438_D2 |
|
||||
| | 30 | CH438_D3 |
|
||||
| | 31 | CH438_D4 |
|
||||
| | 32 | CH438_D5 |
|
||||
| | 33 | CH438_D6 |
|
||||
| | 34 | CH438_D7 |
|
||||
| | 35 | CH438_INT |
|
||||
| | 36 | pTP_INT |
|
||||
| | 37 | LCD_nRST |
|
||||
| | 38 | LCD_SCLK |
|
||||
| | 39 | LCD_MOSI |
|
||||
| | 40 | LCD_MISO |
|
||||
| | 41 | LCD_nCS |
|
||||
| | 43 | CAN_nCFG |
|
||||
| | 44 | E220_M0 |
|
||||
| | 45 | E220_M1 |
|
||||
| | 46 | E18_MODE |
|
||||
| | 47 | LCD_BL |
|
||||
|
||||
其中CH438 = ZIGBEE + LORA + BT + 3X*UART + 2X*485
|
||||
|
||||
## 编译说明
|
||||
先下载源码，进入xiuos根目录：
|
||||
|
||||
git submodule init
|
||||
git submodule update Ubiquitous/RT-Thread_Fusion_XiUOS/rt-thread
|
||||
git submodule update Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/xidatong-riscv64/kendryte-sdk/kendryte-sdk-source
|
||||
下载好相应的源码以及勘智官方K210 sdk到指定目录
|
||||
|
||||
下载risc-v的工具链，[下载地址](https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases)
|
||||
|
||||
在`rtconfig.py`中将risc-v工具链的本地路径加入文档。
|
||||
|
||||
然后执行scons编译：
|
||||
scons
|
||||
|
||||
也可以利用env工具编译，指定工具链路径
|
||||
|
||||
set RTT_EXEC_PATH=D:\xpack-riscv-none-embed-gcc-8.2.0-3.1-win32-x64\xPack\RISC-V Embedded GCC\8.2.0-3.1\bin
|
||||
|
||||
scons
|
||||
|
||||
|
|
@ -0,0 +1,13 @@
|
|||
import os
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
|
|
@ -0,0 +1,69 @@
|
|||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../rt-thread')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
from building import *
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
# use ASPPCOM to replace ASCOM, ASPPCOM will use CFLAGS/CPPFLAGS with AS
|
||||
env['ASCOM'] = env['ASPPCOM']
|
||||
|
||||
AddOption('--compiledb',
|
||||
dest = 'compiledb',
|
||||
action = 'store_true',
|
||||
default = False,
|
||||
help = 'generate compile_commands.json')
|
||||
|
||||
if GetOption('compiledb'):
|
||||
if int(SCons.__version__.split('.')[0]) >= 4:
|
||||
env['COMPILATIONDB_USE_ABSPATH'] = True
|
||||
env.Tool('compilation_db')
|
||||
env.CompilationDatabase('compile_commands.json')
|
||||
else:
|
||||
print('Warning: --compiledb only support on SCons 4.0+')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False)
|
||||
|
||||
stack_size = 4096
|
||||
|
||||
stack_lds = open('link_stacksize.lds', 'w')
|
||||
if GetDepend('__STACKSIZE__'): stack_size = GetDepend('__STACKSIZE__')
|
||||
stack_lds.write('__STACKSIZE__ = %d;' % stack_size)
|
||||
stack_lds.close()
|
||||
|
||||
# include more drivers
|
||||
objs.extend(SConscript(os.getcwd() + '/../../app_match_rt-thread/SConscript'))
|
||||
|
||||
# include APP_Framework/Framework
|
||||
objs.extend(SConscript(os.getcwd() + '/../../../../APP_Framework/Framework/SConscript'))
|
||||
|
||||
# include APP_Framework/Applications
|
||||
objs.extend(SConscript(os.getcwd() + '/../../../../APP_Framework/Applications/SConscript'))
|
||||
|
||||
# include APP_Framework/lib
|
||||
objs.extend(SConscript(os.getcwd() + '/../../../../APP_Framework/lib/SConscript'))
|
||||
|
||||
# include Ubiquitous/RT-Thread/micropython
|
||||
objs.extend(SConscript(os.getcwd() + '/../../micropython/SConscript'))
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c') + Glob('*.cpp')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
|
|
@ -0,0 +1,100 @@
|
|||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include "drv_lcd.h"
|
||||
|
||||
static void drawarea(rt_device_t dev, struct rt_device_graphic_info *info,
|
||||
int x, int y, int w, int h, uint16_t c)
|
||||
{
|
||||
struct rt_device_rect_info rect;
|
||||
uint16_t *fb;
|
||||
int i, j;
|
||||
|
||||
fb = (uint16_t *)info->framebuffer;
|
||||
fb += (info->width * y);
|
||||
fb += x;
|
||||
|
||||
for (j = 0; j < h; j++)
|
||||
{
|
||||
for (i = 0; i < w; i++)
|
||||
{
|
||||
fb[i] = c;
|
||||
}
|
||||
fb += info->width;
|
||||
}
|
||||
|
||||
rect.x = x;
|
||||
rect.y = y;
|
||||
rect.width = w;
|
||||
rect.height = h;
|
||||
|
||||
rt_device_control(dev, RTGRAPHIC_CTRL_RECT_UPDATE, &rect);
|
||||
}
|
||||
#define RGB_BUF_SIZE (320*240*2)
|
||||
static int showcolor(int argc, char **argv)
|
||||
{
|
||||
unsigned char r = 0, g = 0, b = 0;
|
||||
char *devname = "lcd";
|
||||
rt_device_t dev;
|
||||
struct rt_device_graphic_info info;
|
||||
int result;
|
||||
int x = 0, y = 0;
|
||||
int i;
|
||||
uint16_t c;
|
||||
|
||||
for (i = 1; i < argc; i++)
|
||||
{
|
||||
switch (i)
|
||||
{
|
||||
case 1:
|
||||
r = atoi(argv[i]);
|
||||
break;
|
||||
case 2:
|
||||
g = atoi(argv[i]);
|
||||
break;
|
||||
case 3:
|
||||
b = atoi(argv[i]);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
dev = rt_device_find(devname);
|
||||
if (!dev)
|
||||
{
|
||||
rt_kprintf("lcd: %s not found\n", devname);
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (rt_device_open(dev, 0) != 0)
|
||||
{
|
||||
rt_kprintf("lcd open fail\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
result = rt_device_control(dev, RTGRAPHIC_CTRL_GET_INFO, &info);
|
||||
if (result != RT_EOK)
|
||||
{
|
||||
rt_kprintf("get device information failed\n");
|
||||
return result;
|
||||
}
|
||||
|
||||
c = (uint16_t)(((r >> 3) << 11) | ((g >> 2) << 6) | ((b >> 3)));
|
||||
drawarea(dev, &info, x, y, 24, 24, c);
|
||||
|
||||
lcd_set_color(BLACK, BLUE);
|
||||
lcd_show_string(0, 40, 16, "hello world");
|
||||
lcd_show_string(0, 60, 24, "hello world");
|
||||
lcd_show_string(0, 90, 32, "hello world");
|
||||
lcd_draw_line(0, 200, 319, 200);
|
||||
lcd_draw_circle(270, 120, 30);
|
||||
|
||||
lcd_set_color(BLACK, RED);
|
||||
lcd_show_string(0, 130, 32, "after set color");
|
||||
lcd_draw_line(0, 0, 319, 239);
|
||||
lcd_draw_rectangle(50, 10, 170, 145);
|
||||
lcd_draw_circle(160, 120, 50);
|
||||
rt_device_close(dev);
|
||||
return 0;
|
||||
}
|
||||
MSH_CMD_EXPORT(showcolor, showcolor R G B-- R / G / B : 0 ~255);
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
/*
|
||||
* @Author: your name
|
||||
* @Date: 2021-10-11 22:04:25
|
||||
* @LastEditTime: 2021-10-14 11:12:52
|
||||
* @LastEditors: Please set LastEditors
|
||||
* @Description: In User Settings Edit
|
||||
* @FilePath: \xiuos\Ubiquitous\RT_Thread\bsp\k210\applications\main.c
|
||||
*/
|
||||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <stdio.h>
|
||||
#define LED_G 12
|
||||
|
||||
int main(void)
|
||||
{
|
||||
rt_pin_mode(LED_G, PIN_MODE_OUTPUT);
|
||||
rt_thread_mdelay(100);
|
||||
char info1[25] ={0};
|
||||
char info2[25] ={0};
|
||||
sprintf(info1,"xuos-intelligence k210 ");
|
||||
sprintf(info2,"build %s %s",__DATE__,__TIME__);
|
||||
printf("%s %s \n",info1,info2);
|
||||
#ifdef BSP_USING_LCD
|
||||
#include<drv_lcd.h>
|
||||
lcd_show_string(0,60,24,info1);
|
||||
lcd_show_string(0,90,24,info2);
|
||||
#endif
|
||||
while(1)
|
||||
{
|
||||
rt_pin_write(LED_G, PIN_HIGH);
|
||||
rt_thread_mdelay(500);
|
||||
rt_pin_write(LED_G, PIN_LOW);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,224 @@
|
|||
menu "Board Drivers Config"
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
config BSP_USING_UART_HS
|
||||
bool "Enable High Speed UART"
|
||||
default n
|
||||
menuconfig BSP_USING_UART1
|
||||
bool "Enable UART1"
|
||||
default n
|
||||
if BSP_USING_UART1
|
||||
config BSP_UART1_TXD_PIN
|
||||
int "uart1 TXD pin number"
|
||||
default 19
|
||||
config BSP_UART1_RXD_PIN
|
||||
int "uart1 RXD pin number"
|
||||
default 18
|
||||
config BSP_UART1_RTS_PIN
|
||||
int "uart1 RTS pin number (-1 for not used)"
|
||||
default -1
|
||||
config BSP_UART1_CTS_PIN
|
||||
int "uart1 CTS pin number (-1 for not used)"
|
||||
default -1
|
||||
endif
|
||||
menuconfig BSP_USING_UART2
|
||||
bool "Enable UART2"
|
||||
default n
|
||||
if BSP_USING_UART2
|
||||
config BSP_UART2_TXD_PIN
|
||||
int "uart2 TXD pin number"
|
||||
default 20
|
||||
config BSP_UART2_RXD_PIN
|
||||
int "uart2 RXD pin number"
|
||||
default 21
|
||||
config BSP_UART2_RTS_PIN
|
||||
int "uart2 RTS pin number (-1 for not used)"
|
||||
default -1
|
||||
config BSP_UART2_CTS_PIN
|
||||
int "uart2 CTS pin number (-1 for not used)"
|
||||
default -1
|
||||
endif
|
||||
menuconfig BSP_USING_UART3
|
||||
bool "Enable UART3"
|
||||
default n
|
||||
if BSP_USING_UART3
|
||||
config BSP_UART3_TXD_PIN
|
||||
int "uart3 TXD pin number"
|
||||
default 22
|
||||
config BSP_UART3_RXD_PIN
|
||||
int "uart3 RXD pin number"
|
||||
default 23
|
||||
config BSP_UART3_RTS_PIN
|
||||
int "uart3 RTS pin number (-1 for not used)"
|
||||
default -1
|
||||
config BSP_UART3_CTS_PIN
|
||||
int "uart3 CTS pin number (-1 for not used)"
|
||||
default -1
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C1
|
||||
bool "Enable I2C1"
|
||||
select RT_USING_I2C
|
||||
default n
|
||||
if BSP_USING_I2C11
|
||||
config BSP_I2C1_SDA_PIN
|
||||
int "I2C1 sda pin number"
|
||||
default 15
|
||||
config BSP_I2C1_CLK_PIN
|
||||
int "I2C1 clk pin number"
|
||||
default 17
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI1
|
||||
bool "Enable SPI1"
|
||||
select RT_USING_SPI
|
||||
default n
|
||||
if BSP_USING_SPI1
|
||||
config BSP_SPI1_CLK_PIN
|
||||
int "spi1 clk pin number"
|
||||
default 9
|
||||
config BSP_SPI1_D0_PIN
|
||||
int "spi1 d0 pin number"
|
||||
default 11
|
||||
config BSP_SPI1_D1_PIN
|
||||
int "spi1 d1 pin number"
|
||||
default 10
|
||||
menuconfig BSP_SPI1_USING_SS0
|
||||
bool "SPI1 Enable SS0(spi10 dev)"
|
||||
default n
|
||||
if BSP_SPI1_USING_SS0
|
||||
config BSP_SPI1_SS0_PIN
|
||||
int "spi1 ss0 pin number"
|
||||
default 12
|
||||
endif
|
||||
menuconfig BSP_SPI1_USING_SS1
|
||||
bool "SPI1 Enable SS1(spi11 dev)"
|
||||
default n
|
||||
if BSP_SPI1_USING_SS1
|
||||
config BSP_SPI1_SS1_PIN
|
||||
int "spi1 ss1 pin number"
|
||||
default 8
|
||||
endif
|
||||
menuconfig BSP_SPI1_USING_SS2
|
||||
bool "SPI1 Enable SS2(spi12 dev)"
|
||||
default n
|
||||
if BSP_SPI1_USING_SS2
|
||||
config BSP_SPI1_SS2_PIN
|
||||
int "spi1 ss2 pin number"
|
||||
default 26
|
||||
endif
|
||||
menuconfig BSP_SPI1_USING_SS3
|
||||
bool "SPI1 Enable SS3(spi13 dev)"
|
||||
default n
|
||||
if BSP_SPI1_USING_SS3
|
||||
config BSP_SPI1_SS3_PIN
|
||||
int "spi1 ss3 pin number"
|
||||
default 27
|
||||
endif
|
||||
endif
|
||||
endmenu
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
menuconfig BSP_USING_LCD
|
||||
bool "Enable LCD on SPI0"
|
||||
default n
|
||||
if BSP_USING_LCD
|
||||
config BSP_LCD_CS_PIN
|
||||
int "CS pin number of 8080 interface"
|
||||
default 41
|
||||
config BSP_LCD_WR_PIN
|
||||
int "WR pin number of 8080 interface"
|
||||
default 38
|
||||
config BSP_LCD_DC_PIN
|
||||
int "DC pin number of 8080 interface"
|
||||
default 39
|
||||
config BSP_LCD_RST_PIN
|
||||
int "RESET pin number of 8080 interface (-1 for not used)"
|
||||
default 37
|
||||
config BSP_LCD_BACKLIGHT_PIN
|
||||
int "Backlight control pin number (-1 for not used)"
|
||||
default -1
|
||||
choice
|
||||
prompt "backlight active polarity"
|
||||
default BSP_LCD_BACKLIGHT_ACTIVE_LOW
|
||||
|
||||
config BSP_LCD_BACKLIGHT_ACTIVE_LOW
|
||||
bool "lcd backlight on low level"
|
||||
config BSP_LCD_BACKLIGHT_ACTIVE_HIGH
|
||||
bool "lcd_backlight on high level"
|
||||
endchoice
|
||||
|
||||
config BSP_LCD_CLK_FREQ
|
||||
int "Lcd max clk frequency"
|
||||
default 15000000
|
||||
|
||||
choice
|
||||
prompt "lcd scan direction"
|
||||
default BSP_BOARD_KD233
|
||||
|
||||
config BSP_BOARD_KD233
|
||||
bool "board_kd233 lcd scan: DIR_YX_RLUD"
|
||||
|
||||
config BSP_BOARD_K210_OPENMV_TEST
|
||||
bool "board_k210_openmv lcd scan: DIR_YX_LRUD"
|
||||
|
||||
config BSP_BOARD_USER
|
||||
bool "board_user: user defined."
|
||||
endchoice
|
||||
|
||||
config BSP_LCD_X_MAX
|
||||
int "LCD Height"
|
||||
default 272
|
||||
config BSP_LCD_Y_MAX
|
||||
int "LCD Width"
|
||||
default 480
|
||||
endif
|
||||
menuconfig BSP_USING_CH438
|
||||
bool "Enable CH438"
|
||||
default y
|
||||
if BSP_USING_CH438
|
||||
config BSP_CH438_ALE_PIN
|
||||
int "ale pin number for ch438"
|
||||
default 24
|
||||
config BSP_CH438_NWR_PIN
|
||||
int "nwr pin number for ch438"
|
||||
default 25
|
||||
config BSP_CH438_NRD_PIN
|
||||
int "nrd pin number for ch438"
|
||||
default 26
|
||||
config BSP_CH438_D0_PIN
|
||||
int "d0 pin number for ch438"
|
||||
default 27
|
||||
config BSP_CH438_D1_PIN
|
||||
int "d1 pin number for ch438"
|
||||
default 28
|
||||
config BSP_CH438_D2_PIN
|
||||
int "d2 pin number for ch438"
|
||||
default 29
|
||||
config BSP_CH438_D3_PIN
|
||||
int "d3 pin number for ch438"
|
||||
default 30
|
||||
config BSP_CH438_D4_PIN
|
||||
int "d4 pin number for ch438"
|
||||
default 31
|
||||
config BSP_CH438_D5_PIN
|
||||
int "d5 pin number for ch438"
|
||||
default 32
|
||||
config BSP_CH438_D6_PIN
|
||||
int "d6 pin number for ch438"
|
||||
default 33
|
||||
config BSP_CH438_D7_PIN
|
||||
int "d7 pin number for ch438"
|
||||
default 34
|
||||
config BSP_CH438_INT_PIN
|
||||
int "int pin number for ch438"
|
||||
default 35
|
||||
endif
|
||||
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
import os
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
drv_path = cwd+"/../../../rt-thread/bsp/k210/driver/"
|
||||
src = [
|
||||
'board.c',
|
||||
'heap.c',
|
||||
drv_path + 'drv_uart.c',
|
||||
'drv_interrupt.c',
|
||||
'drv_io_config.c',
|
||||
'dmalock.c'
|
||||
]
|
||||
CPPPATH = [cwd,drv_path]
|
||||
|
||||
if GetDepend('RT_USING_PIN'):
|
||||
src += ['drv_gpio.c']
|
||||
|
||||
if GetDepend('RT_USING_HWTIMER'):
|
||||
src += [drv_path + 'drv_hw_timer.c']
|
||||
if GetDepend('RT_USING_I2C'):
|
||||
src += [drv_path + 'drv_i2c.c']
|
||||
if GetDepend('RT_USING_SPI'):
|
||||
src += ['drv_spi.c']
|
||||
if GetDepend('RT_USING_PWM'):
|
||||
src += [drv_path + 'drv_pwm.c']
|
||||
if GetDepend('RT_USING_WDT'):
|
||||
src += [drv_path + 'drv_wdt.c']
|
||||
|
||||
if GetDepend('BSP_USING_LCD'):
|
||||
src += ['drv_lcd.c']
|
||||
src += ['drv_mpylcd.c']
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
|
|
@ -0,0 +1,144 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "board.h"
|
||||
#include "tick.h"
|
||||
|
||||
#include "drv_uart.h"
|
||||
|
||||
#include "encoding.h"
|
||||
#include "fpioa.h"
|
||||
#include "dmac.h"
|
||||
#include "dmalock.h"
|
||||
|
||||
void init_bss(void)
|
||||
{
|
||||
unsigned int *dst;
|
||||
|
||||
dst = &__bss_start;
|
||||
while (dst < &__bss_end)
|
||||
{
|
||||
*dst++ = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void primary_cpu_entry(void)
|
||||
{
|
||||
extern void entry(void);
|
||||
|
||||
/* disable global interrupt */
|
||||
init_bss();
|
||||
rt_hw_interrupt_disable();
|
||||
entry();
|
||||
}
|
||||
|
||||
#include <clint.h>
|
||||
#include <sysctl.h>
|
||||
|
||||
int freq(void)
|
||||
{
|
||||
rt_uint64_t value = 0;
|
||||
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL0);
|
||||
rt_kprintf("PLL0: %d\n", value);
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL1);
|
||||
rt_kprintf("PLL1: %d\n", value);
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL2);
|
||||
rt_kprintf("PLL2: %d\n", value);
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_CPU);
|
||||
rt_kprintf("CPU : %d\n", value);
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_APB0);
|
||||
rt_kprintf("APB0: %d\n", value);
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_APB1);
|
||||
rt_kprintf("APB1: %d\n", value);
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_APB2);
|
||||
rt_kprintf("APB2: %d\n", value);
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_HCLK);
|
||||
rt_kprintf("HCLK: %d\n", value);
|
||||
|
||||
value = clint_get_time();
|
||||
rt_kprintf("mtime: %d\n", value);
|
||||
|
||||
return 0;
|
||||
}
|
||||
MSH_CMD_EXPORT(freq, show freq info);
|
||||
|
||||
#ifdef RT_USING_SMP
|
||||
extern int rt_hw_clint_ipi_enable(void);
|
||||
#endif
|
||||
|
||||
extern int io_config_init(void);
|
||||
|
||||
void rt_hw_board_init(void)
|
||||
{
|
||||
sysctl_pll_set_freq(SYSCTL_PLL0, 800000000UL);
|
||||
sysctl_pll_set_freq(SYSCTL_PLL1, 400000000UL);
|
||||
sysctl_pll_set_freq(SYSCTL_PLL2, 45158400UL);
|
||||
sysctl_clock_set_threshold(SYSCTL_THRESHOLD_APB1, 2);
|
||||
/* Init FPIOA */
|
||||
fpioa_init();
|
||||
|
||||
io_config_init();
|
||||
|
||||
/* Dmac init */
|
||||
dmac_init();
|
||||
dmalock_init();
|
||||
|
||||
/* initalize interrupt */
|
||||
rt_hw_interrupt_init();
|
||||
/* initialize hardware interrupt */
|
||||
rt_hw_uart_init();
|
||||
|
||||
rt_hw_tick_init();
|
||||
|
||||
#ifdef RT_USING_SMP
|
||||
rt_hw_clint_ipi_enable();
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_CONSOLE
|
||||
/* set console device */
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif /* RT_USING_CONSOLE */
|
||||
|
||||
#ifdef RT_USING_HEAP
|
||||
rt_kprintf("heap: [0x%08x - 0x%08x]\n", (rt_ubase_t) RT_HW_HEAP_BEGIN, (rt_ubase_t) RT_HW_HEAP_END);
|
||||
/* initialize memory system */
|
||||
rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
}
|
||||
void rt_hw_cpu_reset(void)
|
||||
{
|
||||
sysctl->soft_reset.soft_reset = 1;
|
||||
while(1);
|
||||
}
|
||||
|
||||
MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset machine);
|
||||
|
||||
/**
|
||||
* This function will delay for some us.
|
||||
*
|
||||
* @param us the delay time of us
|
||||
*/
|
||||
void rt_hw_us_delay(rt_uint32_t usec)
|
||||
{
|
||||
rt_uint32_t cycle = read_cycle();
|
||||
rt_uint32_t nop_all = usec * sysctl_clock_get_freq(SYSCTL_CLOCK_CPU) / 1000000UL;
|
||||
while (1)
|
||||
{
|
||||
if(read_cycle() - cycle >= nop_all)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-5-30 Bernard the first version
|
||||
*/
|
||||
|
||||
#ifndef BOARD_H__
|
||||
#define BOARD_H__
|
||||
|
||||
#include "fpioa.h"
|
||||
#include "platform.h"
|
||||
#include <rtconfig.h>
|
||||
|
||||
extern unsigned int __bss_start;
|
||||
extern unsigned int __bss_end;
|
||||
|
||||
#define RT_HW_HEAP_BEGIN (void*)&__bss_end
|
||||
#define RT_HW_HEAP_END (void*)(0x80000000 + 6 * 1024 * 1024)
|
||||
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
|
||||
/* Copyright Canaan Inc.
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "dmalock.h"
|
||||
|
||||
struct dmac_host
|
||||
{
|
||||
struct rt_semaphore sem;
|
||||
struct rt_mutex mutex;
|
||||
uint8_t channel_used[DMAC_CHANNEL_COUNT];
|
||||
char *channel_name[DMAC_CHANNEL_COUNT];
|
||||
};
|
||||
|
||||
static struct dmac_host _dmac_host;
|
||||
|
||||
void dmalock_init(void)
|
||||
{
|
||||
rt_sem_init(&_dmac_host.sem, "dma_sem", DMAC_CHANNEL_COUNT, RT_IPC_FLAG_FIFO);
|
||||
rt_mutex_init(&_dmac_host.mutex, "dma_mutex", RT_IPC_FLAG_FIFO);
|
||||
for (int i = 0; i < DMAC_CHANNEL_COUNT; i++)
|
||||
{
|
||||
_dmac_host.channel_used[i] = 0;
|
||||
_dmac_host.channel_name[i] = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
int _dmalock_sync_take(dmac_channel_number_t *chn, int timeout_ms, const char *name)
|
||||
{
|
||||
rt_err_t result;
|
||||
|
||||
*chn = DMAC_CHANNEL_MAX;
|
||||
result = rt_sem_take(&_dmac_host.sem, timeout_ms);
|
||||
if (result == RT_EOK)
|
||||
{
|
||||
rt_mutex_take(&_dmac_host.mutex, RT_WAITING_FOREVER);
|
||||
for (int i = 0; i < DMAC_CHANNEL_COUNT; i++)
|
||||
{
|
||||
if (_dmac_host.channel_used[i] == 0)
|
||||
{
|
||||
_dmac_host.channel_used[i] = 1;
|
||||
_dmac_host.channel_name[i] = name;
|
||||
*chn = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
rt_mutex_release(&_dmac_host.mutex);
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
void dmalock_release(dmac_channel_number_t chn)
|
||||
{
|
||||
if (chn >= DMAC_CHANNEL_MAX)
|
||||
return;
|
||||
_dmac_host.channel_name[chn] = NULL;
|
||||
_dmac_host.channel_used[chn] = 0;
|
||||
rt_sem_release(&_dmac_host.sem);
|
||||
}
|
||||
|
||||
static void dma_ch_info(int argc, char **argv)
|
||||
{
|
||||
uint32_t cnt = 0;
|
||||
|
||||
for (int i = 0; i < DMAC_CHANNEL_COUNT; i++)
|
||||
{
|
||||
if (_dmac_host.channel_used[i] != 0)
|
||||
{
|
||||
rt_kprintf("dma_ch%d is using by func [%s]\n", i, _dmac_host.channel_name[i]);
|
||||
cnt++;
|
||||
}
|
||||
}
|
||||
|
||||
if(cnt == 0)
|
||||
rt_kprintf(" no dma_ch is using.\n");
|
||||
}
|
||||
MSH_CMD_EXPORT(dma_ch_info, list dma channel informationn.);
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
#ifndef __DMALOCK_H
|
||||
#define __DMALOCK_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <rtdef.h>
|
||||
#include <dmac.h>
|
||||
|
||||
#define dmalock_sync_take(x,y) _dmalock_sync_take(x, y, __func__)
|
||||
|
||||
void dmalock_init(void);
|
||||
int _dmalock_sync_take(dmac_channel_number_t *chn, int timeout_ms, const char *name);
|
||||
void dmalock_release(dmac_channel_number_t chn);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,167 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-01-27 tianchunyu the first version
|
||||
*/
|
||||
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <stdio.h>
|
||||
|
||||
#ifdef BSP_USING_DVP
|
||||
#include <drv_dvp.h>
|
||||
#define DRV_DEBUG
|
||||
#define LOG_TAG "drv.dvp"
|
||||
#define DBG_LVL DBG_LOG
|
||||
#include <rtdbg.h>
|
||||
|
||||
static struct kendryte_dvp rt_dvp = {0};
|
||||
static void (*dvp_irq_callback)(void) = NULL;
|
||||
/*
|
||||
the camera starts transfering photos
|
||||
*/
|
||||
|
||||
static int on_irq_dvp(void* ctx)
|
||||
{
|
||||
if (dvp_get_interrupt(DVP_STS_FRAME_FINISH))
|
||||
{
|
||||
rt_dvp_stop();
|
||||
dvp_clear_interrupt(DVP_STS_FRAME_FINISH);
|
||||
(*dvp_irq_callback)();
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
void rt_dvp_start(uint32_t pData, uint32_t Length)
|
||||
{
|
||||
dvp_set_display_addr(pData);
|
||||
dvp_config_interrupt(DVP_CFG_FINISH_INT_ENABLE, 1);
|
||||
dvp_start_convert();
|
||||
}
|
||||
|
||||
/*
|
||||
the camera stops transfering photos
|
||||
*/
|
||||
void rt_dvp_stop(void)
|
||||
{
|
||||
dvp_config_interrupt(DVP_CFG_FINISH_INT_ENABLE, 0);
|
||||
}
|
||||
|
||||
|
||||
static rt_err_t rt_dvp_init(rt_device_t dev)
|
||||
{
|
||||
//sysctl_pll_set_freq(SYSCTL_PLL2, 45158400UL);
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
rt_err_t result = RT_EOK;
|
||||
/* Init DVP IO map and function settings io pin serial number depends on schematic diagram
|
||||
initialize io in io_config_init function*/
|
||||
/*ov2640 dvp interface initialize*/
|
||||
dvp_init(8);
|
||||
dvp_set_xclk_rate(24000000);
|
||||
dvp_enable_burst();
|
||||
dvp_set_output_enable(0, 1);
|
||||
dvp_set_output_enable(1, 1);
|
||||
dvp_set_image_format(DVP_CFG_RGB_FORMAT);////////////////
|
||||
dvp_set_image_size(320, 240); // default
|
||||
dvp_config_interrupt(DVP_CFG_FINISH_INT_ENABLE, 0);
|
||||
dvp_disable_auto();
|
||||
plic_set_priority(IRQN_DVP_INTERRUPT, 1);
|
||||
plic_irq_register(IRQN_DVP_INTERRUPT, on_irq_dvp, NULL);
|
||||
plic_irq_enable(IRQN_DVP_INTERRUPT);
|
||||
dvp_clear_interrupt(DVP_STS_FRAME_FINISH);
|
||||
LOG_I("dvp initialize success");
|
||||
return result;
|
||||
}
|
||||
|
||||
static rt_err_t rt_dvp_open(rt_device_t dev, rt_uint16_t oflag)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_dvp_close(rt_device_t dev)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_dvp_control(rt_device_t dev, int cmd, void *args)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_size_t rt_dvp_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_size_t rt_dvp_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
|
||||
{
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
rt_err_t rt_set_irq_dvp_callback_hander(void (*p)(void))
|
||||
{
|
||||
if(NULL == p)
|
||||
{
|
||||
LOG_E("set irq dcmi callback hander is NULL");
|
||||
return RT_ERROR;
|
||||
}
|
||||
dvp_irq_callback = p;
|
||||
return RT_EOK;
|
||||
|
||||
}
|
||||
int kendryte_dvp_init(void)
|
||||
{
|
||||
int ret = 0;
|
||||
rt_device_t dvp_dev = RT_NULL;
|
||||
rt_dvp.dev.parent.type = RT_Device_Class_Miscellaneous;
|
||||
rt_dvp.dev.parent.init = rt_dvp_init;
|
||||
rt_dvp.dev.parent.open = rt_dvp_open;
|
||||
rt_dvp.dev.parent.close = rt_dvp_close;
|
||||
rt_dvp.dev.parent.read = rt_dvp_read;
|
||||
rt_dvp.dev.parent.write = rt_dvp_write;
|
||||
rt_dvp.dev.parent.control = rt_dvp_control;
|
||||
rt_dvp.dev.parent.user_data = RT_NULL;
|
||||
ret = rt_device_register(&rt_dvp.dev.parent, "dvp", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
|
||||
if(ret != RT_EOK)
|
||||
{
|
||||
LOG_E("dvp register fail!!\n\r");
|
||||
return -RT_ERROR;
|
||||
}
|
||||
LOG_I("dvp register successfully");
|
||||
dvp_dev = rt_device_find("dvp");
|
||||
if (dvp_dev == RT_NULL)
|
||||
{
|
||||
LOG_E("can't find dvp device!");
|
||||
return RT_ERROR;
|
||||
}
|
||||
ret = rt_device_open(dvp_dev, RT_DEVICE_FLAG_RDWR);
|
||||
if(ret != RT_EOK)
|
||||
{
|
||||
LOG_E("can't open dvp device!");
|
||||
return RT_ERROR;
|
||||
}
|
||||
LOG_I("dvp open successfully");
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_BOARD_EXPORT(kendryte_dvp_init);
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-01-27 tianchunyu the first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_DVP_H__
|
||||
#define __DRV_DVP_H__
|
||||
#include <dvp.h>
|
||||
#include <fpioa.h>
|
||||
#include <sysctl.h>
|
||||
#include <plic.h>
|
||||
#include <sysctl.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
struct rt_dvp_device
|
||||
{
|
||||
struct rt_device parent;
|
||||
};
|
||||
|
||||
struct kendryte_dvp
|
||||
{
|
||||
struct rt_dvp_device dev;
|
||||
};
|
||||
|
||||
extern void rt_dvp_start(uint32_t pData, uint32_t Length);
|
||||
extern void rt_dvp_stop(void);
|
||||
extern rt_err_t rt_set_irq_dvp_callback_hander(void (*p)(void));
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,267 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 ZYH first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <fpioa.h>
|
||||
#include <gpiohs.h>
|
||||
#include "drv_gpio.h"
|
||||
#include "drv_io_config.h"
|
||||
#include <plic.h>
|
||||
#include <rthw.h>
|
||||
#include <utils.h>
|
||||
#include <string.h>
|
||||
|
||||
#define DBG_ENABLE
|
||||
#define DBG_TAG "PIN"
|
||||
#define DBG_LVL DBG_WARNING
|
||||
#define DBG_COLOR
|
||||
#include <rtdbg.h>
|
||||
|
||||
#define FUNC_GPIOHS(n) (FUNC_GPIOHS0 + n)
|
||||
|
||||
static short pin_alloc_table[FPIOA_NUM_IO];
|
||||
static uint32_t free_pin = 0;
|
||||
|
||||
static int alloc_pin_channel(rt_base_t pin_index)
|
||||
{
|
||||
if(free_pin == 32)
|
||||
{
|
||||
LOG_E("no free gpiohs channel to alloc");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(pin_alloc_table[pin_index] != -1)
|
||||
{
|
||||
LOG_W("already alloc gpiohs channel for pin %d", pin_index);
|
||||
return pin_alloc_table[pin_index];
|
||||
}
|
||||
|
||||
pin_alloc_table[pin_index] = free_pin;
|
||||
free_pin++;
|
||||
|
||||
fpioa_set_function(pin_index, FUNC_GPIOHS(pin_alloc_table[pin_index]));
|
||||
return pin_alloc_table[pin_index];
|
||||
}
|
||||
|
||||
int get_pin_channel(rt_base_t pin_index)
|
||||
{
|
||||
return pin_alloc_table[pin_index];
|
||||
}
|
||||
|
||||
static void free_pin_channel(rt_base_t pin_index)
|
||||
{
|
||||
if(pin_alloc_table[pin_index] == -1)
|
||||
{
|
||||
LOG_W("free error:not alloc gpiohs channel for pin %d", pin_index);
|
||||
return;
|
||||
}
|
||||
pin_alloc_table[pin_index] = -1;
|
||||
free_pin--;
|
||||
}
|
||||
|
||||
|
||||
static void drv_pin_mode(struct rt_device *device, rt_base_t pin, rt_base_t mode)
|
||||
{
|
||||
int pin_channel = get_pin_channel(pin);
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
pin_channel = alloc_pin_channel(pin);
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
switch (mode)
|
||||
{
|
||||
case PIN_MODE_OUTPUT:
|
||||
gpiohs_set_drive_mode(pin_channel, GPIO_DM_OUTPUT);
|
||||
break;
|
||||
case PIN_MODE_INPUT:
|
||||
gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT);
|
||||
break;
|
||||
case PIN_MODE_INPUT_PULLUP:
|
||||
gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT_PULL_UP);
|
||||
break;
|
||||
case PIN_MODE_INPUT_PULLDOWN:
|
||||
gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT_PULL_DOWN);
|
||||
break;
|
||||
default:
|
||||
LOG_E("Not support mode %d", mode);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void drv_pin_write(struct rt_device *device, rt_base_t pin, rt_base_t value)
|
||||
{
|
||||
int pin_channel = get_pin_channel(pin);
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
LOG_E("pin %d not set mode", pin);
|
||||
return;
|
||||
}
|
||||
gpiohs_set_pin(pin_channel, value == PIN_HIGH ? GPIO_PV_HIGH : GPIO_PV_LOW);
|
||||
}
|
||||
|
||||
static int drv_pin_read(struct rt_device *device, rt_base_t pin)
|
||||
{
|
||||
int pin_channel = get_pin_channel(pin);
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
LOG_E("pin %d not set mode", pin);
|
||||
return -1;
|
||||
}
|
||||
return gpiohs_get_pin(pin_channel) == GPIO_PV_HIGH ? PIN_HIGH : PIN_LOW;
|
||||
}
|
||||
|
||||
static struct
|
||||
{
|
||||
void (*hdr)(void *args);
|
||||
void* args;
|
||||
gpio_pin_edge_t edge;
|
||||
} irq_table[32];
|
||||
|
||||
static void pin_irq(int vector, void *param)
|
||||
{
|
||||
int pin_channel = vector - IRQN_GPIOHS0_INTERRUPT;
|
||||
if(irq_table[pin_channel].edge & GPIO_PE_FALLING)
|
||||
{
|
||||
set_gpio_bit(gpiohs->fall_ie.u32, pin_channel, 0);
|
||||
set_gpio_bit(gpiohs->fall_ip.u32, pin_channel, 1);
|
||||
set_gpio_bit(gpiohs->fall_ie.u32, pin_channel, 1);
|
||||
}
|
||||
|
||||
if(irq_table[pin_channel].edge & GPIO_PE_RISING)
|
||||
{
|
||||
set_gpio_bit(gpiohs->rise_ie.u32, pin_channel, 0);
|
||||
set_gpio_bit(gpiohs->rise_ip.u32, pin_channel, 1);
|
||||
set_gpio_bit(gpiohs->rise_ie.u32, pin_channel, 1);
|
||||
}
|
||||
|
||||
if(irq_table[pin_channel].edge & GPIO_PE_LOW)
|
||||
{
|
||||
set_gpio_bit(gpiohs->low_ie.u32, pin_channel, 0);
|
||||
set_gpio_bit(gpiohs->low_ip.u32, pin_channel, 1);
|
||||
set_gpio_bit(gpiohs->low_ie.u32, pin_channel, 1);
|
||||
}
|
||||
|
||||
if(irq_table[pin_channel].edge & GPIO_PE_HIGH)
|
||||
{
|
||||
set_gpio_bit(gpiohs->high_ie.u32, pin_channel, 0);
|
||||
set_gpio_bit(gpiohs->high_ip.u32, pin_channel, 1);
|
||||
set_gpio_bit(gpiohs->high_ie.u32, pin_channel, 1);
|
||||
}
|
||||
if(irq_table[pin_channel].hdr)
|
||||
{
|
||||
irq_table[pin_channel].hdr(irq_table[pin_channel].args);
|
||||
}
|
||||
}
|
||||
|
||||
static rt_err_t drv_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
|
||||
rt_uint32_t mode, void (*hdr)(void *args), void *args)
|
||||
{
|
||||
int pin_channel = get_pin_channel(pin);
|
||||
char irq_name[10];
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
LOG_E("pin %d not set mode", pin);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
irq_table[pin_channel].hdr = hdr;
|
||||
irq_table[pin_channel].args = args;
|
||||
switch (mode)
|
||||
{
|
||||
case PIN_IRQ_MODE_RISING:
|
||||
irq_table[pin_channel].edge = GPIO_PE_RISING;
|
||||
break;
|
||||
case PIN_IRQ_MODE_FALLING:
|
||||
irq_table[pin_channel].edge = GPIO_PE_FALLING;
|
||||
break;
|
||||
case PIN_IRQ_MODE_RISING_FALLING:
|
||||
irq_table[pin_channel].edge = GPIO_PE_BOTH;
|
||||
break;
|
||||
case PIN_IRQ_MODE_HIGH_LEVEL:
|
||||
irq_table[pin_channel].edge = GPIO_PE_LOW;
|
||||
break;
|
||||
case PIN_IRQ_MODE_LOW_LEVEL:
|
||||
irq_table[pin_channel].edge = GPIO_PE_HIGH;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
gpiohs_set_pin_edge(pin_channel, irq_table[pin_channel].edge);
|
||||
rt_snprintf(irq_name, sizeof irq_name, "pin%d", pin);
|
||||
rt_hw_interrupt_install(IRQN_GPIOHS0_INTERRUPT + pin_channel, pin_irq, RT_NULL, irq_name);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t drv_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
|
||||
int pin_channel = get_pin_channel(pin);
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
LOG_E("pin %d not set mode", pin);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
irq_table[pin_channel].hdr = RT_NULL;
|
||||
irq_table[pin_channel].args = RT_NULL;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static rt_err_t drv_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
|
||||
{
|
||||
int pin_channel = get_pin_channel(pin);
|
||||
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
LOG_E("pin %d not set mode", pin);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
if(enabled)
|
||||
{
|
||||
rt_hw_interrupt_umask(IRQN_GPIOHS0_INTERRUPT + pin_channel);
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_hw_interrupt_mask(IRQN_GPIOHS0_INTERRUPT + pin_channel);
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
const static struct rt_pin_ops drv_pin_ops =
|
||||
{
|
||||
drv_pin_mode,
|
||||
drv_pin_write,
|
||||
drv_pin_read,
|
||||
|
||||
drv_pin_attach_irq,
|
||||
drv_pin_detach_irq,
|
||||
drv_pin_irq_enable
|
||||
};
|
||||
|
||||
int rt_hw_pin_init(void)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
memset(pin_alloc_table, 0xff, sizeof pin_alloc_table);
|
||||
free_pin = GPIO_ALLOC_START;
|
||||
ret = rt_device_pin_register("pin", &drv_pin_ops, RT_NULL);
|
||||
|
||||
return ret;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_pin_init);
|
||||
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 ZYH first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_GPIO_H__
|
||||
#define DRV_GPIO_H__
|
||||
|
||||
int rt_hw_pin_init(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 ZYH first version
|
||||
*/
|
||||
|
||||
#include <plic.h>
|
||||
|
||||
void plic_irq_handle(plic_irq_t irq)
|
||||
{
|
||||
plic_instance_t (*plic_instance)[IRQN_MAX] = plic_get_instance();
|
||||
if (plic_instance[0][irq].callback)
|
||||
{
|
||||
plic_instance[0][irq].callback(
|
||||
plic_instance[0][irq].ctx);
|
||||
}
|
||||
else if (plic_instance[1][irq].callback)
|
||||
{
|
||||
plic_instance[1][irq].callback(
|
||||
plic_instance[1][irq].ctx);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,219 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 ZYH first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <fpioa.h>
|
||||
#include <drv_io_config.h>
|
||||
#include <sysctl.h>
|
||||
|
||||
#define HS_GPIO(n) (FUNC_GPIOHS0 + n)
|
||||
|
||||
#define IOCONFIG(pin,func) {pin, func, #func}
|
||||
|
||||
static struct io_config
|
||||
{
|
||||
int io_num;
|
||||
fpioa_function_t func;
|
||||
const char * func_name;
|
||||
} io_config[] =
|
||||
{
|
||||
#ifdef BSP_USING_LCD
|
||||
IOCONFIG(BSP_LCD_CS_PIN, FUNC_SPI0_SS0), /* LCD CS PIN */
|
||||
IOCONFIG(BSP_LCD_WR_PIN, FUNC_SPI0_SCLK), /* LCD WR PIN */
|
||||
IOCONFIG(BSP_LCD_DC_PIN, HS_GPIO(LCD_DC_PIN)), /* LCD DC PIN */
|
||||
#if BSP_LCD_RST_PIN >= 0
|
||||
IOCONFIG(BSP_LCD_RST_PIN, HS_GPIO(LCD_RST_PIN)), /* LCD RESET PIN */
|
||||
#endif
|
||||
#if BSP_LCD_BACKLIGHT_PIN >= 0
|
||||
IOCONFIG(BSP_LCD_BACKLIGHT_PIN, HS_GPIO(LCD_BACKLIGHT_PIN)), /* LCD BACKLIGHT PIN */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_DVP
|
||||
IOCONFIG(BSP_DVP_SCCB_SDA_PIN, FUNC_SCCB_SDA),
|
||||
IOCONFIG(BSP_DVP_SCCB_SCLK_PIN, FUNC_SCCB_SCLK),
|
||||
IOCONFIG(BSP_DVP_CMOS_RST_PIN, FUNC_CMOS_RST),
|
||||
IOCONFIG(BSP_DVP_CMOS_VSYNC_PIN, FUNC_CMOS_VSYNC),
|
||||
IOCONFIG(BSP_DVP_CMOS_PWDN_PIN, FUNC_CMOS_PWDN),
|
||||
IOCONFIG(BSP_DVP_CMOS_XCLK_PIN, FUNC_CMOS_XCLK),
|
||||
IOCONFIG(BSP_DVP_CMOS_PCLK_PIN, FUNC_CMOS_PCLK),
|
||||
IOCONFIG(BSP_DVP_CMOS_HREF_PIN, FUNC_CMOS_HREF),
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SPI1
|
||||
IOCONFIG(BSP_SPI1_CLK_PIN, FUNC_SPI1_SCLK),
|
||||
IOCONFIG(BSP_SPI1_D0_PIN, FUNC_SPI1_D0),
|
||||
IOCONFIG(BSP_SPI1_D1_PIN, FUNC_SPI1_D1),
|
||||
#ifdef BSP_USING_SPI1_AS_QSPI
|
||||
IOCONFIG(BSP_SPI1_D2_PIN, FUNC_SPI1_D2),
|
||||
IOCONFIG(BSP_SPI1_D3_PIN, FUNC_SPI1_D3),
|
||||
#endif
|
||||
#ifdef BSP_SPI1_USING_SS0
|
||||
IOCONFIG(BSP_SPI1_SS0_PIN, HS_GPIO(SPI1_CS0_PIN)),
|
||||
#endif
|
||||
#ifdef BSP_SPI1_USING_SS1
|
||||
IOCONFIG(BSP_SPI1_SS1_PIN, HS_GPIO(SPI1_CS1_PIN)),
|
||||
#endif
|
||||
#ifdef BSP_SPI1_USING_SS2
|
||||
IOCONFIG(BSP_SPI1_SS2_PIN, HS_GPIO(SPI1_CS2_PIN)),
|
||||
#endif
|
||||
#ifdef BSP_SPI1_USING_SS3
|
||||
IOCONFIG(BSP_SPI1_SS3_PIN, HS_GPIO(SPI1_CS3_PIN)),
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART1
|
||||
IOCONFIG(BSP_UART1_TXD_PIN, FUNC_UART1_TX),
|
||||
IOCONFIG(BSP_UART1_RXD_PIN, FUNC_UART1_RX),
|
||||
#if BSP_UART1_RTS_PIN >= 0
|
||||
IOCONFIG(BSP_UART1_RTS_PIN, FUNC_UART1_RTS),
|
||||
#endif
|
||||
#if BSP_UART1_CTS_PIN >= 0
|
||||
IOCONFIG(BSP_UART1_CTS_PIN, FUNC_UART1_CTS),
|
||||
#endif
|
||||
#endif
|
||||
#ifdef BSP_USING_UART2
|
||||
IOCONFIG(BSP_UART2_TXD_PIN, FUNC_UART2_TX),
|
||||
IOCONFIG(BSP_UART2_RXD_PIN, FUNC_UART2_RX),
|
||||
#if BSP_UART2_RTS_PIN >= 0
|
||||
IOCONFIG(BSP_UART2_RTS_PIN, FUNC_UART2_RTS),
|
||||
#endif
|
||||
#if BSP_UART2_CTS_PIN >= 0
|
||||
IOCONFIG(BSP_UART2_CTS_PIN, FUNC_UART2_CTS),
|
||||
#endif
|
||||
#endif
|
||||
#ifdef BSP_USING_UART3
|
||||
IOCONFIG(BSP_UART3_TXD_PIN, FUNC_UART3_TX),
|
||||
IOCONFIG(BSP_UART3_RXD_PIN, FUNC_UART3_RX),
|
||||
#if BSP_UART3_RTS_PIN >= 0
|
||||
IOCONFIG(BSP_UART3_RTS_PIN, FUNC_UART3_RTS),
|
||||
#endif
|
||||
#if BSP_UART3_CTS_PIN >= 0
|
||||
IOCONFIG(BSP_UART3_CTS_PIN, FUNC_UART3_CTS),
|
||||
#endif
|
||||
#endif
|
||||
#ifdef BSP_USING_I2C0
|
||||
IOCONFIG(BSP_I2C0_SCL_PIN, FUNC_I2C0_SCLK),
|
||||
IOCONFIG(BSP_I2C0_SDA_PIN, FUNC_I2C0_SDA),
|
||||
#endif
|
||||
#ifdef BSP_USING_I2C1
|
||||
IOCONFIG(BSP_I2C1_SCL_PIN, FUNC_I2C1_SCLK),
|
||||
IOCONFIG(BSP_I2C1_SDA_PIN, FUNC_I2C1_SDA),
|
||||
#endif
|
||||
#ifdef BSP_USING_I2C2
|
||||
IOCONFIG(BSP_I2C2_SCL_PIN, FUNC_I2C2_SCLK),
|
||||
IOCONFIG(BSP_I2C2_SDA_PIN, FUNC_I2C2_SDA),
|
||||
#endif
|
||||
#ifdef BSP_USING_I2S0
|
||||
IOCONFIG(BSP_I2S0_OUT_D1_PIN, FUNC_I2S0_OUT_D1),
|
||||
IOCONFIG(BSP_I2S0_WS_PIN, FUNC_I2S0_WS),
|
||||
IOCONFIG(BSP_I2S0_SCLK_PIN, FUNC_I2S0_SCLK),
|
||||
#endif
|
||||
#ifdef BSP_USING_I2S1
|
||||
IOCONFIG(BSP_I2S1_IN_D0_PIN, FUNC_I2S1_IN_D0),
|
||||
IOCONFIG(BSP_I2S1_WS_PIN, FUNC_I2S1_WS),
|
||||
IOCONFIG(BSP_I2S1_SCLK_PIN, FUNC_I2S1_SCLK),
|
||||
#endif
|
||||
#ifdef BSP_USING_I2S2
|
||||
IOCONFIG(BSP_I2S2_OUT_D1_PIN, FUNC_I2S2_OUT_D1),
|
||||
IOCONFIG(BSP_I2S2_WS_PIN, FUNC_I2S2_WS),
|
||||
IOCONFIG(BSP_I2S2_SCLK_PIN, FUNC_I2S2_SCLK),
|
||||
#endif
|
||||
|
||||
#ifdef BSP_PWM_CHN0_ENABLE
|
||||
IOCONFIG(BSP_PWM_CHN0_PIN, FUNC_TIMER2_TOGGLE1),
|
||||
#endif
|
||||
#ifdef BSP_PWM_CHN1_ENABLE
|
||||
IOCONFIG(BSP_PWM_CHN1_PIN, FUNC_TIMER2_TOGGLE2),
|
||||
#endif
|
||||
#ifdef BSP_PWM_CHN2_ENABLE
|
||||
IOCONFIG(BSP_PWM_CHN2_PIN, FUNC_TIMER2_TOGGLE3),
|
||||
#endif
|
||||
#ifdef BSP_PWM_CHN3_ENABLE
|
||||
IOCONFIG(BSP_PWM_CHN3_PIN, FUNC_TIMER2_TOGGLE4),
|
||||
#endif
|
||||
};
|
||||
|
||||
static int print_io_config()
|
||||
{
|
||||
int i;
|
||||
rt_kprintf("IO Configuration Table\n");
|
||||
rt_kprintf("┌───────┬────────────────────────┐\n");
|
||||
rt_kprintf("│Pin │Function │\n");
|
||||
rt_kprintf("├───────┼────────────────────────┤\n");
|
||||
for(i = 0; i < sizeof io_config / sizeof io_config[0]; i++)
|
||||
{
|
||||
rt_kprintf("│%-2d │%-24.24s│\n", io_config[i].io_num, io_config[i].func_name);
|
||||
}
|
||||
rt_kprintf("└───────┴────────────────────────┘\n");
|
||||
return 0;
|
||||
}
|
||||
MSH_CMD_EXPORT_ALIAS(print_io_config, io, print io config);
|
||||
|
||||
int io_config_init(void)
|
||||
{
|
||||
int count = sizeof(io_config) / sizeof(io_config[0]);
|
||||
int i;
|
||||
|
||||
/* IO GroupA Power Supply Setting */
|
||||
#if defined(BSP_GROUPA_POWER_SUPPLY_3V3)
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V33);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V33);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V33);
|
||||
#else
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V18);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V18);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V18);
|
||||
#endif
|
||||
|
||||
/* IO GroupB Power Supply Setting */
|
||||
#if defined(BSP_GROUPB_POWER_SUPPLY_3V3)
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V33);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V33);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK5, SYSCTL_POWER_V33);
|
||||
#else
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V18);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V18);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK5, SYSCTL_POWER_V18);
|
||||
#endif
|
||||
|
||||
/* IO GroupC Power Supply Setting */
|
||||
#if defined(BSP_GROUPC_POWER_SUPPLY_3V3)
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK6, SYSCTL_POWER_V33);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK7, SYSCTL_POWER_V33);
|
||||
#else
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK6, SYSCTL_POWER_V18);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK7, SYSCTL_POWER_V18);
|
||||
#endif
|
||||
|
||||
for(i = 0; i < count; i++)
|
||||
{
|
||||
fpioa_set_function(io_config[i].io_num, io_config[i].func);
|
||||
}
|
||||
|
||||
#if defined(BSP_USING_DVP) || defined(BSP_USING_LCD)
|
||||
sysctl_set_spi0_dvp_data(1);
|
||||
sysctl_clock_enable(SYSCTL_CLOCK_AI);
|
||||
#endif
|
||||
}
|
||||
|
||||
int io_config_used(int io_num)
|
||||
{
|
||||
int count = sizeof(io_config) / sizeof(io_config[0]);
|
||||
int i;
|
||||
|
||||
for(i = 0; i < count; i++)
|
||||
{
|
||||
if (io_config[i].io_num == io_num)
|
||||
break;
|
||||
}
|
||||
|
||||
return (i < count);
|
||||
}
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 ZYH first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_IO_CONFIG_H__
|
||||
#define __DRV_IO_CONFIG_H__
|
||||
|
||||
#include <rtconfig.h>
|
||||
|
||||
enum HS_GPIO_CONFIG
|
||||
{
|
||||
#ifdef BSP_USING_LCD
|
||||
LCD_DC_PIN = 0, /* LCD DC PIN */
|
||||
#if BSP_LCD_RST_PIN >= 0
|
||||
LCD_RST_PIN,
|
||||
#endif
|
||||
#if BSP_LCD_BACKLIGHT_PIN >= 0
|
||||
LCD_BACKLIGHT_PIN,
|
||||
#endif
|
||||
#endif
|
||||
#ifdef BSP_SPI1_USING_SS0
|
||||
SPI1_CS0_PIN,
|
||||
#endif
|
||||
#ifdef BSP_SPI1_USING_SS1
|
||||
SPI1_CS1_PIN,
|
||||
#endif
|
||||
#ifdef BSP_SPI1_USING_SS2
|
||||
SPI1_CS2_PIN,
|
||||
#endif
|
||||
#ifdef BSP_SPI1_USING_SS3
|
||||
SPI1_CS3_PIN,
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_BRIDGE
|
||||
SPI2_INT_PIN,
|
||||
SPI2_READY_PIN,
|
||||
#endif
|
||||
GPIO_ALLOC_START /* index of gpio driver start */
|
||||
};
|
||||
|
||||
extern int io_config_init(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,550 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-12 ZYH first version
|
||||
*/
|
||||
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef BSP_USING_LCD
|
||||
#include <drv_lcd.h>
|
||||
#define DBG_TAG "LCD"
|
||||
#define DBG_LVL DBG_WARNING
|
||||
#include <rtdbg.h>
|
||||
|
||||
#define NO_OPERATION 0x00
|
||||
#define SOFTWARE_RESET 0x01
|
||||
#define READ_ID 0x04
|
||||
#define READ_STATUS 0x09
|
||||
#define READ_POWER_MODE 0x0A
|
||||
#define READ_MADCTL 0x0B
|
||||
#define READ_PIXEL_FORMAT 0x0C
|
||||
#define READ_IMAGE_FORMAT 0x0D
|
||||
#define READ_SIGNAL_MODE 0x0E
|
||||
#define READ_SELT_DIAG_RESULT 0x0F
|
||||
#define SLEEP_ON 0x10
|
||||
#define SLEEP_OFF 0x11
|
||||
#define PARTIAL_DISPALY_ON 0x12
|
||||
#define NORMAL_DISPALY_ON 0x13
|
||||
#define INVERSION_DISPALY_OFF 0x20
|
||||
#define INVERSION_DISPALY_ON 0x21
|
||||
#define GAMMA_SET 0x26
|
||||
#define DISPALY_OFF 0x28
|
||||
#define DISPALY_ON 0x29
|
||||
#define HORIZONTAL_ADDRESS_SET 0x2A
|
||||
#define VERTICAL_ADDRESS_SET 0x2B
|
||||
#define MEMORY_WRITE 0x2C
|
||||
#define COLOR_SET 0x2D
|
||||
#define MEMORY_READ 0x2E
|
||||
#define PARTIAL_AREA 0x30
|
||||
#define VERTICAL_SCROL_DEFINE 0x33
|
||||
#define TEAR_EFFECT_LINE_OFF 0x34
|
||||
#define TEAR_EFFECT_LINE_ON 0x35
|
||||
#define MEMORY_ACCESS_CTL 0x36
|
||||
#define VERTICAL_SCROL_S_ADD 0x37
|
||||
#define IDLE_MODE_OFF 0x38
|
||||
#define IDLE_MODE_ON 0x39
|
||||
#define PIXEL_FORMAT_SET 0x3A
|
||||
#define WRITE_MEMORY_CONTINUE 0x3C
|
||||
#define READ_MEMORY_CONTINUE 0x3E
|
||||
#define SET_TEAR_SCANLINE 0x44
|
||||
#define GET_SCANLINE 0x45
|
||||
#define WRITE_BRIGHTNESS 0x51
|
||||
#define READ_BRIGHTNESS 0x52
|
||||
#define WRITE_CTRL_DISPALY 0x53
|
||||
#define READ_CTRL_DISPALY 0x54
|
||||
#define WRITE_BRIGHTNESS_CTL 0x55
|
||||
#define READ_BRIGHTNESS_CTL 0x56
|
||||
#define WRITE_MIN_BRIGHTNESS 0x5E
|
||||
#define READ_MIN_BRIGHTNESS 0x5F
|
||||
#define READ_ID1 0xDA
|
||||
#define READ_ID2 0xDB
|
||||
#define READ_ID3 0xDC
|
||||
#define RGB_IF_SIGNAL_CTL 0xB0
|
||||
#define NORMAL_FRAME_CTL 0xB1
|
||||
#define IDLE_FRAME_CTL 0xB2
|
||||
#define PARTIAL_FRAME_CTL 0xB3
|
||||
#define INVERSION_CTL 0xB4
|
||||
#define BLANK_PORCH_CTL 0xB5
|
||||
#define DISPALY_FUNCTION_CTL 0xB6
|
||||
#define ENTRY_MODE_SET 0xB7
|
||||
#define BACKLIGHT_CTL1 0xB8
|
||||
#define BACKLIGHT_CTL2 0xB9
|
||||
#define BACKLIGHT_CTL3 0xBA
|
||||
#define BACKLIGHT_CTL4 0xBB
|
||||
#define BACKLIGHT_CTL5 0xBC
|
||||
#define BACKLIGHT_CTL7 0xBE
|
||||
#define BACKLIGHT_CTL8 0xBF
|
||||
#define POWER_CTL1 0xC0
|
||||
#define POWER_CTL2 0xC1
|
||||
#define VCOM_CTL1 0xC5
|
||||
#define VCOM_CTL2 0xC7
|
||||
#define NV_MEMORY_WRITE 0xD0
|
||||
#define NV_MEMORY_PROTECT_KEY 0xD1
|
||||
#define NV_MEMORY_STATUS_READ 0xD2
|
||||
#define READ_ID4 0xD3
|
||||
#define POSITIVE_GAMMA_CORRECT 0xE0
|
||||
#define NEGATIVE_GAMMA_CORRECT 0xE1
|
||||
#define DIGITAL_GAMMA_CTL1 0xE2
|
||||
#define DIGITAL_GAMMA_CTL2 0xE3
|
||||
#define INTERFACE_CTL 0xF6
|
||||
|
||||
#define LCD_SPI_CHANNEL SPI_DEVICE_0
|
||||
#define LCD_SPI_CHIP_SELECT SPI_CHIP_SELECT_0
|
||||
|
||||
#if defined(BSP_BOARD_K210_OPENMV_TEST)
|
||||
#define LCD_SCAN_DIR DIR_YX_LRUD
|
||||
#elif defined(BSP_BOARD_KD233)
|
||||
#define LCD_SCAN_DIR (DIR_YX_RLUD | 0x08)
|
||||
#elif defined(BSP_BOARD_USER)
|
||||
/*user define.*/
|
||||
#define LCD_SCAN_DIR DIR_YX_RLDU
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
static struct lcd_8080_device _lcddev;
|
||||
|
||||
static void drv_lcd_cmd(lcd_8080_device_t lcd, rt_uint8_t cmd)
|
||||
{
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_LOW);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
spi_init_non_standard(lcd->spi_channel, 8 /*instrction length*/, 0 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, &cmd, 1, SPI_TRANS_CHAR);
|
||||
}
|
||||
|
||||
static void drv_lcd_data_byte(lcd_8080_device_t lcd, rt_uint8_t *data_buf, rt_uint32_t length)
|
||||
{
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
spi_init_non_standard(lcd->spi_channel, 8 /*instrction length*/, 0 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, data_buf, length, SPI_TRANS_CHAR);
|
||||
}
|
||||
|
||||
void drv_lcd_data_half_word(lcd_8080_device_t lcd, rt_uint16_t *data_buf, rt_uint32_t length)
|
||||
{
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 16, 0);
|
||||
spi_init_non_standard(lcd->spi_channel, 16 /*instrction length*/, 0 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, data_buf, length, SPI_TRANS_SHORT);
|
||||
}
|
||||
|
||||
void drv_lcd_data_word(lcd_8080_device_t lcd, rt_uint32_t *data_buf, rt_uint32_t length)
|
||||
{
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0);
|
||||
spi_init_non_standard(lcd->spi_channel, 0 /*instrction length*/, 32 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, data_buf, length, SPI_TRANS_INT);
|
||||
}
|
||||
|
||||
static void drv_lcd_hw_init(lcd_8080_device_t lcd)
|
||||
{
|
||||
#if BSP_LCD_RST_PIN >= 0
|
||||
{
|
||||
gpiohs_set_drive_mode(lcd->rst_pin, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_pin(lcd->rst_pin, GPIO_PV_LOW);
|
||||
rt_thread_mdelay(200);
|
||||
gpiohs_set_pin(lcd->rst_pin, GPIO_PV_HIGH);
|
||||
rt_thread_mdelay(200);
|
||||
}
|
||||
#endif
|
||||
#if BSP_LCD_BACKLIGHT_PIN >= 0
|
||||
{
|
||||
gpiohs_set_drive_mode(lcd->backlight_pin, GPIO_DM_OUTPUT);
|
||||
#if defined(BSP_LCD_BACKLIGHT_ACTIVE_LOW)
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
|
||||
#elif defined(BSP_LCD_BACKLIGHT_ACTIVE_HIGH)
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH);
|
||||
#else
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
gpiohs_set_drive_mode(lcd->dc_pin, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
spi_set_clk_rate(lcd->spi_channel, BSP_LCD_CLK_FREQ);
|
||||
}
|
||||
|
||||
static void drv_lcd_set_direction(lcd_8080_device_t lcd, lcd_dir_t dir)
|
||||
{
|
||||
if (dir & DIR_XY_MASK)
|
||||
{
|
||||
lcd->lcd_info.width = BSP_LCD_Y_MAX;
|
||||
lcd->lcd_info.height = BSP_LCD_X_MAX;
|
||||
}
|
||||
else
|
||||
{
|
||||
lcd->lcd_info.width = BSP_LCD_X_MAX;
|
||||
lcd->lcd_info.height = BSP_LCD_Y_MAX;
|
||||
}
|
||||
rt_kprintf("lcd witdth %d,height %d \n",lcd->lcd_info.width,lcd->lcd_info.height);
|
||||
drv_lcd_cmd(lcd, MEMORY_ACCESS_CTL);
|
||||
drv_lcd_data_byte(lcd, (rt_uint8_t *)&dir, 1);
|
||||
}
|
||||
|
||||
void drv_lcd_set_area(lcd_8080_device_t lcd, rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2)
|
||||
{
|
||||
rt_uint8_t data[4] = {0};
|
||||
|
||||
data[0] = (rt_uint8_t)(x1 >> 8);
|
||||
data[1] = (rt_uint8_t)(x1);
|
||||
data[2] = (rt_uint8_t)(x2 >> 8);
|
||||
data[3] = (rt_uint8_t)(x2);
|
||||
drv_lcd_cmd(lcd, HORIZONTAL_ADDRESS_SET);
|
||||
drv_lcd_data_byte(lcd, data, 4);
|
||||
|
||||
data[0] = (rt_uint8_t)(y1 >> 8);
|
||||
data[1] = (rt_uint8_t)(y1);
|
||||
data[2] = (rt_uint8_t)(y2 >> 8);
|
||||
data[3] = (rt_uint8_t)(y2);
|
||||
drv_lcd_cmd(lcd, VERTICAL_ADDRESS_SET);
|
||||
drv_lcd_data_byte(lcd, data, 4);
|
||||
|
||||
drv_lcd_cmd(lcd, MEMORY_WRITE);
|
||||
}
|
||||
|
||||
static void drv_lcd_set_pixel(lcd_8080_device_t lcd, uint16_t x, uint16_t y, uint16_t color)
|
||||
{
|
||||
drv_lcd_set_area(lcd, x, y, x, y);
|
||||
drv_lcd_data_half_word(lcd, &color, 1);
|
||||
}
|
||||
|
||||
static void drv_lcd_clear(lcd_8080_device_t lcd, uint16_t color)
|
||||
{
|
||||
uint32_t data = ((uint32_t)color << 16) | (uint32_t)color;
|
||||
|
||||
drv_lcd_set_area(lcd, 0, 0, lcd->lcd_info.width - 1, lcd->lcd_info.height - 1);
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0);
|
||||
spi_init_non_standard(lcd->spi_channel, 0 /*instrction length*/, 32 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_fill_data_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, (const uint32_t *)&data, lcd->lcd_info.width * lcd->lcd_info.height / 2);
|
||||
}
|
||||
|
||||
static void rt_bitblt(rt_uint16_t * dest, int dest_segment, int dest_common, int dest_x, int dest_y, int width, int height,
|
||||
rt_uint16_t *src, int src_segment, int src_common, int src_x, int src_y)
|
||||
{
|
||||
int sx0, sx1, sy0, sy1;
|
||||
int dx0, dx1, dy0, dy1;
|
||||
rt_uint16_t *buff_src;
|
||||
rt_uint16_t *buff_dest;
|
||||
int x, y;
|
||||
|
||||
if (width <= 0) {
|
||||
return;
|
||||
}
|
||||
if (height <= 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
sx0 = src_x;
|
||||
sy0 = src_y;
|
||||
sx1 = sx0 + width - 1;
|
||||
sy1 = sy0 + height - 1;
|
||||
dx0 = dest_x;
|
||||
dy0 = dest_y;
|
||||
dx1 = dx0 + width - 1;
|
||||
dy1 = dy0 + height - 1;
|
||||
|
||||
if (sx0 < 0) {
|
||||
dx0 -= sx0;
|
||||
sx0 = 0;
|
||||
}
|
||||
if (sy0 < 0) {
|
||||
dy0 -= sy0;
|
||||
sy0 = 0;
|
||||
}
|
||||
if (sx1 >= src_segment) {
|
||||
dx1 -= (sx1 - src_segment + 1);
|
||||
sx1 = src_segment - 1;
|
||||
}
|
||||
if (sy1 >= src_common) {
|
||||
dy1 -= (sy1 - src_common + 1);
|
||||
sy1 = src_common - 1;
|
||||
}
|
||||
|
||||
if (dx0 < 0) {
|
||||
sx0 -= dx0;
|
||||
dx0 = 0;
|
||||
}
|
||||
if (dy0 < 0) {
|
||||
sy0 -= dy0;
|
||||
dy0 = 0;
|
||||
}
|
||||
if (dx1 >= dest_segment) {
|
||||
sx1 -= (dx1 - dest_segment + 1);
|
||||
dx1 = dest_segment - 1;
|
||||
}
|
||||
if (dy1 >= dest_common) {
|
||||
sy1 -= (dy1 - dest_common + 1);
|
||||
dy1 = dest_common - 1;
|
||||
}
|
||||
|
||||
if (sx1 < 0 || sx0 >= src_segment) {
|
||||
return;
|
||||
}
|
||||
if (sy1 < 0 || sy0 >= src_common) {
|
||||
return;
|
||||
}
|
||||
if (dx1 < 0 || dx0 >= dest_segment) {
|
||||
return;
|
||||
}
|
||||
if (dy1 < 0 || dy0 >= dest_common) {
|
||||
return;
|
||||
}
|
||||
|
||||
if ((rt_ubase_t)dest < (rt_ubase_t)src) {
|
||||
buff_src = src + (sy0 * src_segment) + sx0;
|
||||
buff_dest = dest + (dy0 * dest_segment) + dx0;
|
||||
for (y = sy0; y <= sy1; y++) {
|
||||
src = buff_src;
|
||||
dest = buff_dest;
|
||||
for (x = sx0; x <= sx1; x++) {
|
||||
*dest++ = *src++;
|
||||
}
|
||||
buff_src += src_segment;
|
||||
buff_dest += dest_segment;
|
||||
}
|
||||
} else {
|
||||
buff_src = src + (sy1 * src_segment) + sx1;
|
||||
buff_dest = dest + (dy1 * dest_segment) + dx1;
|
||||
for (y = sy1; y >= sy0; y--) {
|
||||
src = buff_src;
|
||||
dest = buff_dest;
|
||||
for (x = sx1; x >= sx0; x--) {
|
||||
*dest-- = *src--;
|
||||
}
|
||||
buff_src -= src_segment;
|
||||
buff_dest -= dest_segment;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void drv_lcd_rect_update(lcd_8080_device_t lcd, uint16_t x1, uint16_t y1, uint16_t width, uint16_t height)
|
||||
{
|
||||
static rt_uint16_t * rect_buffer = RT_NULL;
|
||||
if(!rect_buffer)
|
||||
{
|
||||
rect_buffer = rt_malloc_align(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8), 64);
|
||||
if(!rect_buffer)
|
||||
{
|
||||
return;
|
||||
}
|
||||
}
|
||||
if(x1 == 0 && y1 == 0 && width == lcd->lcd_info.width && height == lcd->lcd_info.height)
|
||||
{
|
||||
drv_lcd_set_area(lcd, x1, y1, x1 + width - 1, y1 + height - 1);
|
||||
drv_lcd_data_half_word(lcd, (rt_uint32_t *)lcd->lcd_info.framebuffer, width * height);
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_bitblt(rect_buffer, width, height, 0, 0, width, height,(rt_uint16_t *)lcd->lcd_info.framebuffer, lcd->lcd_info.width, lcd->lcd_info.height, x1, y1);
|
||||
drv_lcd_set_area(lcd, x1, y1, x1 + width - 1, y1 + height - 1);
|
||||
drv_lcd_data_half_word(lcd, (rt_uint16_t *)rect_buffer, width * height);
|
||||
}
|
||||
}
|
||||
|
||||
static rt_err_t drv_lcd_init(rt_device_t dev)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
lcd_8080_device_t lcd = (lcd_8080_device_t)dev;
|
||||
rt_uint8_t data = 0;
|
||||
|
||||
if(!lcd)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
drv_lcd_hw_init(lcd);
|
||||
/* reset LCD */
|
||||
drv_lcd_cmd(lcd, SOFTWARE_RESET);
|
||||
rt_thread_mdelay(100);
|
||||
|
||||
/* Enter normal status */
|
||||
drv_lcd_cmd(lcd, SLEEP_OFF);
|
||||
rt_thread_mdelay(100);
|
||||
|
||||
/* pixel format rgb565 */
|
||||
drv_lcd_cmd(lcd, PIXEL_FORMAT_SET);
|
||||
data = 0x55;
|
||||
drv_lcd_data_byte(lcd, &data, 1);
|
||||
|
||||
/* set direction */
|
||||
drv_lcd_set_direction(lcd, LCD_SCAN_DIR);
|
||||
|
||||
lcd->lcd_info.framebuffer = rt_malloc_align(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8), 64);
|
||||
RT_ASSERT(lcd->lcd_info.framebuffer);
|
||||
|
||||
uint16_t *framebuffer = (uint16_t *)(lcd->lcd_info.framebuffer);
|
||||
for(uint32_t i=0; i<(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8))/2; i++) {
|
||||
framebuffer[i] = BLACK;
|
||||
}
|
||||
/*display on*/
|
||||
drv_lcd_cmd(lcd, DISPALY_ON);
|
||||
|
||||
/* set to black */
|
||||
drv_lcd_clear(lcd, BLACK);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static rt_err_t drv_lcd_open(rt_device_t dev, rt_uint16_t oflag)
|
||||
{
|
||||
|
||||
/* Not need */
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t drv_lcd_close(rt_device_t dev)
|
||||
{
|
||||
|
||||
/* Not need */
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_size_t drv_lcd_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
|
||||
{
|
||||
|
||||
/* Not need */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static rt_size_t drv_lcd_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
|
||||
{
|
||||
|
||||
/* Not need */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static rt_err_t drv_lcd_control(rt_device_t dev, int cmd, void *args)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
lcd_8080_device_t lcd = (lcd_8080_device_t)dev;
|
||||
rt_base_t level;
|
||||
struct rt_device_rect_info* rect_info = (struct rt_device_rect_info*)args;
|
||||
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case RTGRAPHIC_CTRL_RECT_UPDATE:
|
||||
if(!rect_info)
|
||||
{
|
||||
LOG_E("RTGRAPHIC_CTRL_RECT_UPDATE error args");
|
||||
return -RT_ERROR;
|
||||
}
|
||||
drv_lcd_rect_update(lcd, rect_info->x, rect_info->y, rect_info->width, rect_info->height);
|
||||
break;
|
||||
|
||||
#if BSP_LCD_BACKLIGHT_PIN >= 0
|
||||
case RTGRAPHIC_CTRL_POWERON:
|
||||
#if defined(BSP_LCD_BACKLIGHT_ACTIVE_LOW)
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
|
||||
#elif defined(BSP_LCD_BACKLIGHT_ACTIVE_HIGH)
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH);
|
||||
#else
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
|
||||
#endif
|
||||
break;
|
||||
|
||||
case RTGRAPHIC_CTRL_POWEROFF:
|
||||
#if defined(BSP_LCD_BACKLIGHT_ACTIVE_LOW)
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH);
|
||||
#elif defined(BSP_LCD_BACKLIGHT_ACTIVE_HIGH)
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
|
||||
#else
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH);
|
||||
#endif
|
||||
break;
|
||||
#endif /* BSP_LCD_BACKLIGHT_PIN >= 0 */
|
||||
|
||||
case RTGRAPHIC_CTRL_GET_INFO:
|
||||
*(struct rt_device_graphic_info *)args = lcd->lcd_info;
|
||||
break;
|
||||
|
||||
case RTGRAPHIC_CTRL_SET_MODE:
|
||||
ret = -RT_ENOSYS;
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_GET_EXT:
|
||||
ret = -RT_ENOSYS;
|
||||
break;
|
||||
default:
|
||||
LOG_E("drv_lcd_control cmd: %d", cmd);
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
const static struct rt_device_ops drv_lcd_ops =
|
||||
{
|
||||
drv_lcd_init,
|
||||
drv_lcd_open,
|
||||
drv_lcd_close,
|
||||
drv_lcd_read,
|
||||
drv_lcd_write,
|
||||
drv_lcd_control
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
int rt_hw_lcd_init(void)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
lcd_8080_device_t lcd_dev = &_lcddev;
|
||||
|
||||
lcd_dev->cs = SPI_CHIP_SELECT_0;
|
||||
lcd_dev->dc_pin = LCD_DC_PIN;
|
||||
#if BSP_LCD_RST_PIN >= 0
|
||||
lcd_dev->rst_pin = LCD_RST_PIN;
|
||||
#endif
|
||||
#if BSP_LCD_BACKLIGHT_PIN >= 0
|
||||
lcd_dev->backlight_pin = LCD_BACKLIGHT_PIN;
|
||||
#endif
|
||||
dmalock_sync_take(&lcd_dev->dma_channel, RT_WAITING_FOREVER);
|
||||
lcd_dev->spi_channel = SPI_DEVICE_0;
|
||||
lcd_dev->lcd_info.bits_per_pixel = 16;
|
||||
lcd_dev->lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565;
|
||||
|
||||
lcd_dev->parent.type = RT_Device_Class_Graphic;
|
||||
lcd_dev->parent.rx_indicate = RT_NULL;
|
||||
lcd_dev->parent.tx_complete = RT_NULL;
|
||||
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
lcd_dev->parent.ops = &drv_lcd_ops;
|
||||
#else
|
||||
lcd_dev->parent.init = drv_lcd_init;
|
||||
lcd_dev->parent.open = drv_lcd_open;
|
||||
lcd_dev->parent.close = drv_lcd_close;
|
||||
lcd_dev->parent.read = drv_lcd_read;
|
||||
lcd_dev->parent.write = drv_lcd_write;
|
||||
lcd_dev->parent.control = drv_lcd_control;
|
||||
#endif
|
||||
|
||||
lcd_dev->parent.user_data = RT_NULL;
|
||||
|
||||
ret = rt_device_register(&lcd_dev->parent, "lcd", RT_DEVICE_FLAG_RDWR);
|
||||
|
||||
return ret;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(rt_hw_lcd_init);
|
||||
|
||||
void lcd_set_direction(lcd_dir_t dir)
|
||||
{
|
||||
drv_lcd_set_direction(&_lcddev, dir);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-07 ZYH first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_LCD_H__
|
||||
#define DRV_LCD_H__
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
#include <gpiohs.h>
|
||||
#include <spi.h>
|
||||
#include <drv_io_config.h>
|
||||
#include <rthw.h>
|
||||
#include "dmalock.h"
|
||||
|
||||
|
||||
//POINT_COLOR
|
||||
#define WHITE 0xFFFF
|
||||
#define BLACK 0x0000
|
||||
#define BLUE 0x001F
|
||||
#define BRED 0XF81F
|
||||
#define GRED 0XFFE0
|
||||
#define GBLUE 0X07FF
|
||||
#define RED 0xF800
|
||||
#define MAGENTA 0xF81F
|
||||
#define GREEN 0x07E0
|
||||
#define CYAN 0x7FFF
|
||||
#define YELLOW 0xFFE0
|
||||
#define BROWN 0XBC40
|
||||
#define BRRED 0XFC07
|
||||
#define GRAY 0X8430
|
||||
#define GRAY175 0XAD75
|
||||
#define GRAY151 0X94B2
|
||||
#define GRAY187 0XBDD7
|
||||
#define GRAY240 0XF79E
|
||||
|
||||
typedef enum _lcd_dir
|
||||
{
|
||||
DIR_XY_RLUD = 0x00,
|
||||
DIR_YX_RLUD = 0x20,
|
||||
DIR_XY_LRUD = 0x40,
|
||||
DIR_YX_LRUD = 0x60,
|
||||
DIR_XY_RLDU = 0x80,
|
||||
DIR_YX_RLDU = 0xA0,
|
||||
DIR_XY_LRDU = 0xC0,
|
||||
DIR_YX_LRDU = 0xE0,
|
||||
DIR_XY_MASK = 0x20,
|
||||
DIR_MASK = 0xE0,
|
||||
} lcd_dir_t;
|
||||
|
||||
typedef struct lcd_8080_device
|
||||
{
|
||||
struct rt_device parent;
|
||||
struct rt_device_graphic_info lcd_info;
|
||||
int spi_channel;
|
||||
int cs;
|
||||
int dc_pin;
|
||||
#if BSP_LCD_RST_PIN >= 0
|
||||
int rst_pin;
|
||||
#endif
|
||||
#if BSP_LCD_BACKLIGHT_PIN >= 0
|
||||
int backlight_pin;
|
||||
#endif
|
||||
int dma_channel;
|
||||
} * lcd_8080_device_t;
|
||||
|
||||
int rt_hw_lcd_init(void);
|
||||
void drv_lcd_set_area(lcd_8080_device_t lcd, rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2);
|
||||
void drv_lcd_data_word(lcd_8080_device_t lcd, rt_uint32_t *data_buf, rt_uint32_t length);
|
||||
void drv_lcd_data_half_word(lcd_8080_device_t lcd, rt_uint16_t *data_buf, rt_uint32_t length);
|
||||
|
||||
/* for mpy machine.lcd */
|
||||
void lcd_display_on(void);
|
||||
void lcd_display_off(void);
|
||||
void lcd_clear(int color);
|
||||
void lcd_draw_point_color(int x, int y, int color);
|
||||
void lcd_show_string(int x, int y, int size, const char *data);
|
||||
void lcd_draw_line(int x1, int y1, int x2, int y2);
|
||||
void lcd_draw_rectangle(int x1, int y1, int x2, int y2);
|
||||
void lcd_draw_circle(int x1, int y1, int r);
|
||||
void lcd_set_color(int back, int fore);
|
||||
void lcd_show_image(int x, int y, int length, int wide, const unsigned char *buf);
|
||||
void lcd_set_direction(lcd_dir_t dir);
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,27 @@
|
|||
#include <sysctl.h>
|
||||
|
||||
int mp_port_get_freq(int clkid, int *freq)
|
||||
{
|
||||
int ret = 0;
|
||||
uint32_t value;
|
||||
|
||||
switch (clkid)
|
||||
{
|
||||
case 0:
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_CPU);
|
||||
break;
|
||||
case 1:
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL1);
|
||||
break;
|
||||
case 2:
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL2);
|
||||
break;
|
||||
default:
|
||||
ret = -1;
|
||||
break;
|
||||
}
|
||||
|
||||
*freq = (int)value;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -0,0 +1,301 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-18 ZYH first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
#ifdef RT_USING_SPI
|
||||
#include "drv_spi.h"
|
||||
#include <drv_io_config.h>
|
||||
#include <spi.h>
|
||||
#include "dmalock.h"
|
||||
#include <sysctl.h>
|
||||
#include <gpiohs.h>
|
||||
#include <string.h>
|
||||
#include "utils.h"
|
||||
|
||||
#define DRV_SPI_DEVICE(spi_bus) (struct drv_spi_bus *)(spi_bus)
|
||||
|
||||
#define MAX_CLOCK (40000000UL)
|
||||
|
||||
struct drv_spi_bus
|
||||
{
|
||||
struct rt_spi_bus parent;
|
||||
spi_device_num_t spi_instance;
|
||||
dmac_channel_number_t dma_send_channel;
|
||||
dmac_channel_number_t dma_recv_channel;
|
||||
struct rt_completion dma_completion;
|
||||
};
|
||||
|
||||
struct drv_cs
|
||||
{
|
||||
int cs_index;
|
||||
int cs_pin;
|
||||
};
|
||||
|
||||
static volatile spi_t *const spi_instance[4] =
|
||||
{
|
||||
(volatile spi_t *)SPI0_BASE_ADDR,
|
||||
(volatile spi_t *)SPI1_BASE_ADDR,
|
||||
(volatile spi_t *)SPI_SLAVE_BASE_ADDR,
|
||||
(volatile spi_t *)SPI3_BASE_ADDR
|
||||
};
|
||||
|
||||
static rt_err_t drv_spi_configure(struct rt_spi_device *device,
|
||||
struct rt_spi_configuration *configuration)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
int freq = 0;
|
||||
struct drv_spi_bus *bus = DRV_SPI_DEVICE(device->bus);
|
||||
struct drv_cs * cs = (struct drv_cs *)device->parent.user_data;
|
||||
RT_ASSERT(bus != RT_NULL);
|
||||
|
||||
gpiohs_set_drive_mode(cs->cs_pin, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_pin(cs->cs_pin, GPIO_PV_HIGH);
|
||||
|
||||
#ifdef BSP_USING_SPI1_AS_QSPI
|
||||
/* Todo:QSPI*/
|
||||
#else
|
||||
spi_init(bus->spi_instance, configuration->mode & RT_SPI_MODE_3, SPI_FF_STANDARD, configuration->data_width, 0);
|
||||
#endif
|
||||
freq = spi_set_clk_rate(bus->spi_instance, configuration->max_hz > MAX_CLOCK ? MAX_CLOCK : configuration->max_hz);
|
||||
rt_kprintf("set spi freq %d\n", freq);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
void __spi_set_tmod(uint8_t spi_num, uint32_t tmod)
|
||||
{
|
||||
RT_ASSERT(spi_num < SPI_DEVICE_MAX);
|
||||
volatile spi_t *spi_handle = spi[spi_num];
|
||||
uint8_t tmod_offset = 0;
|
||||
switch(spi_num)
|
||||
{
|
||||
case 0:
|
||||
case 1:
|
||||
case 2:
|
||||
tmod_offset = 8;
|
||||
break;
|
||||
case 3:
|
||||
default:
|
||||
tmod_offset = 10;
|
||||
break;
|
||||
}
|
||||
set_bit(&spi_handle->ctrlr0, 3 << tmod_offset, tmod << tmod_offset);
|
||||
}
|
||||
int dma_irq_callback(void *ctx)
|
||||
{
|
||||
struct rt_completion * cmp = ctx;
|
||||
if(cmp)
|
||||
{
|
||||
rt_completion_done(cmp);
|
||||
}
|
||||
}
|
||||
|
||||
static rt_uint32_t drv_spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
|
||||
{
|
||||
struct drv_spi_bus *bus = DRV_SPI_DEVICE(device->bus);
|
||||
struct drv_cs * cs = (struct drv_cs *)device->parent.user_data;
|
||||
struct rt_spi_configuration *cfg = &device->config;
|
||||
uint32_t * tx_buff = RT_NULL;
|
||||
uint32_t * rx_buff = RT_NULL;
|
||||
int i;
|
||||
rt_ubase_t dummy = 0xFFFFFFFFU;
|
||||
if(cfg->data_width != 8)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
RT_ASSERT(bus != RT_NULL);
|
||||
|
||||
if(message->cs_take)
|
||||
{
|
||||
gpiohs_set_pin(cs->cs_pin, GPIO_PV_LOW);
|
||||
}
|
||||
if(message->length)
|
||||
{
|
||||
bus->dma_send_channel = DMAC_CHANNEL_MAX;
|
||||
bus->dma_recv_channel = DMAC_CHANNEL_MAX;
|
||||
|
||||
rt_completion_init(&bus->dma_completion);
|
||||
if(message->recv_buf)
|
||||
{
|
||||
dmalock_sync_take(&bus->dma_recv_channel, RT_WAITING_FOREVER);
|
||||
sysctl_dma_select(bus->dma_recv_channel, SYSCTL_DMA_SELECT_SSI0_RX_REQ + bus->spi_instance * 2);
|
||||
rx_buff = rt_calloc(message->length * 4, 1);
|
||||
if(!rx_buff)
|
||||
{
|
||||
goto transfer_done;
|
||||
}
|
||||
}
|
||||
|
||||
if(message->send_buf)
|
||||
{
|
||||
dmalock_sync_take(&bus->dma_send_channel, RT_WAITING_FOREVER);
|
||||
sysctl_dma_select(bus->dma_send_channel, SYSCTL_DMA_SELECT_SSI0_TX_REQ + bus->spi_instance * 2);
|
||||
tx_buff = rt_malloc(message->length * 4);
|
||||
if(!tx_buff)
|
||||
{
|
||||
goto transfer_done;
|
||||
}
|
||||
for(i = 0; i < message->length; i++)
|
||||
{
|
||||
tx_buff[i] = ((uint8_t *)message->send_buf)[i];
|
||||
}
|
||||
}
|
||||
|
||||
if(message->send_buf && message->recv_buf)
|
||||
{
|
||||
dmac_irq_register(bus->dma_recv_channel, dma_irq_callback, &bus->dma_completion, 1);
|
||||
__spi_set_tmod(bus->spi_instance, SPI_TMOD_TRANS_RECV);
|
||||
spi_instance[bus->spi_instance]->dmacr = 0x3;
|
||||
spi_instance[bus->spi_instance]->ssienr = 0x01;
|
||||
dmac_set_single_mode(bus->dma_recv_channel, (void *)(&spi_instance[bus->spi_instance]->dr[0]), rx_buff, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
|
||||
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, message->length);
|
||||
dmac_set_single_mode(bus->dma_send_channel, tx_buff, (void *)(&spi_instance[bus->spi_instance]->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
|
||||
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, message->length);
|
||||
}
|
||||
else if(message->send_buf)
|
||||
{
|
||||
dmac_irq_register(bus->dma_send_channel, dma_irq_callback, &bus->dma_completion, 1);
|
||||
__spi_set_tmod(bus->spi_instance, SPI_TMOD_TRANS);
|
||||
spi_instance[bus->spi_instance]->dmacr = 0x2;
|
||||
spi_instance[bus->spi_instance]->ssienr = 0x01;
|
||||
dmac_set_single_mode(bus->dma_send_channel, tx_buff, (void *)(&spi_instance[bus->spi_instance]->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
|
||||
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, message->length);
|
||||
}
|
||||
else if(message->recv_buf)
|
||||
{
|
||||
dmac_irq_register(bus->dma_recv_channel, dma_irq_callback, &bus->dma_completion, 1);
|
||||
__spi_set_tmod(bus->spi_instance, SPI_TMOD_RECV);
|
||||
spi_instance[bus->spi_instance]->ctrlr1 = message->length - 1;
|
||||
spi_instance[bus->spi_instance]->dmacr = 0x1;
|
||||
spi_instance[bus->spi_instance]->ssienr = 0x01;
|
||||
spi_instance[bus->spi_instance]->dr[0] = 0xFF;
|
||||
dmac_set_single_mode(bus->dma_recv_channel, (void *)(&spi_instance[bus->spi_instance]->dr[0]), rx_buff, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
|
||||
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, message->length);
|
||||
}
|
||||
else
|
||||
{
|
||||
goto transfer_done;
|
||||
}
|
||||
spi_instance[bus->spi_instance]->ser = 1U << cs->cs_index;
|
||||
|
||||
rt_completion_wait(&bus->dma_completion, RT_WAITING_FOREVER);
|
||||
if(message->recv_buf)
|
||||
dmac_irq_unregister(bus->dma_recv_channel);
|
||||
else
|
||||
dmac_irq_unregister(bus->dma_send_channel);
|
||||
|
||||
// wait until all data has been transmitted
|
||||
while ((spi_instance[bus->spi_instance]->sr & 0x05) != 0x04)
|
||||
;
|
||||
spi_instance[bus->spi_instance]->ser = 0x00;
|
||||
spi_instance[bus->spi_instance]->ssienr = 0x00;
|
||||
|
||||
if(message->recv_buf)
|
||||
{
|
||||
for(i = 0; i < message->length; i++)
|
||||
{
|
||||
((uint8_t *)message->recv_buf)[i] = (uint8_t)rx_buff[i];
|
||||
}
|
||||
}
|
||||
|
||||
transfer_done:
|
||||
dmalock_release(bus->dma_send_channel);
|
||||
dmalock_release(bus->dma_recv_channel);
|
||||
if(tx_buff)
|
||||
{
|
||||
rt_free(tx_buff);
|
||||
}
|
||||
if(rx_buff)
|
||||
{
|
||||
rt_free(rx_buff);
|
||||
}
|
||||
}
|
||||
|
||||
if(message->cs_release)
|
||||
{
|
||||
gpiohs_set_pin(cs->cs_pin, GPIO_PV_HIGH);
|
||||
}
|
||||
|
||||
return message->length;
|
||||
}
|
||||
|
||||
const static struct rt_spi_ops drv_spi_ops =
|
||||
{
|
||||
drv_spi_configure,
|
||||
drv_spi_xfer
|
||||
};
|
||||
|
||||
int rt_hw_spi_init(void)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
|
||||
#ifdef BSP_USING_SPI1
|
||||
{
|
||||
static struct drv_spi_bus spi_bus1;
|
||||
spi_bus1.spi_instance = SPI_DEVICE_1;
|
||||
ret = rt_spi_bus_register(&spi_bus1.parent, "spi1", &drv_spi_ops);
|
||||
|
||||
#ifdef BSP_SPI1_USING_SS0
|
||||
{
|
||||
static struct rt_spi_device spi_device10;
|
||||
static struct drv_cs cs10 =
|
||||
{
|
||||
.cs_index = SPI_CHIP_SELECT_0,
|
||||
.cs_pin = SPI1_CS0_PIN
|
||||
};
|
||||
|
||||
rt_spi_bus_attach_device(&spi_device10, "spi10", "spi1", (void *)&cs10);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_SPI1_USING_SS1
|
||||
{
|
||||
static struct rt_spi_device spi_device11;
|
||||
static struct drv_cs cs11 =
|
||||
{
|
||||
.cs_index = SPI_CHIP_SELECT_1,
|
||||
.cs_pin = SPI1_CS1_PIN
|
||||
};
|
||||
rt_spi_bus_attach_device(&spi_device11, "spi11", "spi1", (void *)&cs11);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_SPI1_USING_SS2
|
||||
{
|
||||
static struct rt_spi_device spi_device12;
|
||||
static struct drv_cs cs12 =
|
||||
{
|
||||
.cs_index = SPI_CHIP_SELECT_2,
|
||||
.cs_pin = SPI1_CS2_PIN
|
||||
};
|
||||
rt_spi_bus_attach_device(&spi_device12, "spi12", "spi1", (void *)&cs12);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_SPI1_USING_SS3
|
||||
{
|
||||
static struct rt_spi_device spi_device13;
|
||||
static struct drv_cs cs13 =
|
||||
{
|
||||
.cs_index = SPI_CHIP_SELECT_2,
|
||||
.cs_pin = SPI1_CS2_PIN
|
||||
};
|
||||
rt_spi_bus_attach_device(&spi_device13, "spi13", "spi1", (void *)&cs13);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(rt_hw_spi_init);
|
||||
#endif
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-18 ZYH first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_SPI_H__
|
||||
#define DRV_SPI_H__
|
||||
|
||||
int rt_hw_spi_init(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
#include <rtthread.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
size_t get_free_heap_size(void)
|
||||
{
|
||||
rt_uint32_t total, used, max;
|
||||
|
||||
rt_memory_info(&total, &used, &max);
|
||||
|
||||
return total - used;
|
||||
}
|
||||
|
|
@ -0,0 +1,7 @@
|
|||
menu "Kendryte SDK Config"
|
||||
|
||||
config PKG_KENDRYTE_SDK_VERNUM
|
||||
hex "Kendryte SDK Version"
|
||||
default 0x0055
|
||||
|
||||
endmenu
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Split('''
|
||||
kendryte-sdk-source/lib/bsp/entry.c
|
||||
kendryte-sdk-source/lib/bsp/entry_user.c
|
||||
kendryte-sdk-source/lib/drivers/aes.c
|
||||
kendryte-sdk-source/lib/drivers/clint.c
|
||||
kendryte-sdk-source/lib/drivers/dmac.c
|
||||
kendryte-sdk-source/lib/drivers/dvp.c
|
||||
kendryte-sdk-source/lib/drivers/fft.c
|
||||
kendryte-sdk-source/lib/drivers/fpioa.c
|
||||
kendryte-sdk-source/lib/drivers/gpio.c
|
||||
kendryte-sdk-source/lib/drivers/gpiohs.c
|
||||
kendryte-sdk-source/lib/drivers/i2c.c
|
||||
kendryte-sdk-source/lib/drivers/i2s.c
|
||||
kendryte-sdk-source/lib/drivers/kpu.c
|
||||
kendryte-sdk-source/lib/drivers/plic.c
|
||||
kendryte-sdk-source/lib/drivers/pwm.c
|
||||
kendryte-sdk-source/lib/drivers/rtc.c
|
||||
kendryte-sdk-source/lib/drivers/sha256.c
|
||||
kendryte-sdk-source/lib/drivers/spi.c
|
||||
kendryte-sdk-source/lib/drivers/sysctl.c
|
||||
kendryte-sdk-source/lib/drivers/timer.c
|
||||
kendryte-sdk-source/lib/drivers/uart.c
|
||||
kendryte-sdk-source/lib/drivers/uarths.c
|
||||
kendryte-sdk-source/lib/drivers/utils.c
|
||||
kendryte-sdk-source/lib/drivers/wdt.c
|
||||
''')
|
||||
CPPPATH = [cwd + '/kendryte-sdk-source/lib/drivers/include',
|
||||
cwd + '/kendryte-sdk-source/lib/bsp/include',
|
||||
cwd + '/kendryte-sdk-source/lib/utils/include']
|
||||
CPPDEFINES = ['CONFIG_LOG_COLORS', 'CONFIG_LOG_ENABLE', 'CONFIG_LOG_LEVEL=LOG_VERBOSE', 'FPGA_PLL', 'LOG_KERNEL', '__riscv64']
|
||||
|
||||
group = DefineGroup('SDK', src, depend = [''], CPPPATH = CPPPATH, LOCAL_CPPDEFINES = CPPDEFINES)
|
||||
|
||||
Return('group')
|
||||
1
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/xidatong-riscv64/kendryte-sdk/kendryte-sdk-source
Submodule
1
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/xidatong-riscv64/kendryte-sdk/kendryte-sdk-source
Submodule
|
|
@ -0,0 +1 @@
|
|||
Subproject commit 77d9df93ba7c2c886967995425638477cd139c4f
|
||||
|
|
@ -0,0 +1,170 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
*/
|
||||
|
||||
INCLUDE "link_stacksize.lds"
|
||||
|
||||
/*
|
||||
* The OUTPUT_ARCH command specifies the machine architecture where the
|
||||
* argument is one of the names used in the Kendryte library.
|
||||
*/
|
||||
OUTPUT_ARCH( "riscv" )
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* 6M SRAM */
|
||||
SRAM : ORIGIN = 0x80000000, LENGTH = 0x600000
|
||||
}
|
||||
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x80000000 ;
|
||||
|
||||
/* __STACKSIZE__ = 4096; */
|
||||
|
||||
.start :
|
||||
{
|
||||
*(.start);
|
||||
} > SRAM
|
||||
|
||||
. = ALIGN(8);
|
||||
|
||||
.text :
|
||||
{
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(8);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
. = ALIGN(8);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
. = ALIGN(8);
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(8);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
. = ALIGN(8);
|
||||
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
. = ALIGN(8);
|
||||
|
||||
__rt_utest_tc_tab_start = .;
|
||||
KEEP(*(UtestTcTab))
|
||||
__rt_utest_tc_tab_end = .;
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .;
|
||||
} > SRAM
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame_entry)
|
||||
} > SRAM
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > SRAM
|
||||
|
||||
. = ALIGN(8);
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
|
||||
*(.data1)
|
||||
*(.data1.*)
|
||||
|
||||
. = ALIGN(8);
|
||||
PROVIDE( __global_pointer$ = . + 0x800 );
|
||||
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
} > SRAM
|
||||
|
||||
/* stack for dual core */
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(64);
|
||||
__stack_start__ = .;
|
||||
|
||||
. += __STACKSIZE__;
|
||||
__stack_cpu0 = .;
|
||||
|
||||
. += __STACKSIZE__;
|
||||
__stack_cpu1 = .;
|
||||
} > SRAM
|
||||
|
||||
.sbss :
|
||||
{
|
||||
__bss_start = .;
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
*(.dynsbss)
|
||||
*(.scommon)
|
||||
} > SRAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(.dynbss)
|
||||
*(COMMON)
|
||||
__bss_end = .;
|
||||
} > SRAM
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
|
|
@ -0,0 +1 @@
|
|||
__STACKSIZE__ = 4096;
|
||||
|
|
@ -0,0 +1,237 @@
|
|||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XIUOS Rt-thread Configuration */
|
||||
|
||||
#define ROOT_DIR "../../../.."
|
||||
#define BSP_DIR "."
|
||||
#define RT_Thread_DIR "../.."
|
||||
#define RTT_DIR "../../rt-thread"
|
||||
#define BOARD_K210_EVB
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_USING_SMP
|
||||
#define RT_CPUS_NR 2
|
||||
#define RT_ALIGN_SIZE 8
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 4096
|
||||
#define SYSTEM_THREAD_STACK_SIZE 4096
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
#define RT_DEBUG
|
||||
#define RT_DEBUG_COLOR
|
||||
#define RT_DEBUG_INIT_CONFIG
|
||||
#define RT_DEBUG_INIT 1
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
#define RT_USING_SIGNALS
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_USING_SLAB
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uarths"
|
||||
#define RT_VER_NUM 0x40004
|
||||
#define ARCH_CPU_64BIT
|
||||
#define ARCH_RISCV
|
||||
#define ARCH_RISCV_FPU
|
||||
#define ARCH_RISCV_FPU_S
|
||||
#define ARCH_RISCV64
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 8192
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define RT_USING_CPLUSPLUS
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define RT_USING_FINSH
|
||||
#define RT_USING_MSH
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 16384
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define MSH_USING_BUILT_IN_COMMANDS
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device virtual file system */
|
||||
|
||||
#define RT_USING_DFS
|
||||
#define DFS_USING_WORKDIR
|
||||
#define DFS_FILESYSTEMS_MAX 16
|
||||
#define DFS_FILESYSTEM_TYPES_MAX 16
|
||||
#define DFS_FD_MAX 64
|
||||
#define RT_USING_DFS_ELMFAT
|
||||
|
||||
/* elm-chan's FatFs, Generic FAT Filesystem Module */
|
||||
|
||||
#define RT_DFS_ELM_CODE_PAGE 437
|
||||
#define RT_DFS_ELM_WORD_ACCESS
|
||||
#define RT_DFS_ELM_USE_LFN_3
|
||||
#define RT_DFS_ELM_USE_LFN 3
|
||||
#define RT_DFS_ELM_LFN_UNICODE_0
|
||||
#define RT_DFS_ELM_LFN_UNICODE 0
|
||||
#define RT_DFS_ELM_MAX_LFN 255
|
||||
#define RT_DFS_ELM_DRIVES 2
|
||||
#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
|
||||
#define RT_DFS_ELM_REENTRANT
|
||||
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
|
||||
#define RT_USING_DFS_DEVFS
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_PIPE_BUFSZ 512
|
||||
#define RT_USING_SYSTEM_WORKQUEUE
|
||||
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
|
||||
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_SPI
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_USING_LIBC
|
||||
#define RT_USING_PTHREADS
|
||||
#define PTHREAD_NUM_MAX 8
|
||||
#define RT_USING_POSIX
|
||||
#define RT_LIBC_USING_TIME
|
||||
#define RT_LIBC_DEFAULT_TIMEZONE 8
|
||||
|
||||
/* Network */
|
||||
|
||||
/* Socket abstraction layer */
|
||||
|
||||
|
||||
/* Network interface device */
|
||||
|
||||
|
||||
/* light weight TCP/IP stack */
|
||||
|
||||
|
||||
/* AT commands */
|
||||
|
||||
|
||||
/* VBUS(Virtual Software BUS) */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
|
||||
/* Board Drivers Config */
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define __STACKSIZE__ 4096
|
||||
#define BSP_USING_UART_HS
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_LCD
|
||||
#define BSP_LCD_CS_PIN 41
|
||||
#define BSP_LCD_WR_PIN 38
|
||||
#define BSP_LCD_DC_PIN 39
|
||||
#define BSP_LCD_RST_PIN 37
|
||||
#define BSP_LCD_BACKLIGHT_PIN -1
|
||||
#define BSP_LCD_BACKLIGHT_ACTIVE_LOW
|
||||
#define BSP_LCD_CLK_FREQ 15000000
|
||||
#define BSP_BOARD_K210_OPENMV_TEST
|
||||
#define BSP_LCD_X_MAX 272
|
||||
#define BSP_LCD_Y_MAX 480
|
||||
|
||||
/* Kendryte SDK Config */
|
||||
|
||||
#define PKG_KENDRYTE_SDK_VERNUM 0x0055
|
||||
|
||||
/* MicroPython */
|
||||
|
||||
|
||||
/* More Drivers */
|
||||
|
||||
|
||||
/* APP_Framework */
|
||||
|
||||
/* Framework */
|
||||
|
||||
#define TRANSFORM_LAYER_ATTRIUBUTE
|
||||
#define ADD_RTTHREAD_FETURES
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 1024
|
||||
|
||||
/* ota app */
|
||||
|
||||
|
||||
/* test app */
|
||||
|
||||
|
||||
/* connection app */
|
||||
|
||||
|
||||
/* control app */
|
||||
|
||||
/* knowing app */
|
||||
|
||||
|
||||
/* sensor app */
|
||||
|
||||
#define APPLICATION_SENSOR
|
||||
|
||||
/* lib */
|
||||
|
||||
#define APP_SELECT_NEWLIB
|
||||
|
||||
/* LVGL configuration */
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH ='risc-v'
|
||||
CPU ='k210'
|
||||
CROSS_TOOL ='gcc'
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'/opt/xpack-riscv-none-gcc/bin'
|
||||
else:
|
||||
print('Please make sure your toolchains is GNU GCC!')
|
||||
exit(0)
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
PREFIX = 'riscv-none-embed-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcmodel=medany -march=rv64imafc -mabi=lp64f -fsingle-precision-constant'
|
||||
CFLAGS = DEVICE + ' -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
|
||||
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds'
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -ggdb'
|
||||
AFLAGS += ' -ggdb'
|
||||
else:
|
||||
CFLAGS += ' -O2 -Os'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
# we use c++ 11, but -std=c++11 don't have 'struct siginfo', need gnu++11
|
||||
CXXFLAGS += ' -std=gnu++11'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
Loading…
Reference in New Issue