add xidatong-riscv64 board

This commit is contained in:
Wang_Weigen
2022-07-05 10:54:24 +08:00
parent b4a92c91f5
commit 74fd934a02
106 changed files with 28396 additions and 1 deletions
+4
View File
@@ -16,6 +16,10 @@ ifeq ($(CONFIG_BOARD_AIIT_RISCV_EVB),y)
SRC_DIR +=k210
endif
ifeq ($(CONFIG_BOARD_XIDATONG_RISCV64_EVB),y)
SRC_DIR +=k210
endif
ifeq ($(CONFIG_BOARD_GAPUINO),y)
SRC_DIR +=gap8
endif