forked from xuos/xiuos
feat add third_party_driver/spi for hc32f4a0 board, compile OK
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@@ -28,27 +28,27 @@ extern "C" {
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#endif
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#define SPI_MAX_CLOCK 40000000
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#define spi_device_max_num 4
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#define spi_device_max_num 4
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#define SPI_LINE_CPHA (1<<0)
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#define SPI_LINE_CPOL (1<<1)
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#define SPI_LINE_CPHA (1 << 0)
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#define SPI_LINE_CPOL (1 << 1)
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#define SPI_LSB (0<<2)
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#define SPI_MSB (1<<2)
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#define SPI_LSB (0 << 2)
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#define SPI_MSB (1 << 2)
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#define SPI_MASTER (0<<3)
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#define DEV_SPI_SLAVE (1<<3)
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#define SPI_DEV_MASTER (0 << 3)
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#define SPI_DEV_SLAVE (1 << 3)
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#define SPI_MODE_0 (0 | 0)
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#define SPI_MODE_1 (0 | SPI_LINE_CPHA)
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#define SPI_MODE_2 (SPI_LINE_CPOL | 0)
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#define SPI_MODE_3 (SPI_LINE_CPOL | SPI_LINE_CPHA)
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#define SPI_MODE_MASK (SPI_LINE_CPHA | SPI_LINE_CPOL | SPI_MSB)
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#define SPI_MODE_0 (0 | 0)
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#define SPI_MODE_1 (0 | SPI_LINE_CPHA)
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#define SPI_MODE_2 (SPI_LINE_CPOL | 0)
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#define SPI_MODE_3 (SPI_LINE_CPOL | SPI_LINE_CPHA)
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#define SPI_MODE_MASK (SPI_LINE_CPHA | SPI_LINE_CPOL | SPI_MSB)
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#define SPI_CS_HIGH (1<<4)
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#define SPI_NO_CS (1<<5)
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#define SPI_3WIRE (1<<6)
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#define SPI_READY (1<<7)
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#define SPI_CS_HIGH (1 << 4)
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#define SPI_NO_CS (1 << 5)
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#define SPI_3WIRE (1 << 6)
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#define SPI_READY (1 << 7)
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struct SpiDataStandard
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{
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@@ -83,9 +83,10 @@ struct SpiDmaParam
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struct SpiSlaveParam
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{
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uint8 spi_slave_id;
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uint8 spi_cs_gpio_pin;
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uint8 spi_cs_select_id;
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uint32 spi_slave_id;
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uint32 spi_cs_gpio_pin;
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uint32 spi_cs_gpio_port;
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uint32 spi_cs_select_id;
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};
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typedef struct
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