modify nuttx bug of lack of files

This commit is contained in:
TangYiwen123
2021-06-11 11:25:07 +08:00
parent 4a7f51a5e9
commit 6d0f2ca39a
6752 changed files with 1528133 additions and 0 deletions
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#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_NE64BADGE
endif
@@ -0,0 +1,492 @@
README
^^^^^^
This README discusses issues unique to NuttX configurations for the
Future Electronics Group NE64 /PoE Badge board based on the
MC9S12NE64 hcs12 cpu.
CONTENTS
^^^^^^^^
• MC9S12NE64 Features
• NE64 Badge Pin Usage
• Development Environment
• NuttX Buildroot Toolchain
• FreeScale HCS12 Serial Monitor
• Soft Registers
• HCS12/NE64BADGE-specific Configuration Options
• Configurations
MC9S12NE64 Features
^^^^^^^^^^^^^^^^^^^
• 16-bit HCS12 core
- HCS12 CPU
- Upward compatible with M68HC11 instruction set
- Interrupt stacking and programmers model identical to M68HC11
- Instruction queue
- Enhanced indexed addressing
- Memory map and interface (MMC)
- Interrupt control (INT)
- Background debug mode (BDM)
- Enhanced debug12 module, including breakpoints and change-of-flow
trace buffer (DBG)
- Multiplexed expansion bus interface (MEBI) - available only in
112-pin package version
• Wakeup interrupt inputs
- Up to 21 port bits available for wakeup interrupt function with
digital filtering
• Memory
- 64K bytes of FLASH EEPROM
- 8K bytes of RAM
• Analog-to-digital converter (ATD)
- One 8-channel module with 10-bit resolution
- External conversion trigger capability
• Timer module (TIM)
- 4-channel timer
- Each channel configurable as either input capture or output
compare
- Simple PWM mode
- Modulo reset of timer counter
- 16-bit pulse accumulator
- External event counting
- Gated time accumulation
• Serial interfaces
- Two asynchronous serial communications interface (SCI)
- One synchronous serial peripheral interface (SPI)
- One inter-IC bus (IIC)
• Ethernet Media access controller (EMAC)
- IEEE 802.3 compliant
- Medium-independent interface (MII)
- Full-duplex and half-duplex modes
- Flow control using pause frames
- MII management function
- Address recognition
- Frames with broadcast address are always accepted or always
rejected
- Exact match for single 48-bit individual (unicast) address
- Hash (64-bit hash) check of group (multicast) addresses
- Promiscuous mode
• Ethertype filter
• Loopback mode
• Two receive and one transmit Ethernet buffer interfaces
• Ethernet 10/100 Mbps transceiver (EPHY)
- IEEE 802.3 compliant
- Digital adaptive equalization
- Half-duplex and full-duplex
- Auto-negotiation next page ability
- Baseline wander (BLW) correction
- 125-MHz clock generator and timing recovery
- Integrated wave-shaping circuitry
- Loopback modes
• CRG (clock and reset generator module)
- Windowed COP watchdog
- Real-time interrupt
- Clock monitor
- Pierce oscillator
- Phase-locked loop clock frequency multiplier
- Limp home mode in absence of external clock
- 25-MHz crystal oscillator reference clock
• Operating frequency
- 50 MHz equivalent to 25 MHz bus speed for single chip
- 32 MHz equivalent to 16 MHz bus speed in expanded bus modes
• Internal 2.5-V regulator
- Supports an input voltage range from 3.3 V ± 5%
- Low-power mode capability
- Includes low-voltage reset (LVR) circuitry
• 80-pin TQFP-EP or 112-pin LQFP package
- Up to 70 I/O pins with 3.3 V input and drive capability (112-pin
package)
- Up to two dedicated 3.3 V input only lines (IRQ, XIRQ)
• Development support
- Single-wire background debug™ mode (BDM)
- On-chip hardware breakpoints
- Enhanced DBG debug features
NE64 Badge Pin Usage
^^^^^^^^^^^^^^^^^^^^
PIN PIN NAME BOARD SIGNAL NOTES
--- ------------------- -------------- ----------------------
44 RESET J3 RESET_L Also to SW3
57 BKGD/MODC/TAGHI_B BDM BKGD CON6A
85 PAD0 VR1 Potentiometer
86 PAD1 J3 ANALOG_IN0 Not used on board
87 PAD2 J3 ANALOG_IN1 " " " " "" " "
88 PAD3 J3 ANALOG_IN2 " " " " "" " "
89 PAD4 J3 ANALOG_IN3 " " " " "" " "
70 PHY_TXP J7 TD+ RJ45 connector
71 PHY_TXN J7 TD- RJ45 connector
73 PHY_RXP J7 RD+ RJ45 connector
74 PHY_RXN J7 RD- RJ45 connector
Ports A,B,E,K managed by the MEBI block
---------------------------------------
60 PA0/ADDR8/DATA8 J3 ADDR_DATA8 Not used on board
61 PA1/ADDR9/DATA9 J3 ADDR_DATA9 " " " " "" " "
62 PA2/ADDR10/DATA10 J3 ADDR_DATA10 " " " " "" " "
63 PA3/ADDR11/DATA11 J3 ADDR_DATA11 " " " " "" " "
77 PA4/ADDR12/DATA12 J3 ADDR_DATA12 " " " " "" " "
78 PA5/ADDR13/DATA13 J3 ADDR_DATA13 " " " " "" " "
79 PA6/ADDR14/DATA14 J3 ADDR_DATA14 " " " " "" " "
80 PA7/ADDR15/DATA15 J3 ADDR_DATA15 " " " " "" " "
10 PB0/ADDR0/DATA0 J3 ADDR_DATA0 Not used on board
11 PB1/ADDR1/DATA1 J3 ADDR_DATA1 " " " " "" " "
12 PB2/ADDR2/DATA2 J3 ADDR_DATA2 " " " " "" " "
13 PB3/ADDR3/DATA3 J3 ADDR_DATA3 " " " " "" " "
16 PB4/ADDR4/DATA4 J3 ADDR_DATA4 " " " " "" " "
17 PB5/ADDR5/DATA5 J3 ADDR_DATA5 " " " " "" " "
18 PB6/ADDR6/DATA6 J3 ADDR_DATA6 " " " " "" " "
19 PB7/ADDR7/DATA7 J3 ADDR_DATA7 " " " " "" " "
56 PE0/XIRQ_B BUTTON1 SW1
55 PE1/IRQ_B J3 IRQ Not used on board
54 PE2/R_W J3 RW " " " " "" " "
53 PE3/LSTRB_B/TAGLO_B J3 LSTRB " " " " "" " "
41 PE4/ECLK J3 ECLK " " " " "" " "
40 PE5/IPIPE0/MODA J3 MODA " " " " "" " "
39 PE6/IPIPE1/MODB J3 MODB " " " " "" " "
38 PE7/NOACC/XCLKS_B pulled low pulled low
97 PK0/XADR14 N/C N/C
98 PK1/XADR15 N/C N/C
99 PK2/XADR16 N/C N/C
100 PK3/XADR17 N/C N/C
103 PK4/XADR18 N/C N/C
104 PK5/XADR19 N/C N/C
105 PK6/XCS_B J3 XCS Not used on board
106 PK7/ECS_B/ROMCTL J3 ECS " " " " "" " "
Ports T,S,G,H,J,L managed by the PIM Block
------------------------------------------
110 PT4/IOC1_4 J3 GPIO8 Not used on board
109 PT5/IOC1_5 J3 GPIO9 " " " " "" " "
108 PT6/IOC1_6 J3 GPIO10 " " " " "" " "
107 PT7/IOC1_7 N/C N/C
30 PS0/RXD0 RS232_RX Eventually maps to J2 RXD
31 PS1/TXD0 RS232_TX Eventually maps to J2 TXD
32 PS2/RXD1 J3&J4 UART_RX Not used on board
33 PS3/TXD1 J3&J4 UART_TX " " " " "" " "
34 PS4/MISO J3 SPI_MISO " " " " "" " "
35 PS5/MOSI J3 SPI_MOSI " " " " "" " "
36 PS6/SCK J3 SPI_CLOCK " " " " "" " "
37 PS7/SS_B J3 SPI_SS " " " " "" " "
22 PG0/RXD0/KWG0 J3 GPIO0 Not used on board
23 PG1/RXD1/KWG1 J3 GPIO1 " " " " "" " "
24 PG2/RXD2/KWG2 J3 GPIO2 " " " " "" " "
25 PG3/RXD3/KWG3 J3 GPIO3 " " " " "" " "
26 PG4/RXCLK/KWG4 J3 GPIO4 " " " " "" " "
27 PG5/RXDV/KWG5 J3 GPIO5 " " " " "" " "
28 PG6/RXER/KWG6 J3 GPIO6 " " " " "" " "
29 PG7/KWG7 J3 GPIO7 " " " " "" " "
7 PH0/TXD0/KWH0 N/C N/C
6 PH1/TXD1/KWH1 N/C N/C
5 PH2/TXD2/KWH2 J4 XBEE_RESET Not used on board
4 PH3/TXD3/KWH3 J4 XBEE_RSSI Not used on board
3 PH4/TXCLK/KWH4 BUTTON2 SW2
2 PH5/TXDV/KWH5 J5 XBEE_LOAD_H Not used on board
1 PH6/TXER/KWH6 J4 XBEE_LOAD_L Not used on board
8 PJ0/MDC/KWJ0 LED1 D21, red
9 PJ1/MDIO/KWJ1 LED2 D22, red
20 PJ2/CRS/KWJ2 J3 SPI_CS Not used on board
21 PJ3/COL/KWJ3 N/C
112 PJ6/SDA/KWJ6 J3 I2C_DATA Not used on board
111 PJ7/SCL/KWJ7 J3 I2C_CLOCK " " " " "" " "
51 PL6/TXER/KWL6 N/C N/C
52 PL5/TXDV/KWL5 N/C N/C
58 PL4/COLLED Collision LED red
59 PL3/DUPLED Full Duplex LED yellow
81 PL2/SPDLED 100Mbps Speed LED yellow
83 PL1/LNKLED Link Good LED green
84 PL0/ACTLED Activity LED yellow
Development Environment
^^^^^^^^^^^^^^^^^^^^^^^
Either Linux or Cygwin on Windows can be used for the development
environment. The source has been built only using the GNU toolchain
(see below). Other toolchains will likely cause problems.
NuttX Buildroot Toolchain
^^^^^^^^^^^^^^^^^^^^^^^^^
A GNU GCC-based toolchain is assumed. The PATH environment variable should
be modified to point to the correct path to the HC12 GCC toolchain (if
different from the default in your PATH variable).
If you have no HC12 toolchain, one can be downloaded from the NuttX
Bitbucket download site (https://bitbucket.org/nuttx/buildroot/downloads/).
This GNU toolchain builds and executes in the Linux or Cygwin
environments.
1. You must have already configured NuttX in <some-dir>/nuttx.
tools/configure.sh ne64badge:<sub-dir>
2. Download the latest buildroot package into <some-dir>
3. unpack the buildroot tarball. The resulting directory may
have versioning information on it like buildroot-x.y.z. If so,
rename <some-dir>/buildroot-x.y.z to <some-dir>/buildroot.
4. cd <some-dir>/buildroot
5. cp boards/m9s12x-defconfig-3.3.6 .config
6. make oldconfig
7. make
If the make fails because it can't find the file to download, you may
have to locate the file on the internet and download it into the archives/
directory manually. For example, binutils-2.18 can be found here:
http://ftp.gnu.org/gnu/binutils/
8. Make sure that the PATH variable includes the path to the newly built
binaries.
See the file boards/README.txt in the buildroot source tree. That has more
detailed PLUS some special instructions that you will need to follow if you are
building a Cortex-M3 toolchain for Cygwin under Windows.
FreeScale HCS12 Serial Monitor
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
General:
The NuttX HCS12 port is configured to use the Freescale HCS serial
monitor. This monitor supports primitive debug commands that allow
FLASH/EEPROM programming and debugging through an RS-232 serial
interface. The serial monior is 2Kb in size and resides in FLASH at
addresses 0xf800-0xffff. The monitor does not use any RAM other than
the stack itself.
AN2458
The serial monitor is described in detail in Freescale Application
Note AN2458.pdf.
COP:
The serial monitor uses the COP for the cold reset function and should
not be used by the application without some precautions (see AN2458).
Clocking:
The serial monitor sets the operating frequency to 24 MHz. This is
not altered by the NuttX start-up; doing so would interfere with the
operation of the serial monitor.
Memory Configuration:
Registers:
• Register space is located at 0x00000x03ff.
FLASH:
• FLASH memory is any address greater than 0x4000. All paged
addresses are assumed to be FLASH memory.
• Application code should exclude the 0xf7800xff7f memory.
SRAM:
• RAM ends at 0x3FFF and builds down to the limit of the devices
available RAM.
• The serial monitor's stack pointer is set to the end of RAM+1
(0x4000).
EEPROM:
• EEPROM (if the target device has any) is limited to the available
space between the registers and the RAM (0x0400to start of RAM).
External Devices:
• External devices attached to the multiplexed external bus
interface are not supported
Serial Communications:
The serial monitor uses RS-232 serial communications through SCI0 at
115,200 baud. The monitor must have exclusive use of this interface.
Access to the serial port is available through a monitor jump table.
Interrupts:
The serial monitor redirects interrupt vectors to an unprotected
portion of FLASH just before the protected monitor program
(0xf7800xf7fe). The monitor will automatically redirect vector
programming operations to these user vectors. The user code should
therefore keep the normal (non-monitor) vector locations
(0xff800xfffe).
Soft Registers
^^^^^^^^^^^^^^
The mc68hcs12 compilation is prone to errors like the following:
CC: lib_b16sin.c
lib_b16sin.c: In function `b16sin':
lib_b16sin.c:110: error: unable to find a register to spill in class `S_REGS'
lib_b16sin.c:110: error: this is the insn:
(insn:HI 41 46 44 8 (parallel [
(set (subreg:SI (reg:DI 58 [ rad ]) 4)
(reg/v:SI 54 [ rad ]))
(clobber (scratch:HI))
]) 20 {movsi_internal} (insn_list 46 (nil))
(expr_list:REG_UNUSED (scratch:HI)
(expr_list:REG_NO_CONFLICT (reg/v:SI 54 [ rad ])
(nil))))
lib_b16sin.c:110: confused by earlier errors, bailing out
There are several ways that this error could be fixed:
1. Increase the number of soft registers (i.e., "fake" registers defined
at fixed memory locations). This can be done by adding something like
-msoft-reg-count=4 to the CFLAGS. This approach was not taken
because:
- This slows hcs12 performance
- All of these soft registers wouil have to be saved and restored
on every interrupt and context switch.
2. Lowering the optimization level by dropping -Os to -O2 or, more likely,
by removing -fomit-frame-pointer. Also not desirable becauase 99% of the
files that do not have this problem also increase in size. Special case
compilation with reduced optimization levels just for the files that need
it could be done, but this would complicate the make system.
3. Restructuring files to reduce the complexity. If you add local variables
to hold intermediate computational results, this error can be eliminated.
This is the approach taken in NuttX. It has disadvantages only in that
(1) it takes some effort and good guessing to eliminate the problem, and (2)
the problem is not really eliminated -- it can and will re-occur when files
are changed or new files are added.
4. Many files are built that are needed by DEM09S12NE64. Another very simple
option if those problem files are needed is to just remove the offending
files from the Make.defs file so that they no longer cause a problem.
HCS12/NE64BADGE-specific Configuration Options
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=hc
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_HC=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_HCS12=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=mc92s12nec64
CONFIG_ARCH_CHIP_name - For use in C code
CONFIG_ARCH_CHIP_MCS92S12NEC64
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=ne64badge
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_NE64BADGE (for the Future Electronics Group NE64 Badge)
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed RAM.
CONFIG_RAM_START - The start address of installed RAM
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
GPIO Interrupts
CONFIG_HCS12_GPIOIRQ - Enable general support for GPIO IRQs
CONFIG_HCS12_PORTG_INTS - Enable PortG IRQs
CONFIG_HCS12_PORTH_INTS - Enable PortH IRQs
CONFIG_HCS12_PORTJ_INTS - Enable PortJ IRQs
HCS12 build options:
CONFIG_HCS12_SERIALMON - Indicates that the target systems uses
the Freescale serial bootloader.
CONFIG_HCS12_NONBANKED - Indicates that the target systems does not
support banking. Only short calls are made; one fixed page is
presented in the paging window. Only 48Kb of FLASH is usable
in this configuration: pages 3e, 3d, then 3f will appear as a
contiguous address space in memory.
HCS12 Sub-system support
CONFIG_HCS12_SCI0
CONFIG_HCS12_SCI1
HCS12 specific device driver settings:
CONFIG_SCIn_SERIAL_CONSOLE - selects SCIn for the console and ttys0
(default is the SCI0).
CONFIG_SCIn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_SCIn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_SCIn_BAUD - The configure BAUD of the UART.
CONFIG_SCIn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_SCIn_PARTIY - 0=no parity, 1=odd parity, 2=even parity, 3=mark 1, 4=space 0
CONFIG_SCIn_2STOP - Two stop bits
Configurations
^^^^^^^^^^^^^^
Common Configuration Notes
--------------------------
1. Each Freescale HCS12 configuration is maintained in a sub-directory and
can be selected as follow:
tools/configure.sh ne64badge:<subdir>
Where <subdir> is one of the configuration sub-directories described in
the following paragraph.
2. These configurations use the mconf-based configuration tool. To
change a configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
3. By default, all configurations assume that you are building under
Linux (should work under Windows with Cygwin as well). This is
easily reconfigured:
CONFIG_HOST_LINUX=y
Configuration Sub-Directories
-----------------------------
ostest
This configuration directory, performs a simple OS test using
examples/ostest.
@@ -0,0 +1,50 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_DEV_CONSOLE is not set
# CONFIG_FILE_STREAM is not set
# CONFIG_STANDARD_SERIAL is not set
CONFIG_ARCH="hc"
CONFIG_ARCH_BOARD="ne64badge"
CONFIG_ARCH_BOARD_NE64BADGE=y
CONFIG_ARCH_CHIP="m9s12"
CONFIG_ARCH_CHIP_MCS92S12NEC64=y
CONFIG_ARCH_HC=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=5483
CONFIG_DISABLE_ENVIRON=y
CONFIG_DISABLE_MOUNTPOINT=y
CONFIG_DISABLE_MQUEUE=y
CONFIG_DISABLE_POSIX_TIMERS=y
CONFIG_DISABLE_PTHREAD=y
CONFIG_HCS12_NONBANKED=y
CONFIG_HCS12_SCI0=y
CONFIG_IDLETHREAD_STACKSIZE=256
CONFIG_MAX_TASKS=8
CONFIG_MOTOROLA_SREC=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=3
CONFIG_NUNGET_CHARS=0
CONFIG_PREALLOC_TIMERS=0
CONFIG_PTHREAD_STACK_DEFAULT=256
CONFIG_RAM_SIZE=65536
CONFIG_RAM_START=0x20000000
CONFIG_RR_INTERVAL=200
CONFIG_SCI0_BAUD=38400
CONFIG_SCI0_RXBUFSIZE=32
CONFIG_SCI0_SERIAL_CONSOLE=y
CONFIG_SCI0_TXBUFSIZE=32
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=11
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2009
CONFIG_STDIO_DISABLE_BUFFERING=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_TESTING_OSTEST=y
CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3
CONFIG_TESTING_OSTEST_STACKSIZE=512
CONFIG_USERMAIN_STACKSIZE=512
CONFIG_USER_ENTRYPOINT="ostest_main"
@@ -0,0 +1,89 @@
/****************************************************************************
* boards/hc/m9s12/ne64badge/include/board.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_HC_MCS92S12NE64_NE64BADGE_INCLUDE_BOARD_H
#define __BOARDS_HC_MCS92S12NE64_NE64BADGE_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
/* Frequency of the crystal oscillator */
#define HCS12_OSCCLK 16000000 /* 16MHz */
/* PLL Settings
*
* SYNR register controls the multiplication factor of the PLL.
* If the PLL is on, the count in the loop divider (SYNR) register
* effectively multiplies up the PLL clock (PLLCLK) from the reference
* frequency by 2 x (SYNR+1). PLLCLK will not be below
* the minimum VCO frequency (fSCM).
*
* The REFDV register provides a finer granularity for the PLL multiplier
* steps.
* The count in the reference divider divides OSCCLK frequency by REFDV + 1.
*
* PLLCLK = 2 * OSCCLK * (SYNR + 1) / (REFDV + 1)
*
* If (PLLSEL = 1), Bus Clock = PLLCLK / 2
*/
#define HCS12_SYNR_VALUE 0x15
#define HCS12_REFDV_VALUE 0x15
#define HCS12_PLLCLK (2*HCS12_OSCCLK*(HCS12_SYNR+1)/(HCS12_REFDV+1))
#define HCS12_BUSCLK (HSC12_PLLCLK/2)
/* LED definitions **********************************************************/
/* The NE64 Badge board has 2 red LEDs that we will encode as: */
/* LED1 LED2 */
#define LED_STARTED 0 /* OFF OFF = Still initializing */
#define LED_HEAPALLOCATE 0 /* OFF OFF = Still initializing */
#define LED_IRQSENABLED 0 /* OFF OFF = Still initializing */
#define LED_STACKCREATED 1 /* ON OFF = Initialization complete */
#define LED_INIRQ 2 /* NC ON = In an interrupt handler */
#define LED_SIGNAL 2 /* NC ON = In a signal handler */
#define LED_ASSERTION 2 /* NC ON = In an assertion */
#define LED_PANIC 2 /* NC ON = Oops! We crashed. (flashing) */
/* Button definitions *******************************************************/
/* The NE64 badge has 2 switches,
* one labeled SW1 and the other SW2 on the board (but
* referred to as button1 and button2 in some documentation)
*/
#define BUTTON1 1 /* Bit 0: SW1 button is depressed */
#define BUTTON2 2 /* Bit 1: SW2 button is depressed */
#endif /* __BOARDS_HC_MCS92S12NE64_NE64BADGE_INCLUDE_BOARD_H */
@@ -0,0 +1,77 @@
############################################################################
# boards/hc/m9s12/ne64badge/scripts/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
# Setup for the selected toolchain
# NuttX buildroot under Linux or Cygwin
CROSSDEV = m9s12x-nuttx-elf-
MAXOPTIMIZATION = -Os
ifeq ($(CONFIG_HCS12_NONBANKED),y)
ARCHCPUFLAGS = -m9s12x -mshort -mnolong-calls
LDSCRIPT = ne64badge-nonbanked.ld
else
ARCHCPUFLAGS = -m9s12x -mshort -mlong-calls
LDSCRIPT = ne64badge-banked.ld
endif
ifneq ($(CONFIG_HCS12_MSOFTREGS),0)
ARCHCPUFLAGS += -msoft-reg-count=$(CONFIG_HCS12_MSOFTREGS)
endif
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
MAXOPTIMIZATION = -O2
else
ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
LDFLAGS += -nostartfiles -nodefaultlibs
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
@@ -0,0 +1,136 @@
/****************************************************************************
* boards/hc/m9s12/ne64badge/scripts/ne64badge-banked.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The NE64 Badge has 64Kb of FLASH and 8Kb of SRAM that are assumed to be
* paged and positioned as below:
*/
MEMORY
{
/* The register space resides at address 0x0000-0x03ff. The following
* address, 0x0400-0x1fff are unused.
*
* The 8Kb SRAM is mapped to 0x2000-0x2fff.
*/
sram (rwx) : ORIGIN = 0x2000, LENGTH = 8K
/* Two fixed text flash pages (corresponding to page 3e and 3f). The
* top 256 bytes of page 3f is reserved to hold the interrupt vectors
*/
lowtext(rx) : ORIGIN = 0x4000, LENGTH = 16K /* Page 3e */
hitext (rx) : ORIGIN = 0xc000, LENGTH = 16K-256 /* Page 3f */
/* Flash memory pages:
*
* The MC9S12NE64 implements 6 bits of the PPAGE register which gives it a
* 1 Mbyte program memory address space that is accessed through the PPAGE
* window. The lower 768K portion (0x000000-0x0bffff) of the address space
* is accessed with PPAGE values 0x00 through 0x2f. This address range
* is reserved for external memory when the part is operated in expanded
* mode. The upper 256K of the address space (0x0c0000-0x100000), accessed
* with PPAGE values 0x30 through 0x3f, is occupied by on chip flash.
*/
page30 (rx) : ORIGIN = 0x0c0000, LENGTH = 16K /* Page 30 */
page31 (rx) : ORIGIN = 0x0c4000, LENGTH = 16K /* Page 31 */
page32 (rx) : ORIGIN = 0x0c8000, LENGTH = 16K /* Page 32 */
page33 (rx) : ORIGIN = 0x0cc000, LENGTH = 16K /* Page 33 */
page34 (rx) : ORIGIN = 0x0d0000, LENGTH = 16K /* Page 34 */
page35 (rx) : ORIGIN = 0x0d4000, LENGTH = 16K /* Page 35 */
page36 (rx) : ORIGIN = 0x0d8000, LENGTH = 16K /* Page 36 */
page37 (rx) : ORIGIN = 0x0dc000, LENGTH = 16K /* Page 37 */
page38 (rx) : ORIGIN = 0x0e0000, LENGTH = 16K /* Page 38 */
page39 (rx) : ORIGIN = 0x0e4000, LENGTH = 16K /* Page 39 */
page3a (rx) : ORIGIN = 0x0e8000, LENGTH = 16K /* Page 3a */
page3b (rx) : ORIGIN = 0x0ec000, LENGTH = 16K /* Page 3b */
page3c (rx) : ORIGIN = 0x0f0000, LENGTH = 16K /* Page 3c */
page3d (rx) : ORIGIN = 0x0f4000, LENGTH = 16K /* Page 3d */
page3e (rx) : ORIGIN = 0x0f8000, LENGTH = 16K /* Page 3e */
page3f (rx) : ORIGIN = 0x0fc000, LENGTH = 16K-2K /* Page 3f */
/* Vectors */
vectors (rx) : ORIGIN = 0xff80, LENGTH = 256
}
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(nonbanked)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > hitext
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram AT > lowtext
.vectors : {
*(vectors)
} > vectors
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram
.vectors : {
_svectors = ABSOLUTE(.);
*(.vectors)
_evectors = ABSOLUTE(.);
} > vectors
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,109 @@
/****************************************************************************
* boards/hc/m9s12/ne64badge/scripts/ne64badge-nonbanked.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The NE64 Badge has 64Kb of FLASH and 8Kb of SRAM that are assumed to be
* paged and positioned as below:
*/
MEMORY
{
/* The register space resides at address 0x0000-0x03ff. The following
* address, 0x0400-0x1fff are unused.
*
* The 8Kb SRAM is mapped to 0x2000-0x2fff.
*/
sram (rwx) : ORIGIN = 0x2000, LENGTH = 8K
/* Three fixed text flash pages (corresponding to page 3e, 3d, and 3f) at
* 16Kb each (minus 256 bytes at the end of page 3f that is reserved for
* interrupt vectors). Notice that this is linked as a single contiguous;
* Post-processing is planned to make the binary to the appropriate flash
* pages.
*/
text (rx) : ORIGIN = 0x4000, LENGTH = 48K-256 /* Page 3e, 3d, and 3f */
/* Vectors */
vectors (rx) : ORIGIN = 0xff80, LENGTH = 256
}
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(nonbanked)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > text
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram AT > text
.vectors : {
*(vectors)
} > vectors
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram
.vectors : {
_svectors = ABSOLUTE(.);
*(.vectors)
_evectors = ABSOLUTE(.);
} > vectors
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,28 @@
############################################################################
# boards/hc/m9s12/ne64badge/src/Makefile
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/Make.defs
CSRCS = m9s12_boot.c m9s12_leds.c m9s12_buttons.c m9s12_spi.c
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += m9s12_appinit.c
endif
include $(TOPDIR)/boards/Board.mk
@@ -0,0 +1,71 @@
/****************************************************************************
* boards/hc/m9s12/ne64badge/src/m9s12_appinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <syslog.h>
#include <errno.h>
#include <nuttx/board.h>
#include "ne64badge.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform architecture specific initialization
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
/* Configure SPI-based devices */
return OK;
}
@@ -0,0 +1,75 @@
/****************************************************************************
* boards/hc/m9s12/ne64badge/src/m9s12_boot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "ne64badge.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: hcs12_boardinitialize
*
* Description:
* All HCS12 architectures must provide the following entry point.
* This entry point is called early in the initialization - after all
* memory has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void hcs12_boardinitialize(void)
{
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
* function hcs12_spidev_initialize() has been brought into the link.
*/
#if defined(CONFIG_INCLUDE_HCS12_ARCH_SPI)
if (hcs12_spidev_initialize)
{
hcs12_spidev_initialize();
}
#endif
/* Configure on-board LEDs if LED support has been selected. */
#ifdef CONFIG_ARCH_LEDS
board_autoled_initialize();
#endif
}
@@ -0,0 +1,101 @@
/****************************************************************************
* boards/hc/m9s12/ne64badge/src/m9s12_buttons.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "ne64badge.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_DEBUG_INPUT
# define btnerr _err
# define btninfo(x...) _info
# endif
#else
# define btnerr(x...)
# define btninfo(x...)
#endif
/* Dump GPIO registers */
#ifdef CONFIG_DEBUG_INPUT
# define btn_dumpgpio(m) m9s12_dumpgpio(m)
#else
# define btn_dumpgpio(m)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
****************************************************************************/
uint32_t board_button_initialize(void)
{
/* Configure all button GPIO lines */
btn_dumpgpio("board_button_initialize() Entry)");
hcs12_configgpio(NE64BADGE_BUTTON1);
hcs12_configgpio(NE64BADGE_BUTTON2);
btn_dumpgpio("board_button_initialize() Exit");
return 2;
}
/****************************************************************************
* Name: board_buttons
****************************************************************************/
uint32_t board_buttons(void)
{
uint32_t ret = 0;
if (hcs12_gpioread(NE64BADGE_BUTTON1))
{
ret |= BUTTON1;
}
if (hcs12_gpioread(NE64BADGE_BUTTON2))
{
ret |= BUTTON2;
}
return ret;
}
#endif /* CONFIG_ARCH_BUTTONS */
@@ -0,0 +1,123 @@
/****************************************************************************
* boards/hc/m9s12/ne64badge/src/m9s12_leds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "ne64badge.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Dump GPIO registers */
#ifdef CONFIG_DEBUG_LEDS_INFO
# define led_dumpgpio(m) m9s12_dumpgpio(m)
#else
# define led_dumpgpio(m)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
*
* Description:
* Configure and initialize on-board LEDs
*
****************************************************************************/
void board_autoled_initialize(void)
{
/* Configure all LED GPIO lines */
led_dumpgpio("board_autoled_initialize() Entry)");
hcs12_configgpio(NE64BADGE_LED1);
hcs12_configgpio(NE64BADGE_LED2);
led_dumpgpio("board_autoled_initialize() Exit");
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
switch (led)
{
default:
case 0 : /* STARTED, HEAPALLOCATE, IRQSENABLED */
hcs12_gpiowrite(NE64BADGE_LED1, true);
hcs12_gpiowrite(NE64BADGE_LED2, true);
break;
case 1 : /* STACKCREATED */
hcs12_gpiowrite(NE64BADGE_LED1, false);
hcs12_gpiowrite(NE64BADGE_LED2, true);
break;
case 2 : /* INIRQ, SIGNAL, ASSERTION, PANIC */
hcs12_gpiowrite(NE64BADGE_LED2, false);
break;
}
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
switch (led)
{
default:
case 0 : /* STARTED, HEAPALLOCATE, IRQSENABLED */
case 1 : /* STACKCREATED */
hcs12_gpiowrite(NE64BADGE_LED1, true);
case 2 : /* INIRQ, SIGNAL, ASSERTION, PANIC */
hcs12_gpiowrite(NE64BADGE_LED2, true);
break;
}
}
#endif /* CONFIG_ARCH_LEDS */
@@ -0,0 +1,90 @@
/****************************************************************************
* boards/hc/m9s12/ne64badge/src/m9s12_spi.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include "ne64badge.h"
#if defined(CONFIG_HCS12_SPI)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: hcs12_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the NE64 Badge board.
*
****************************************************************************/
void weak_function hcs12_spidev_initialize(void)
{
}
/****************************************************************************
* Name: hcs12_spiselect and hcs12_spistatus
*
* Description:
* The external functions, hcs12_spiselect and hcs12_spistatus must be
* provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi/spi.h).
* All other methods (including hcs12_spibus_initialize())
* are provided by common HCS12 logic. To use this common SPI logic on your
* board:
*
* 1. Provide logic in hcs12_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide hcs12_spiselect() and hcs12_spistatus() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. Add a calls to hcs12_spibus_initialize() in your low level
* application initialization logic
* 4. The handle returned by hcs12_spibus_initialize() may then be used to
* bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
void hcs12_spiselect(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
}
uint8_t hcs12_spistatus(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}
#endif /* CONFIG_HCS12_SPI */
@@ -0,0 +1,178 @@
/****************************************************************************
* boards/hc/m9s12/ne64badge/src/ne64badge.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_HC_MSC92S12NE64_NE64BADGE_SRC_NE64BADGE_H
#define __BOARDS_HC_MSC92S12NE64_NE64BADGE_SRC_NE64BADGE_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include "m9s12.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* NE64BADGE Pin Usage ******************************************************/
/* PIN PIN NAME BOARD SIGNAL NOTES
* --- ------------------- -------------- ----------------------
* 44 RESET J3 RESET_L Also to SW3
* 57 BKGD/MODC/TAGHI_B BDM BKGD CON6A
*
* 85 PAD0 VR1 Potentiometer
* 86 PAD1 J3 ANALOG_IN0 Not used on board
* 87 PAD2 J3 ANALOG_IN1 " " " " "" " "
* 88 PAD3 J3 ANALOG_IN2 " " " " "" " "
* 89 PAD4 J3 ANALOG_IN3 " " " " "" " "
*
* 70 PHY_TXP J7 TD+ RJ45 connector
* 71 PHY_TXN J7 TD- RJ45 connector
* 73 PHY_RXP J7 RD+ RJ45 connector
* 74 PHY_RXN J7 RD- RJ45 connector
*
* Ports A,B,E,K managed by the MEBI block
* ---------------------------------------
* 60 PA0/ADDR8/DATA8 J3 ADDR_DATA8 Not used on board
* 61 PA1/ADDR9/DATA9 J3 ADDR_DATA9 " " " " "" " "
* 62 PA2/ADDR10/DATA10 J3 ADDR_DATA10 " " " " "" " "
* 63 PA3/ADDR11/DATA11 J3 ADDR_DATA11 " " " " "" " "
* 77 PA4/ADDR12/DATA12 J3 ADDR_DATA12 " " " " "" " "
* 78 PA5/ADDR13/DATA13 J3 ADDR_DATA13 " " " " "" " "
* 79 PA6/ADDR14/DATA14 J3 ADDR_DATA14 " " " " "" " "
* 80 PA7/ADDR15/DATA15 J3 ADDR_DATA15 " " " " "" " "
*
* 10 PB0/ADDR0/DATA0 J3 ADDR_DATA0 Not used on board
* 11 PB1/ADDR1/DATA1 J3 ADDR_DATA1 " " " " "" " "
* 12 PB2/ADDR2/DATA2 J3 ADDR_DATA2 " " " " "" " "
* 13 PB3/ADDR3/DATA3 J3 ADDR_DATA3 " " " " "" " "
* 16 PB4/ADDR4/DATA4 J3 ADDR_DATA4 " " " " "" " "
* 17 PB5/ADDR5/DATA5 J3 ADDR_DATA5 " " " " "" " "
* 18 PB6/ADDR6/DATA6 J3 ADDR_DATA6 " " " " "" " "
* 19 PB7/ADDR7/DATA7 J3 ADDR_DATA7 " " " " "" " "
*
* 56 PE0/XIRQ_B BUTTON1 SW1
* 55 PE1/IRQ_B J3 IRQ Not used on board
* 54 PE2/R_W J3 RW " " " " "" " "
* 53 PE3/LSTRB_B/TAGLO_B J3 LSTRB " " " " "" " "
* 41 PE4/ECLK J3 ECLK " " " " "" " "
* 40 PE5/IPIPE0/MODA J3 MODA " " " " "" " "
* 39 PE6/IPIPE1/MODB J3 MODB " " " " "" " "
* 38 PE7/NOACC/XCLKS_B pulled low pulled low
*/
#define NE64BADGE_BUTTON1 (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT_E | GPIO_PIN_0)
/* 97 PK0/XADR14 N/C N/C
* 98 PK1/XADR15 N/C N/C
* 99 PK2/XADR16 N/C N/C
* 100 PK3/XADR17 N/C N/C
* 103 PK4/XADR18 N/C N/C
* 104 PK5/XADR19 N/C N/C
* 105 PK6/XCS_B J3 XCS Not used on board
* 106 PK7/ECS_B/ROMCTL J3 ECS " " " " "" " "
*
* Ports T,S,G,H,J,L managed by the PIM Block
* ------------------------------------------
* 110 PT4/IOC1_4 J3 GPIO8 Not used on board
* 109 PT5/IOC1_5 J3 GPIO9 " " " " "" " "
* 108 PT6/IOC1_6 J3 GPIO10 " " " " "" " "
* 107 PT7/IOC1_7 N/C N/C
*
* 30 PS0/RXD0 RS232_RX Eventually maps to J2 RXD
* 31 PS1/TXD0 RS232_TX Eventually maps to J2 TXD
* 32 PS2/RXD1 J3&J4 UART_RX Not used on board
* 33 PS3/TXD1 J3&J4 UART_TX " " " " "" " "
* 34 PS4/MISO J3 SPI_MISO " " " " "" " "
* 35 PS5/MOSI J3 SPI_MOSI " " " " "" " "
* 36 PS6/SCK J3 SPI_CLOCK " " " " "" " "
* 37 PS7/SS_B J3 SPI_SS " " " " "" " "
*
* 22 PG0/RXD0/KWG0 J3 GPIO0 Not used on board
* 23 PG1/RXD1/KWG1 J3 GPIO1 " " " " "" " "
* 24 PG2/RXD2/KWG2 J3 GPIO2 " " " " "" " "
* 25 PG3/RXD3/KWG3 J3 GPIO3 " " " " "" " "
* 26 PG4/RXCLK/KWG4 J3 GPIO4 " " " " "" " "
* 27 PG5/RXDV/KWG5 J3 GPIO5 " " " " "" " "
* 28 PG6/RXER/KWG6 J3 GPIO6 " " " " "" " "
* 29 PG7/KWG7 J3 GPIO7 " " " " "" " "
*
* 7 PH0/TXD0/KWH0 N/C N/C
* 6 PH1/TXD1/KWH1 N/C N/C
* 5 PH2/TXD2/KWH2 J4 XBEE_RESET Not used on board
* 4 PH3/TXD3/KWH3 J4 XBEE_RSSI Not used on board
* 3 PH4/TXCLK/KWH4 BUTTON2 SW2
* 2 PH5/TXDV/KWH5 J5 XBEE_LOAD_H Not used on board
* 1 PH6/TXER/KWH6 J4 XBEE_LOAD_L Not used on board
*/
#define NE64BADGE_BUTTON2 (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT_H | GPIO_PIN_4)
/* 8 PJ0/MDC/KWJ0 LED1 D21, red
* 9 PJ1/MDIO/KWJ1 LED2 D22, red
* 20 PJ2/CRS/KWJ2 J3 SPI_CS Not used on board
* 21 PJ3/COL/KWJ3 N/C
* 112 PJ6/SDA/KWJ6 J3 I2C_DATA Not used on board
* 111 PJ7/SCL/KWJ7 J3 I2C_CLOCK " " " " "" " "
*/
#define NE64BADGE_LED1 (GPIO_OUTPUT | GPIO_OUTPUT_HIGH | GPIO_PORT_J | GPIO_PIN_0)
#define NE64BADGE_LED2 (GPIO_OUTPUT | GPIO_OUTPUT_HIGH | GPIO_PORT_J | GPIO_PIN_1)
/* 51 PL6/TXER/KWL6 N/C N/C
* 52 PL5/TXDV/KWL5 N/C N/C
* 58 PL4/COLLED Collision LED red
* 59 PL3/DUPLED Full Duplex LED yellow
* 81 PL2/SPDLED 100Mbps Speed LED yellow
* 83 PL1/LNKLED Link Good LED green
* 84 PL0/ACTLED Activity LED yellow
*/
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Functions Definitions
****************************************************************************/
/****************************************************************************
* Name: hcs12_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the STM3210E-EVAL
* board.
*
****************************************************************************/
void weak_function hcs12_spidev_initialize(void);
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_HC_MSC92S12NE64_NE64BADGE_SRC_NE64BADGE_H */