First commit XiUOS

board/stm32f407-st-discovery/third_party_driver/spi/Kconfig

@@ -0,0 +1,66 @@
+config BSP_USING_SPI1
+bool "Using spi1  "
+default y
+
+
+if BSP_USING_SPI1
+    config SPI_BUS_NAME_1
+        string "spi bus 1 name"
+        default "spi1"
+    config SPI_1_DRV_NAME
+        string "spi bus 1 driver name"
+        default "spi1_drv"        
+    config BSP_SPI1_CLK_PIN
+        int "spi1 clk pin number"
+        default 29
+    config BSP_SPI1_D0_PIN
+        int "spi1 d0 pin number"
+        default 30
+    config BSP_SPI1_D1_PIN
+        int "spi1 d1 pin number"
+        default 31
+    menuconfig BSP_SPI1_USING_SS0
+        bool "SPI1 Enable SS0"
+        default y
+    if BSP_SPI1_USING_SS0
+        config SPI_1_DEVICE_NAME_0
+            string "spi bus 1 device 0 name"
+            default "spi1_dev0"             
+        config BSP_SPI1_SS0_PIN
+            int "spi1 ss0 pin number"
+            default 32
+    endif
+    menuconfig BSP_SPI1_USING_SS1
+        bool "SPI1 Enable SS1"
+        default y
+    if BSP_SPI1_USING_SS1
+        config SPI_1_DEVICE_NAME_1
+            string "spi bus 1 device 1 name"
+            default "spi1_dev1"           
+        config BSP_SPI1_SS1_PIN
+            int "spi1 ss1 pin number"
+            default 33
+    endif
+    menuconfig BSP_SPI1_USING_SS2
+        bool "SPI1 Enable SS2"
+        default n
+    if BSP_SPI1_USING_SS2
+        config SPI_1_DEVICE_NAME_2
+            string "spi bus 1 device 2 name"
+            default "spi1_dev2"              
+        config BSP_SPI1_SS2_PIN
+            int "spi1 ss2 pin number"
+            default 26
+    endif
+    menuconfig BSP_SPI1_USING_SS3
+        bool "SPI1 Enable SS3"
+        default n
+    if BSP_SPI1_USING_SS3
+        config SPI_1_DEVICE_NAME_3
+            string "spi bus 1 device 3 name"
+            default "spi1_dev3"             
+        config BSP_SPI1_SS3_PIN
+            int "spi1 ss3 pin number"
+            default 27
+    endif
+endif

board/stm32f407-st-discovery/third_party_driver/spi/Makefile

@@ -0,0 +1,7 @@
+SRC_FILES := hardware_spi.c connect_spi.c
+
+ifeq ($(CONFIG_RESOURCES_SPI_SFUD),y)
+	SRC_FILES += connect_flash_spi.c
+endif
+
+include $(KERNEL_ROOT)/compiler.mk

board/stm32f407-st-discovery/third_party_driver/spi/connect_flash_spi.c

@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2020 RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-27     SummerGift   add spi flash port file
+ */
+
+/**
+* @file connect_flash_spi.c
+* @brief support stm32f407-st-discovery-board spi flash function and register to bus framework
+* @version 1.0 
+* @author AIIT XUOS Lab
+* @date 2021-04-25
+*/
+
+/*************************************************
+File name: connect_flash_spi.c
+Description: support stm32f407-st-discovery-board spi flash bus register function
+Others: take RT-Thread v4.0.2/bsp/stm32/stm32f407-atk-explorer/board/ports/spi-flash-init.c
+                https://github.com/RT-Thread/rt-thread/tree/v4.0.2
+History: 
+1. Date: 2021-04-25
+Author: AIIT XUOS Lab
+Modification: 
+1. support stm32f407-st-discovery-board spi flash register to spi bus
+2. support stm32f407-st-discovery-board spi flash init
+*************************************************/
+
+#include "hardware_gpio.h"
+#include "connect_spi.h"
+#include "flash_spi.h"
+
+int FlashW25qxxSpiDeviceInit(void)
+{
+#ifdef BSP_USING_SPI1
+
+    __IO uint32_t tmpreg = 0x00U;
+    RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN;
+    tmpreg = RCC->AHB1ENR & RCC_AHB1ENR_GPIOBEN;
+    (void)tmpreg;
+
+    if(EOK != HwSpiDeviceAttach(SPI_BUS_NAME_1, "spi1_dev0", GPIOB, GPIO_Pin_0)){
+        return ERROR;
+    }
+
+    if(NONE == SpiFlashInit(SPI_BUS_NAME_1, "spi1_dev0", SPI_1_DRV_NAME, "W25Q64")){
+        return ERROR;
+    }
+
+#endif
+
+    return EOK;
+}