From 805cd766ea069be133003b970a662248ebd39117 Mon Sep 17 00:00:00 2001 From: xj Date: Thu, 27 Jun 2024 23:45:07 -0700 Subject: [PATCH] Adding more USB hardware information for RK3568 --- .../usb/components/port/xhci/usb_hc_xhci.c | 28 +++++++++++++++++++ .../usb/components/port/xhci/usb_hc_xhci.h | 4 +-- 2 files changed, 30 insertions(+), 2 deletions(-) diff --git a/Ubiquitous/XiZi_AIoT/services/drivers/usb/components/port/xhci/usb_hc_xhci.c b/Ubiquitous/XiZi_AIoT/services/drivers/usb/components/port/xhci/usb_hc_xhci.c index aaca03d1c..a79daa672 100644 --- a/Ubiquitous/XiZi_AIoT/services/drivers/usb/components/port/xhci/usb_hc_xhci.c +++ b/Ubiquitous/XiZi_AIoT/services/drivers/usb/components/port/xhci/usb_hc_xhci.c @@ -97,6 +97,34 @@ __WEAK unsigned long usb_hc_get_register_base(uint32_t id) } +__WEAK int usb_hc_get_register_id(unsigned long base_addr){ + int id; + + if(USB3_0_BASE_ADDR == base_addr) + id = USB3_0_ID; + else if(USB3_1_BASE_ADDR == base_addr) + id = USB3_1_ID; + else + id = -1; + + return id; +} + + +__WEAK unsigned long usb_hc_get_register_vir_base(uint32_t id) +{ + unsigned long base_addr; + + if(USB3_0_ID == id) + base_addr = USB3_0_VIRADDR_BASE; + else if(USB3_1_ID == id) + base_addr = USB3_1_VIRADDR_BASE; + else + base_addr = 0; + + return base_addr; +} + static inline struct xhci_host* xhci_get_inst_of_port(struct usbh_hubport *hport) { USB_ASSERT(hport && hport->parent); diff --git a/Ubiquitous/XiZi_AIoT/services/drivers/usb/components/port/xhci/usb_hc_xhci.h b/Ubiquitous/XiZi_AIoT/services/drivers/usb/components/port/xhci/usb_hc_xhci.h index 22ca571bb..12827defe 100644 --- a/Ubiquitous/XiZi_AIoT/services/drivers/usb/components/port/xhci/usb_hc_xhci.h +++ b/Ubiquitous/XiZi_AIoT/services/drivers/usb/components/port/xhci/usb_hc_xhci.h @@ -57,8 +57,8 @@ extern "C" { #define USB3_ADDR_OFFSET_UPPER_BOUND 0x07FFF #define USB3_VIRADDR_BASE 0x0000002000000000ULL -#define USB3_1_VIRADDR_BASE USB3_VIRADDR_BASE -#define USB3_2_VIRADDR_BASE USB3_VIRADDR_BASE + USB3_ADDR_OFFSET_UPPER_BOUND +#define USB3_0_VIRADDR_BASE USB3_VIRADDR_BASE +#define USB3_1_VIRADDR_BASE USB3_VIRADDR_BASE + USB3_ADDR_OFFSET_UPPER_BOUND /** * @brief xHCI host controller hardware init. *