forked from xuos/xiuos
261 lines
8.5 KiB
C
261 lines
8.5 KiB
C
/*
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* Copyright (c) 2011-2012, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*!
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* @file gpio.c
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* @brief Driver to control the GPIO module.
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* @ingroup diag_gpio
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*/
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#include "gpio.h"
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#include "gpio_map.h"
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#include "regsgpio.h"
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#include "regsiomuxc.h"
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#include "sdk_types.h"
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#include "libserial.h"
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int32_t gpio_get_port_count(void)
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{
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return HW_GPIO_INSTANCE_COUNT;
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}
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int gpio_set_gpio(int32_t port, int32_t pin)
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{
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// Validate port and pin before indexing into the map arrays.
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if (port < 1 || port > HW_GPIO_INSTANCE_COUNT || pin < 0 || pin > 31) {
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debug_printf("Invalid GPIO port or pin number.\n");
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return INVALID_PARAMETER;
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}
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// Look up mux register address.
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uint32_t addr = k_gpio_mux_registers[port - 1][pin];
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if (!addr) {
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return INVALID_PARAMETER;
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}
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volatile uint32_t* reg = (volatile uint32_t*)addr;
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// Switch mux to ALT5, which is always GPIO mode. We're just using this register's
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// BM_ and BF_ macros because they are convenient, and is present on all three mx6.
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*reg = (*reg & ~BM_IOMUXC_SW_MUX_CTL_PAD_KEY_COL0_MUX_MODE)
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| BF_IOMUXC_SW_MUX_CTL_PAD_KEY_COL0_MUX_MODE_V(ALT5);
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return SUCCESS;
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}
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int32_t gpio_set_direction(int32_t port, int32_t pin, int32_t dir)
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{
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uint32_t oldVal = 0, newVal = 0;
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if ((port > HW_GPIO_INSTANCE_COUNT) || (port < 1)) {
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debug_printf("Invalid GPIO Instance GPIO_PORT%d parameter. GPIO_PORT1~GPIO_PORT%d is allowed.\n",
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port, HW_GPIO_INSTANCE_COUNT);
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return INVALID_PARAMETER;
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}
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if ((pin > 31) || (pin < 0)) {
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debug_printf("Invalid GPIO Pin %d parameter. Pin 0~31 is allowed.\n", pin);
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return INVALID_PARAMETER;
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}
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oldVal = HW_GPIO_GDIR_RD(port);
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if (dir == GPIO_GDIR_INPUT)
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newVal = oldVal & (~(1 << pin));
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else
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newVal = oldVal | (1 << pin);
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HW_GPIO_GDIR_WR(port, newVal);
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return 0; // SUCCESS;
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}
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int32_t gpio_get_direction(int32_t port, int32_t pin)
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{
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if ((port > HW_GPIO_INSTANCE_COUNT) || (port < 1)) {
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debug_printf("Invalid GPIO Instance GPIO_PORT%d parameter. GPIO_PORT1~GPIO_PORT%d is allowed.\n",
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port, HW_GPIO_INSTANCE_COUNT);
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return INVALID_PARAMETER;
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}
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if ((pin > 31) || (pin < 0)) {
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debug_printf("Invalid GPIO Pin %d parameter. Pin 0~31 is allowed.\n", pin);
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return INVALID_PARAMETER;
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}
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return (HW_GPIO_GDIR_RD(port) >> pin) & 1;
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}
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int32_t gpio_set_level(int32_t port, int32_t pin, uint32_t level)
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{
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if ((port > HW_GPIO_INSTANCE_COUNT) || (port < 1)) {
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debug_printf("Invalid GPIO Instance GPIO_PORT%d parameter. GPIO_PORT1~GPIO_PORT%d is allowed.\n",
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port, HW_GPIO_INSTANCE_COUNT);
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return INVALID_PARAMETER;
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}
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if ((pin > 31) || (pin < 0)) {
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debug_printf("Invalid GPIO Pin %d parameter. Pin 0~31 is allowed.\n", pin);
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return INVALID_PARAMETER;
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}
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uint32_t mask = 1 << pin;
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int32_t dir = HW_GPIO_GDIR_RD(port) & mask ? GPIO_GDIR_OUTPUT : GPIO_GDIR_INPUT;
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if (dir != GPIO_GDIR_OUTPUT) {
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printf("GPIO_PORT%d_%d is not configured to be output!\n", port, pin);
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return -1;
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}
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uint32_t value = HW_GPIO_DR_RD(port); // read current value
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if (level == GPIO_LOW_LEVEL) // fix it up
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value &= ~mask;
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else if (level == GPIO_HIGH_LEVEL)
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value |= mask;
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HW_GPIO_DR_WR(port, value); // write new value
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return 0; // SUCCESS;
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}
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int32_t gpio_get_level(int32_t port, int32_t pin)
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{
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if ((port > HW_GPIO_INSTANCE_COUNT) || (port < 1)) {
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debug_printf("Invalid GPIO Instance GPIO_PORT%d parameter. GPIO_PORT1~GPIO_PORT%d is allowed.\n",
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port, HW_GPIO_INSTANCE_COUNT);
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return INVALID_PARAMETER;
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}
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if ((pin > 31) || (pin < 0)) {
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debug_printf("Invalid GPIO Pin %d parameter. Pin 0~31 is allowed.\n", pin);
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return INVALID_PARAMETER;
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}
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uint32_t mask = 1 << pin;
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return HW_GPIO_DR_RD(port) & mask ? GPIO_HIGH_LEVEL : GPIO_LOW_LEVEL;
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}
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int32_t gpio_set_interrupt_config(int32_t port, int32_t pin, int32_t config)
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{
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if ((port > HW_GPIO_INSTANCE_COUNT) || (port < 1)) {
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debug_printf("Invalid GPIO Instance GPIO_PORT%d parameter. GPIO_PORT1~GPIO_PORT%d is allowed.\n",
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port, HW_GPIO_INSTANCE_COUNT);
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return INVALID_PARAMETER;
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}
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if ((pin > 31) || (pin < 0)) {
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debug_printf("Invalid GPIO Pin %d parameter. Pin 0~31 is allowed.\n", pin);
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return INVALID_PARAMETER;
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}
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if (pin < 16) {
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// GPIOs 0-15 use ICR1 register
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uint32_t value = HW_GPIO_ICR1_RD(port); // read current value
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uint32_t field_offset = pin * 2; // fields are 2 bits wide
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value &= ~(BM_GPIO_ICR1_ICR0 << field_offset); // clear specified field
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value |= config << field_offset; // set specified field
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HW_GPIO_ICR1_WR(port, value); // write new value
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} else {
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// GPIOs 16-31 use ICR2 register
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uint32_t value = HW_GPIO_ICR2_RD(port); // read current value
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uint32_t field_offset = (pin - 16) * 2; // fields are 2 bits wide
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value &= ~(BM_GPIO_ICR2_ICR16 << field_offset); // clear specified field
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value |= config << field_offset; // set specified field
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HW_GPIO_ICR1_WR(port, value); // write new value
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}
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return 0; // SUCCESS;
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}
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int32_t gpio_set_interrupt_mask(int32_t port, int32_t pin, int32_t mask)
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{
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if ((port > HW_GPIO_INSTANCE_COUNT) || (port < 1)) {
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debug_printf("Invalid GPIO Instance GPIO_PORT%d parameter. GPIO_PORT1~GPIO_PORT%d is allowed.\n",
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port, HW_GPIO_INSTANCE_COUNT);
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return INVALID_PARAMETER;
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}
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if ((pin > 31) || (pin < 0)) {
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debug_printf("Invalid GPIO Pin %d parameter. Pin 0~31 is allowed.\n", pin);
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return INVALID_PARAMETER;
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}
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uint32_t value = HW_GPIO_IMR_RD(port);
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if (mask == GPIO_IMR_MASKED)
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value &= ~(1 << pin);
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else
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value |= 1 << pin;
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HW_GPIO_GDIR_WR(port, value);
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return 0; // SUCCESS;
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}
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int32_t gpio_get_interrupt_status(int32_t port, int32_t pin)
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{
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if ((port > HW_GPIO_INSTANCE_COUNT) || (port < 1)) {
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debug_printf("Invalid GPIO Instance GPIO_PORT%d parameter. GPIO_PORT1~GPIO_PORT%d is allowed.\n",
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port, HW_GPIO_INSTANCE_COUNT);
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return INVALID_PARAMETER;
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}
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if ((pin > 31) || (pin < 0)) {
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debug_printf("Invalid GPIO Pin %d parameter. Pin 0~31 is allowed.\n", pin);
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return INVALID_PARAMETER;
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}
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return HW_GPIO_ISR_RD(port) & (1 << pin) ? GPIO_ISR_ASSERTED : GPIO_ISR_NOT_ASSERTED;
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}
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int32_t gpio_clear_interrupt(int32_t port, int32_t pin)
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{
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if ((port > HW_GPIO_INSTANCE_COUNT) || (port < 1)) {
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debug_printf("Invalid GPIO Instance GPIO_PORT%d parameter. GPIO_PORT1~GPIO_PORT%d is allowed.\n",
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port, HW_GPIO_INSTANCE_COUNT);
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return INVALID_PARAMETER;
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}
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if ((pin > 31) || (pin < 0)) {
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debug_printf("Invalid GPIO Pin %d parameter. Pin 0~31 is allowed.\n", pin);
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return INVALID_PARAMETER;
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}
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uint32_t value = HW_GPIO_ISR_RD(port);
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value |= 1 << pin;
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HW_GPIO_ISR_WR(port, value);
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return 0; // SUCCESS;
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}
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