Support armv8 smp

Ubiquitous/XiZi_AIoT/hardkernel/arch/arm/armv8-a/cortex-a72/core.h

@@ -73,7 +73,7 @@ Modification:
 
 #include "cortex_a72.h"
 
-#define NR_CPU 1 // maximum number of CPUs
+#define NR_CPU 4 // maximum number of CPUs
 
 __attribute__((always_inline)) static inline uint64_t EL0_mode() // Set ARM mode to EL0
 {

Ubiquitous/XiZi_AIoT/hardkernel/arch/arm/armv8-a/cortex-a72/preboot_for_ok1028a-c/Makefile

@@ -1,6 +1,5 @@
 SRC_FILES := boot.S \
-			start.c \
+			 smp.c \
-			smp.c \
+			 cortexA72.S
-			cortexA72.S
 
 include $(KERNEL_ROOT)/compiler.mk

Ubiquitous/XiZi_AIoT/hardkernel/arch/arm/armv8-a/cortex-a72/preboot_for_ok1028a-c/config.mk

@@ -1,6 +1,6 @@
 export CROSS_COMPILE ?= aarch64-none-elf-
 export DEVICE = -mtune=cortex-a72 -ffreestanding -fno-common -fno-stack-protector -fno-pie -no-pie
-export CFLAGS := $(DEVICE) -Wall -Werror -O0 -g -fno-omit-frame-pointer -fPIC 
+export CFLAGS := $(DEVICE) -Wall -Werror -O2 -g -fno-omit-frame-pointer -fPIC 
 # export AFLAGS := -c $(DEVICE) -x assembler-with-cpp -D__ASSEMBLY__ -gdwarf-2
 export LFLAGS := $(DEVICE) -Wl,-T -Wl,$(KERNEL_ROOT)/hardkernel/arch/arm/armv8-a/cortex-a72/preboot_for_ok1028a-c/nxp_ls1028.lds -Wl,--start-group,-lgcc,-lc,--end-group
 export CXXFLAGS := 

Ubiquitous/XiZi_AIoT/hardkernel/arch/arm/armv8-a/cortex-a72/preboot_for_ok1028a-c/cortexA72.S

@@ -14,35 +14,6 @@ Modification:
 1. No modifications
 *************************************************/
     .section ".text","ax"
-/*
- * bool arm_set_interrupt_state(bool enable)
- */
-    .global arm_set_interrupt_state
-    .func arm_set_interrupt_state
-
-arm_set_interrupt_state:
-    mrs     x2, spsr_el1
-    cmp     x0, #0
-    b.eq    disable_interrupts
-    bic     x1, x2, #0xc0    // disable IRQ and FIQ
-    b       set_interrupt_state_end
-
-disable_interrupts:
-    orr     x1, x2, #0xc0    // enable IRQ and FIQ
-
-set_interrupt_state_end:
-    msr     spsr_el1, x1
-    // 测试x2的第7位（FIQ位）
-    tst     x2, #0x80
-    mov     x0, #1            //
-    b.eq    fiq_set_to_0      // 
-    ret
-
-fiq_set_to_0:
-    mov     x0, #0            // 如果FIQ位被设置，则设置x0为0
-    ret
-
-    .endfunc
 
     .global cpu_get_current
   # int cpu_get_current(void)@
@@ -54,17 +25,11 @@ cpu_get_current:
     ret
     .endfunc
 
-  .global get_arm_private_peripheral_base
+    .global psci_call
-  # uint32_t get_arm_private_peripheral_base(void)
+psci_call:
-  .func get_arm_private_peripheral_base
+        hvc #0
-get_arm_private_peripheral_base: 
+        ret
 
-  # Get base address of private perpherial space
-  # mrc     p15, 4, r0, c15, c0, 0   Read periph base address
-  mov     x0, #0x00A00000
-  ret
-  
-  .endfunc 
 
 # ------------------------------------------------------------
 # End of cortexA72.s

Ubiquitous/XiZi_AIoT/hardkernel/arch/arm/armv8-a/cortex-a72/preboot_for_ok1028a-c/smp.c

@@ -45,12 +45,15 @@ Author: AIIT XUOS Lab
 Modification:
 1. No modifications
 *************************************************/
-#include "cortex_a72.h"
+#include <stdint.h>
+
+#define PSCI_CPUON 0xc4000003
 
 extern void _boot_start();
+void psci_call(uint64_t fn, uint8_t cpuid, uint64_t entry, uint64_t ctxid);
 void cpu_start_secondary(uint8_t cpu_id)
 {
-    return;
+    psci_call(PSCI_CPUON, cpu_id, (uintptr_t)&_boot_start, 0);
 }
 
 void start_smp_cache_broadcast(int cpu_id)

Ubiquitous/XiZi_AIoT/hardkernel/arch/arm/armv8-a/cortex-a72/preboot_for_ok1028a-c/start.c

@@ -1,18 +0,0 @@
-#include "core.h"
-#include "cortex_a72.h"
-#include "memlayout.h"
-
-// void _entry();
-void _boot_start();
-void main();
-extern char end[];
-
-// entry.S needs one stack per CPU.
-__attribute__((aligned(16))) char stack0[4096 * NR_CPU];
-
-// entry.S jumps here in supervisor mode (EL1) on stack0.
-// in qemu-system-aarch64, default EL (Exeception Level) is 1.
-void start()
-{
-    main();
-}

Ubiquitous/XiZi_AIoT/hardkernel/clock/arm/armv8-a/cortex-a72/ok1028a-c/clock.c

@@ -15,10 +15,7 @@
 
 #include "clock_common_op.h"
 
-#include "log.h"
-
 // armv8 generic timer driver
-
 #define CNTV_CTL_ENABLE (1 << 0)
 #define CNTV_CTL_IMASK (1 << 1)
 #define CNTV_CTL_ISTATUS (1 << 2)
@@ -26,14 +23,16 @@
 static void enable_timer()
 {
     uint32_t c = r_cntv_ctl_el0();
-    c = CNTV_CTL_ENABLE;
+    c |= CNTV_CTL_ENABLE;
+    c &= ~CNTV_CTL_IMASK;
     w_cntv_ctl_el0(c);
 }
 
 static void disable_timer()
 {
     uint32_t c = r_cntv_ctl_el0();
-    c = CNTV_CTL_IMASK;
+    c |= CNTV_CTL_IMASK;
+    c &= ~CNTV_CTL_ENABLE;
     w_cntv_ctl_el0(c);
 }
 

Ubiquitous/XiZi_AIoT/hardkernel/intr/arm/armv8-a/cortex-a72/ok1028a-c/trap.c

@@ -26,9 +26,9 @@ Author: AIIT XUOS Lab
 Modification:
 1. first version
 *************************************************/
-#include <assert.h>
+#include <stdint.h>
-#include <stdio.h>
 
+#include "assert.h"
 #include "core.h"
 #include "exception_registers.h"
 #include "multicores.h"
@@ -50,7 +50,7 @@ void kernel_abort_handler(struct trapframe* tf)
     case 0b100001:
         iabort_handler(tf);
         break;
-    default:
+    default: {
         uint64_t ec = (esr >> 26) & 0x3f;
         uint64_t iss = esr & 0x1ffffff;
         ERROR("esr:  %016lx %016lx %016lx\n", esr, ec, iss);
@@ -58,6 +58,7 @@ void kernel_abort_handler(struct trapframe* tf)
         ERROR("Current Task: %s.\n", cur_cpu()->task->name);
         panic("Unimplemented Error Occured.\n");
     }
+    }
     panic("Return from abort handler.\n");
 }
 
@@ -85,9 +86,9 @@ void syscall_arch_handler(struct trapframe* tf)
     case 0b100001:
         iabort_handler(tf);
         break;
-    default:
+    default: {
-        printf("USYSCALL: unexpected ec: %016lx", esr);
+        ERROR("USYSCALL: unexpected ec: %016lx", esr);
-        printf("          elr = %016lx far = %016lx\n", r_elr_el1(), r_far_el1());
+        ERROR("          elr = %016lx far = %016lx\n", r_elr_el1(), r_far_el1());
         // kill error task
         xizi_enter_kernel();
         assert(cur_cpu()->task != NULL);
@@ -95,4 +96,5 @@ void syscall_arch_handler(struct trapframe* tf)
         context_switch(&cur_cpu()->task->thread_context.context, cur_cpu()->scheduler);
         panic("dabort end should never be reashed.\n");
     }
+    }
 }

Ubiquitous/XiZi_AIoT/services/fs/fs_server/Makefile

@@ -11,7 +11,7 @@ cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mflo
 endif
 ifeq ($(BOARD), ok1028a-c)
 toolchain ?= aarch64-none-elf-
-user_ldflags = -N 
+user_ldflags = -N -Ttext 0
 cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie  
 endif