forked from xuos/xiuos
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songyanguang
parent
d41cdce316
commit
62c6017222
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@ -5,49 +5,49 @@
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void dwc3_of_parse(struct dwc3 *dwc)
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{
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uint8_t lpm_nyet_threshold;
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uint8_t tx_de_emphasis;
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uint8_t hird_threshold;
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uint8_t lpm_nyet_threshold;
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uint8_t tx_de_emphasis;
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uint8_t hird_threshold;
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/* default to highest possible threshold */
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lpm_nyet_threshold = 0xff;
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/* default to highest possible threshold */
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lpm_nyet_threshold = 0xff;
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/* default to -3.5dB de-emphasis */
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tx_de_emphasis = 1;
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/* default to -3.5dB de-emphasis */
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tx_de_emphasis = 1;
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/*
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* default to assert utmi_sleep_n and use maximum allowed HIRD
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* threshold value of 0b1100
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*/
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hird_threshold = 12;
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/*
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* default to assert utmi_sleep_n and use maximum allowed HIRD
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* threshold value of 0b1100
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*/
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hird_threshold = 12;
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dwc->hsphy_mode = usb_get_phy_mode(dwc->id);
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dwc->hsphy_mode = usb_get_phy_mode(dwc->id);
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/* xiuos: The parameters are updated according to the dts of RK3568 */
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dwc->has_lpm_erratum = 0;
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lpm_nyet_threshold = lpm_nyet_threshold;
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dwc->is_utmi_l1_suspend = 0;
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hird_threshold = hird_threshold;
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dwc->disable_scramble_quirk = 0;
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dwc->u2exit_lfps_quirk = 0;
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dwc->u2ss_inp3_quirk = 0;
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dwc->req_p1p2p3_quirk = 0;
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dwc->del_p1p2p3_quirk = 0;
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dwc->del_phy_power_chg_quirk = 0;
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dwc->lfps_filter_quirk = 0;
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dwc->rx_detect_poll_quirk = 0;
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dwc->dis_u3_susphy_quirk = 0;
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dwc->dis_u2_susphy_quirk = 0;
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dwc->dis_enblslpm_quirk = 1;
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dwc->dis_u2_freeclk_exists_quirk = 1;
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dwc->tx_de_emphasis_quirk = 0;
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tx_de_emphasis = tx_de_emphasis;
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/* xiuos: The parameters are updated according to the dts of RK3568 */
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dwc->has_lpm_erratum = 0;
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lpm_nyet_threshold = lpm_nyet_threshold;
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dwc->is_utmi_l1_suspend = 0;
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hird_threshold = hird_threshold;
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dwc->disable_scramble_quirk = 0;
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dwc->u2exit_lfps_quirk = 0;
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dwc->u2ss_inp3_quirk = 0;
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dwc->req_p1p2p3_quirk = 0;
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dwc->del_p1p2p3_quirk = 0;
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dwc->del_phy_power_chg_quirk = 0;
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dwc->lfps_filter_quirk = 0;
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dwc->rx_detect_poll_quirk = 0;
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dwc->dis_u3_susphy_quirk = 0;
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dwc->dis_u2_susphy_quirk = 0;
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dwc->dis_enblslpm_quirk = 1;
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dwc->dis_u2_freeclk_exists_quirk = 1;
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dwc->tx_de_emphasis_quirk = 0;
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tx_de_emphasis = tx_de_emphasis;
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dwc->lpm_nyet_threshold = lpm_nyet_threshold;
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dwc->tx_de_emphasis = tx_de_emphasis;
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dwc->lpm_nyet_threshold = lpm_nyet_threshold;
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dwc->tx_de_emphasis = tx_de_emphasis;
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dwc->hird_threshold = hird_threshold
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| (dwc->is_utmi_l1_suspend << 4);
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dwc->hird_threshold = hird_threshold
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| (dwc->is_utmi_l1_suspend << 4);
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}
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@ -72,17 +72,17 @@ int dwc3_setup_phy(void *dev, struct phy **array, int *num_phys){
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void dwc3_cache_hwparams(struct dwc3 *dwc)
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{
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struct dwc3_hwparams *parms = &dwc->hwparams;
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struct dwc3_hwparams *parms = &dwc->hwparams;
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parms->hwparams0 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS0);
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parms->hwparams1 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS1);
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parms->hwparams2 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS2);
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parms->hwparams3 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS3);
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parms->hwparams4 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS4);
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parms->hwparams5 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS5);
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parms->hwparams6 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS6);
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parms->hwparams7 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS7);
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parms->hwparams8 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS8);
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parms->hwparams0 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS0);
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parms->hwparams1 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS1);
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parms->hwparams2 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS2);
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parms->hwparams3 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS3);
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parms->hwparams4 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS4);
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parms->hwparams5 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS5);
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parms->hwparams6 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS6);
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parms->hwparams7 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS7);
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parms->hwparams8 = dwc3_readl(dwc->regs_vir, DWC3_GHWPARAMS8);
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}
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@ -265,9 +265,9 @@ int dwc3_alloc_scratch_buffers(struct dwc3 *dwc){
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len = dwc->nr_scratch * DWC3_SCRATCHBUF_SIZE;
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vir_addr = USB_MEM_VIRADDR_ALLOC;
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vir_addr = USB_MEM_VIRADDR_ALLOC;
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phy_addr = 0;
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dwc->scratchbuf = (void *)vir_addr;
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dwc->scratchbuf = (void *)vir_addr;
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ret = naive_mmap(&vir_addr, &phy_addr, len, true);
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@ -355,52 +355,52 @@ void dwc3_set_mode(struct dwc3 *dwc, uint32_t mode){
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int dwc3_init(struct dwc3 *dwc)
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{
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int ret;
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int ret;
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dwc3_cache_hwparams(dwc);
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dwc3_cache_hwparams(dwc);
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ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE);
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if (ret) {
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USB_LOG_ERR("failed to allocate event buffers\n");
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return -ENOMEM;
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}
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ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE);
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if (ret) {
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USB_LOG_ERR("failed to allocate event buffers\n");
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return -ENOMEM;
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}
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ret = dwc3_core_init(dwc);
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if (ret) {
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USB_LOG_ERR("failed to initialize core\n");
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goto core_fail;
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}
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ret = dwc3_core_init(dwc);
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if (ret) {
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USB_LOG_ERR("failed to initialize core\n");
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goto core_fail;
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}
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ret = dwc3_event_buffers_setup(dwc);
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if (ret) {
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USB_LOG_ERR("failed to setup event buffers\n");
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goto event_fail;
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}
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ret = dwc3_event_buffers_setup(dwc);
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if (ret) {
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USB_LOG_ERR("failed to setup event buffers\n");
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goto event_fail;
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}
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ret = dwc3_core_init_mode(dwc);
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if (ret)
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goto mode_fail;
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ret = dwc3_core_init_mode(dwc);
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if (ret)
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goto mode_fail;
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return 0;
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return 0;
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mode_fail:
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dwc3_event_buffers_cleanup(dwc);
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dwc3_event_buffers_cleanup(dwc);
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event_fail:
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dwc3_core_exit(dwc);
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dwc3_core_exit(dwc);
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core_fail:
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dwc3_free_event_buffers(dwc);
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dwc3_free_event_buffers(dwc);
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return ret;
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return ret;
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}
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int dwc3_send_gadget_generic_command(struct dwc3 *dwc, unsigned cmd, uint32_t param){
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uint32_t timeout = 500;
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uint32_t reg;
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uint32_t timeout = 500;
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uint32_t reg;
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dwc3_writel(dwc->regs_vir, DWC3_DGCMDPAR, param);
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dwc3_writel(dwc->regs_vir, DWC3_DGCMD, cmd | DWC3_DGCMD_CMDACT);
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@ -410,14 +410,14 @@ int dwc3_send_gadget_generic_command(struct dwc3 *dwc, unsigned cmd, uint32_t pa
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if(!(reg & DWC3_DGCMD_CMDACT)){
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return 0;
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}
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}
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timeout--;
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usb_osal_msleep(1);
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if(!timeout)
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return -1;
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}while(1);
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}while(1);
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return 0;
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}
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