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Merge remote-tracking branch 'upstream/prepare_for_master' into prepare_for_master

This commit is contained in:
xuyanghang 2024-01-09 14:51:31 +08:00
parent 49259b08a3 28a1d12820
commit bab22a96fe
32 changed files with 1310 additions and 57 deletions
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2
APP_Framework/Applications/Kconfig
View File

@ -20,5 +20,5 @@ menu "Applications"
source "$APP_DIR/Applications/sensor_app/Kconfig"
source "$APP_DIR/Applications/embedded_database_app/Kconfig"
source "$APP_DIR/Applications/webnet/Kconfig"
source "$APP_DIR/Applications/mongoose/Kconfig"
source "$APP_DIR/Applications/webserver/Kconfig"
endmenu

4
APP_Framework/Applications/Makefile
View File

@ -40,8 +40,8 @@ ifeq ($(CONFIG_ADD_XIZI_FEATURES),y)
SRC_DIR += webnet
endif
ifeq ($(CONFIG_USE_MONGOOSE),y)
SRC_DIR += mongoose
ifeq ($(CONFIG_APPLICATION_WEBSERVER),y)
SRC_DIR += webserver
endif
include $(KERNEL_ROOT)/compiler.mk

4
APP_Framework/Applications/main.c
View File

@ -22,7 +22,7 @@ extern void ApplicationOtaTaskInit(void);
extern int OtaTask(void);
#endif
#ifdef USE_MONGOOSE
#ifdef APPLICATION_WEBSERVER
extern int webserver(void);
#endif
@ -38,7 +38,7 @@ int main(void)
OtaTask();
#endif
#ifdef USE_MONGOOSE
#ifdef APPLICATION_WEBSERVER
webserver();
#endif

11
APP_Framework/Applications/mongoose/Kconfig
View File

@ -1,11 +0,0 @@
menuconfig USE_MONGOOSE
bool "Use mongoose as webserver"
default n
select BSP_USING_SDIO
select BSP_USING_W5500
select BSP_USING_ETHERNET
select SUPPORT_CONNECTION_FRAMEWORK
select CONNECTION_ADAPTER_4G
select ADAPTER_EC200A
select LIB_USING_LORAWAN
select LIB_USING_LORA_RADIO

29
APP_Framework/Applications/webserver/Kconfig Normal file
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@ -0,0 +1,29 @@
menuconfig APPLICATION_WEBSERVER
bool "Application webserver using mongoose"
default n
if APPLICATION_WEBSERVER
choice
prompt "choose board for webserver"
default APPLICATION_WEBSERVER_XISHUTONG_4G
config APPLICATION_WEBSERVER_XISHUTONG_4G
bool "board select xishutong-4g, support dual ethernet port and 4G"
select BSP_USING_SDIO
select BSP_USING_W5500
select BSP_USING_ETHERNET
select SUPPORT_CONNECTION_FRAMEWORK
select CONNECTION_ADAPTER_4G
select ADAPTER_EC200A
select LIB_USING_LORAWAN
select LIB_USING_LORA_RADIO
config APPLICATION_WEBSERVER_XISHUTONG
bool "board select xishutong, support single ethernet port"
select BSP_USING_SDIO
select BSP_USING_LWIP
select LIB_USING_LORAWAN
select LIB_USING_LORA_RADIO
endchoice
endif

0
APP_Framework/Applications/mongoose/Makefile → APP_Framework/Applications/webserver/Makefile
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0
APP_Framework/Applications/mongoose/README.md → APP_Framework/Applications/webserver/README.md
View File

0
APP_Framework/Applications/mongoose/mongoose.a → APP_Framework/Applications/webserver/mongoose.a
View File

0
APP_Framework/Applications/mongoose/mongoose.h → APP_Framework/Applications/webserver/mongoose.h
View File

62
APP_Framework/Applications/mongoose/webserver_project.c → APP_Framework/Applications/webserver/webserver_project.c
View File

@ -25,6 +25,11 @@ History:
Author: AIIT XUOS Lab
Modification:
1、support xishutong-arm32 board, using W5500 to support webserver.
2. Date: 2024-1-3
Author: AIIT XUOS Lab
Modification:
1、support xishutong board(single ethernet port), using MAC to support webserver
*************************************************/
@ -34,7 +39,9 @@ Modification:
#include <sys_arch.h>
#include <lwip/sockets.h>
#include "lwip/sys.h"
#ifdef APPLICATION_WEBSERVER_XISHUTONG_4G
#include <adapter.h>
#endif
/*******************************************************************************
* Local variable definitions ('static')
@ -72,9 +79,17 @@ static unsigned int status = 0;
static pthread_t wb_event_task;
/*define device info*/
#ifdef APPLICATION_WEBSERVER_XISHUTONG_4G
static const char* device_name = "矽数通4G";
static const char* device_type = "xishutong-arm32";
static const char* device_serial_num = "123456789";
#endif
#ifdef APPLICATION_WEBSERVER_XISHUTONG
static const char* device_name = "矽数通";
static const char* device_type = "xishutong-arm32";
static const char* device_serial_num = "123456789";
#endif
/*define webserver info*/
static struct webserver_config {
@ -231,6 +246,7 @@ static void Rs485Configure(int baud_rate, int data_bit, int stop_bit, int parity
/*******************************************************************************
* Function implementation - define net 4G info
******************************************************************************/
#ifdef APPLICATION_WEBSERVER_XISHUTONG_4G
static void Net4gGetInfo(char *ip, char *operator, char *signal_strength)
{
//to do
@ -265,6 +281,7 @@ static void NetMqttDisconnect(void)
{
//to do
}
#endif
/*******************************************************************************
* Function implementation - define net LoRa info
@ -295,6 +312,7 @@ static void NetLoraDisconnect(void)
/*******************************************************************************
* Function implementation - define net Ethernet info
******************************************************************************/
#ifdef APPLICATION_WEBSERVER_XISHUTONG_4G
static void TcpClientConnect(void)
{
int cnt = 20;
@ -372,6 +390,7 @@ static void TcpClientDisconnect(void)
closesocket(socket_fd);
net_ethernet_info.connect_status = 0;
}
#endif
/*******************************************************************************
* Function implementation - define plc info
@ -403,6 +422,7 @@ static void *WebserverEventTask(void *arg)
while(1) {
if (0 == PrivEventProcess(wb_event, WB_EVENT_ALL, EVENT_OR | EVENT_AUTOCLEAN, 0, &status)) {
switch( status ) {
#ifdef APPLICATION_WEBSERVER_XISHUTONG_4G
case WB_4G_CONNECT:
Net4gConnect();
break;
@ -415,18 +435,21 @@ static void *WebserverEventTask(void *arg)
case WB_MQTT_DISCONNECT:
NetMqttDisconnect();
break;
#endif
case WB_LORA_CONNECT:
NetLoraConnect();
break;
case WB_LORA_DISCONNECT:
NetLoraDisconnect();
break;
#ifdef APPLICATION_WEBSERVER_XISHUTONG_4G
case WB_ETHERNET_CONNECT:
TcpClientConnect();
break;
case WB_ETHERNET_DISCONNECT:
TcpClientDisconnect();
break;
#endif
}
}
}
@ -522,6 +545,7 @@ static void fn(struct mg_connection* c, int ev, void* ev_data, void* fn_data)
Rs485Configure(rs485_config.baud_rate, rs485_config.data_bit, rs485_config.stop_bit, rs485_config.parity);
}
/*define net 4G info*/
#ifdef APPLICATION_WEBSERVER_XISHUTONG_4G
else if (mg_http_match_uri(hm, "/net/get4gInfo")) {
Net4gGetInfo(net_4g_info.map_ip, net_4g_info.operator, net_4g_info.signal_strength);
@ -569,6 +593,7 @@ static void fn(struct mg_connection* c, int ev, void* ev_data, void* fn_data)
PrivEvenTrigger(wb_event, WB_MQTT_DISCONNECT);
mg_http_reply(c, 200, "Content-Type: application/json\r\n", "{\"status\":\"success\"}\r\n");
}
#endif
/*define net LoRa info*/
else if (mg_http_match_uri(hm, "/net/getLoraInfo")) {
mg_http_reply(c, 200, "Content-Type: application/json\r\n",
@ -599,6 +624,7 @@ static void fn(struct mg_connection* c, int ev, void* ev_data, void* fn_data)
mg_http_reply(c, 200, "Content-Type: application/json\r\n", "{\"status\":\"success\"}\r\n");
}
/*define net Ethernet info*/
#ifdef APPLICATION_WEBSERVER_XISHUTONG_4G
else if (mg_http_match_uri(hm, "/net/getEthernetInfo")) {
mg_http_reply(c, 200, "Content-Type: application/json\r\n",
"{%m:%m, %m:%m, %m:%m, %m:%m, %m:%m, %m:%m, %m:%m, %m:%m, %m:%d}\n",
@ -646,6 +672,7 @@ static void fn(struct mg_connection* c, int ev, void* ev_data, void* fn_data)
PrivEvenTrigger(wb_event, WB_ETHERNET_DISCONNECT);
mg_http_reply(c, 200, "Content-Type: application/json\r\n", "{\"status\":\"success\"}\r\n");
}
#endif
/*define plc info*/
else if (mg_http_match_uri(hm, "/control/setPLCInfo")) {
struct mg_str json = hm->body;
@ -670,23 +697,41 @@ static void fn(struct mg_connection* c, int ev, void* ev_data, void* fn_data)
static void* do_webserver(void* args)
{
#ifdef APPLICATION_WEBSERVER_XISHUTONG_4G
p_netdev_webserver = netdev_get_by_name("wz");
if (p_netdev_webserver == NULL) {
MG_INFO(("Did not find wz netdev, use default.\n"));
p_netdev_webserver = NETDEV_DEFAULT;
}
#endif
#ifdef APPLICATION_WEBSERVER_XISHUTONG
p_netdev_webserver = netdev_get_by_name("hd");
if (p_netdev_webserver == NULL) {
MG_INFO(("Did not find hd netdev, use default.\n"));
p_netdev_webserver = NETDEV_DEFAULT;
}
#endif
MG_INFO(("Webserver Use Netdev %s", p_netdev_webserver->name));
webserver_config.ip = strdup(inet_ntoa(*p_netdev_webserver->ip_addr));
webserver_config.mask = strdup(inet_ntoa(*p_netdev_webserver->netmask));
webserver_config.gw = strdup(inet_ntoa(*p_netdev_webserver->gw));
webserver_config.dns = strdup(inet_ntoa(p_netdev_webserver->dns_servers[0]));
#ifdef BSP_USING_RS485
Rs485InitConfigure();
#endif
adapter = AdapterDeviceFindByName(ADAPTER_4G_NAME);
#ifdef APPLICATION_WEBSERVER_XISHUTONG_4G
adapter = AdapterDeviceFindByName(ADAPTER_4G_NAME);
#endif
//lora init param
net_lora_info.bw = 2;//bw 0:125 kHz 1:250 kHz 2:500 kHz,
net_lora_info.sf = 12;//sf12
net_lora_info.lora_init_flag = 0;
WbEventInit();
struct mg_mgr mgr; // Event manager
@ -702,9 +747,22 @@ static void* do_webserver(void* args)
int webserver(void)
{
char* params[2] = {"LwipNetworkActive", "-a"};
extern void LwipNetworkActive(int argc, char* argv[]);
#ifdef APPLICATION_WEBSERVER_XISHUTONG_4G
char* params[2] = {"LwipNetworkActive", "-a"};
LwipNetworkActive(2, params);
#endif
#ifdef APPLICATION_WEBSERVER_XISHUTONG
char* params[3] = {"LwipNetworkActive", "-e", "0"};
LwipNetworkActive(3, params);
extern void LwipSetNetwork(int argc, char* argv[]);
char* ip_params[5] = {"LwipSetNetwork", "-d", "hd", "-i", "192.168.131.88"};
LwipSetNetwork(5, ip_params);
char* gw_params[5] = {"LwipSetNetwork", "-d", "hd", "-g", "192.168.131.1"};
LwipSetNetwork(5, gw_params);
#endif
pthread_attr_t attr;
attr.schedparam.sched_priority = 30;

8
Ubiquitous/XiZi_IIoT/Makefile
View File

@ -50,7 +50,7 @@ export SRC_DIR:= $(SRC_APP_DIR) $(SRC_KERNEL_DIR)
export LIBCC
export MUSL_DIR := $(KERNEL_ROOT)/lib/musllib
export LWIP_DIR := $(KERNEL_ROOT)/resources/ethernet
export MONGOOSE_DIR := $(KERNEL_ROOT)/../../APP_Framework/Applications/mongoose/lib
export MONGOOSE_DIR := $(KERNEL_ROOT)/../../APP_Framework/Applications/webserver/lib
PART:=
@ -75,10 +75,6 @@ ifeq ($(CONFIG_RESOURCES_LWIP), y)
PART += COMPILE_LWIP
endif
ifeq ($(CONFIG_USE_MONGOOSE), y)
# PART += COMPILE_MONGOOSE
endif
ifeq ($(CONFIG_MCUBOOT_BOOTLOADER), y)
PART += COMPILE_BOOTLOADER
else ifeq ($(CONFIG_MCUBOOT_APPLICATION), y)
@ -141,7 +137,7 @@ COMPILE_MONGOOSE:
done
@cp link_mongoose.mk build/Makefile
@$(MAKE) -C build TARGET=mongoose.a LINK_FLAGS=LFLAGS
@cp build/mongoose.a $(KERNEL_ROOT)/../../APP_Framework/Applications/mongoose/mongoose.a
@cp build/mongoose.a $(KERNEL_ROOT)/../../APP_Framework/Applications/webserver/mongoose.a
@rm build/Makefile build/make.obj
COMPILE_KERNEL:

2
Ubiquitous/XiZi_IIoT/board/edu-arm32/.defconfig
View File

@ -211,7 +211,7 @@ CONFIG_ADD_XIZI_FEATURES=y
#
# config stack size and priority of main task
#
CONFIG_MAIN_KTASK_STACK_SIZE=1024
CONFIG_MAIN_KTASK_STACK_SIZE=2048
CONFIG_MAIN_KTASK_PRIORITY=16
#

4
Ubiquitous/XiZi_IIoT/board/edu-arm32/config.mk
View File

@ -15,4 +15,8 @@ ifeq ($(CONFIG_RESOURCES_LWIP), y)
export LINK_LWIP := $(KERNEL_ROOT)/resources/ethernet/LwIP/liblwip.a
endif
ifeq ($(CONFIG_APPLICATION_WEBSERVER), y)
export LINK_MONGOOSE := $(KERNEL_ROOT)/../../APP_Framework/Applications/webserver/mongoose.a
endif
export ARCH = arm

17
Ubiquitous/XiZi_IIoT/board/edu-arm32/third_party_driver/sdio/connect_sdio.c
View File

@ -75,6 +75,7 @@ Modification:
static stc_sd_handle_t gSdHandle;
static int sd_lock = -1;
static int is_mount_ok = 0;
static void SdCardConfig(void)
{
@ -214,11 +215,13 @@ static struct SdioDevDone dev_done =
*/
static int MountSDCardFs(enum FilesystemType fs_type)
{
if (MountFilesystem(SDIO_BUS_NAME, SDIO_DEVICE_NAME, SDIO_DRIVER_NAME, fs_type, "/") == 0)
if (MountFilesystem(SDIO_BUS_NAME, SDIO_DEVICE_NAME, SDIO_DRIVER_NAME, fs_type, "/") == 0) {
KPrintf("Sd card mount to '/'");
else
is_mount_ok = 1;
} else {
KPrintf("Sd card mount to '/' failed!");
is_mount_ok = 0;
}
return 0;
}
#endif
@ -253,9 +256,17 @@ static void SdCardDetach(void)
#ifdef MOUNT_SDCARD_FS
UnmountFileSystem("/");
is_mount_ok = 0;
#endif
}
int GetSdMountStatus(void)
{
if(!is_mount_ok)
KPrintf("SD card is not inserted or failed to mount, please check!\r\n");
return is_mount_ok;
}
static uint8 SdCardReadCd(void)
{
en_pin_state_t sd_cd_state = GPIO_ReadInputPins(SDIOC_CD_PORT, SDIOC_CD_PIN);

5
Ubiquitous/XiZi_IIoT/board/edu-arm32/third_party_driver/usart/Kconfig
View File

@ -16,6 +16,7 @@ menuconfig BSP_USING_UART3
menuconfig BSP_USING_UART4
bool "Enable USART4 for RS485"
default y
select BSP_USING_RS485
if BSP_USING_UART4
config SERIAL_BUS_NAME_4
string "serial bus 4 name"
@ -28,6 +29,10 @@ menuconfig BSP_USING_UART4
default "usart4_dev4"
endif
config BSP_USING_RS485
bool
default n
menuconfig BSP_USING_UART6
bool "Enable USART6"
default n

4
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/config.mk
View File

@ -15,8 +15,8 @@ ifeq ($(CONFIG_RESOURCES_LWIP), y)
export LINK_LWIP := $(KERNEL_ROOT)/resources/ethernet/LwIP/liblwip.a
endif
ifeq ($(CONFIG_USE_MONGOOSE), y)
export LINK_MONGOOSE := $(KERNEL_ROOT)/../../APP_Framework/Applications/mongoose/mongoose.a
ifeq ($(CONFIG_APPLICATION_WEBSERVER), y)
export LINK_MONGOOSE := $(KERNEL_ROOT)/../../APP_Framework/Applications/webserver/mongoose.a
endif
export ARCH = arm

32
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/Kconfig
View File

@ -1,3 +1,27 @@
menuconfig BSP_USING_ADC
bool "Using ADC device"
default n
select RESOURCES_ADC
if BSP_USING_ADC
source "$BSP_DIR/third_party_driver/adc/Kconfig"
endif
menuconfig BSP_USING_DAC
bool "Using DAC device"
default n
select RESOURCES_DAC
if BSP_USING_DAC
source "$BSP_DIR/third_party_driver/dac/Kconfig"
endif
menuconfig BSP_USING_CAN
bool "Using CAN device"
default n
select RESOURCES_CAN
if BSP_USING_CAN
source "$BSP_DIR/third_party_driver/can/Kconfig"
endif
menuconfig BSP_USING_UART
bool "Using UART device"
default y
@ -46,6 +70,14 @@ menuconfig BSP_USING_SDIO
source "$BSP_DIR/third_party_driver/sdio/Kconfig"
endif
menuconfig BSP_USING_USB
bool "Using USB device"
default n
select RESOURCES_USB
if BSP_USING_USB
source "$BSP_DIR/third_party_driver/usb/Kconfig"
endif
menuconfig BSP_USING_SPI
bool "Using SPI device"
default n

16
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/Makefile
View File

@ -4,6 +4,18 @@ ifeq ($(CONFIG_BSP_USING_UART),y)
SRC_DIR += usart
endif
ifeq ($(CONFIG_BSP_USING_ADC),y)
SRC_DIR += adc
endif
ifeq ($(CONFIG_BSP_USING_DAC),y)
SRC_DIR += dac
endif
ifeq ($(CONFIG_BSP_USING_CAN),y)
SRC_DIR += can
endif
ifeq ($(CONFIG_BSP_USING_GPIO),y)
SRC_DIR += gpio
endif
@ -20,6 +32,10 @@ ifeq ($(CONFIG_BSP_USING_SDIO),y)
SRC_DIR += sdio
endif
ifeq ($(CONFIG_BSP_USING_USB),y)
SRC_DIR += usb
endif
ifeq ($(CONFIG_BSP_USING_SPI),y)
SRC_DIR += spi
endif

13
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/adc/Kconfig Normal file
View File

@ -0,0 +1,13 @@
if BSP_USING_ADC
config ADC1_BUS_NAME
string "adc 1 bus name"
default "adc1"
config ADC1_DRIVER_NAME
string "adc 1 driver name"
default "adc1_drv"
config ADC1_DEVICE_NAME
string "adc 1 bus device name"
default "adc1_dev"
endif

3
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/adc/Makefile Normal file
View File

@ -0,0 +1,3 @@
SRC_FILES := connect_adc.c
include $(KERNEL_ROOT)/compiler.mk

370
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/adc/connect_adc.c Normal file
View File

@ -0,0 +1,370 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_adc.c
* @brief support to register ADC pointer and function
* @version 3.0
* @author AIIT XUOS Lab
* @date 2023-12-29
*/
#include <connect_adc.h>
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/* The clock source of ADC. */
#define ADC_CLK_SYS_CLK (1U)
#define ADC_CLK_PLLH (2U)
#define ADC_CLK_PLLA (3U)
/*
* Selects a clock source according to the application requirements.
* PCLK4 is the clock for digital interface.
* PCLK2 is the clock for analog circuit.
* PCLK4 and PCLK2 are synchronous when the clock source is PLL.
* PCLK4 : PCLK2 = 1:1, 2:1, 4:1, 8:1, 1:2, 1:4.
* PCLK2 is in range [1MHz, 60MHz].
* If the system clock is selected as the ADC clock, macro 'ADC_ADC_CLK' can only be defined as 'CLK_PERIPHCLK_PCLK'.
* If PLLH is selected as the ADC clock, macro 'ADC_ADC_CLK' can be defined as 'CLK_PERIPHCLK_PLLx'(x=Q, R).
* If PLLA is selected as the ADC clock, macro 'ADC_ADC_CLK' can be defined as 'CLK_PERIPHCLK_PLLXx'(x=P, Q, R).
*/
#define ADC_CLK_SEL (ADC_CLK_SYS_CLK)
#if (ADC_CLK_SEL == ADC_CLK_SYS_CLK)
#define ADC_CLK (CLK_PERIPHCLK_PCLK)
#elif (ADC_CLK_SEL == ADC_CLK_PLLH)
#define ADC_CLK (CLK_PERIPHCLK_PLLQ)
#elif (ADC_CLK_SEL == ADC_CLK_PLLA)
#define ADC_CLK (CLK_PERIPHCLK_PLLXP)
#else
#error "The clock source your selected does not exist!!!"
#endif
/* ADC unit instance for this example. */
#define ADC_UNIT (CM_ADC1)
#define ADC_PERIPH_CLK (FCG3_PERIPH_ADC1)
/* Selects ADC channels that needed. */
#define ADC_CH_POTENTIOMETER (ADC_CH3)
#define ADC_CH (ADC_CH_POTENTIOMETER)
#define ADC_CH_PORT (GPIO_PORT_A)
#define ADC_CH_PIN (GPIO_PIN_03)
/* ADC sequence to be used. */
#define ADC_SEQ (ADC_SEQ_A)
/* Flag of conversion end. */
#define ADC_EOC_FLAG (ADC_FLAG_EOCA)
/* ADC reference voltage. The voltage of pin VREFH. */
#define ADC_VREF (3.3F)
/* ADC accuracy(according to the resolution of ADC). */
#define ADC_ACCURACY (1UL << 12U)
/* Calculate the voltage(mV). */
#define ADC_CAL_VOL(adcVal) (uint16_t)((((float32_t)(adcVal) * ADC_VREF) / ((float32_t)ADC_ACCURACY)) * 1000.F)
/* Timeout value. */
#define ADC_TIMEOUT_VAL (1000U)
/**
* @brief Set specified ADC pin to analog mode.
* @param None
* @retval None
*/
static void AdcSetPinAnalogMode(void)
{
stc_gpio_init_t stcGpioInit;
(void)GPIO_StructInit(&stcGpioInit);
stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
(void)GPIO_Init(ADC_CH_PORT, ADC_CH_PIN, &stcGpioInit);
}
/**
* @brief Configures ADC clock.
* @param None
* @retval None
*/
static void AdcClockConfig(void)
{
#if (ADC_CLK_SEL == ADC_CLK_SYS_CLK)
/*
* 1. Configures the clock divider of PCLK2 and PCLK4 here or in the function of configuring the system clock.
* In this example, the system clock is MRC@8MHz.
* PCLK4 is the digital interface clock, and PCLK2 is the analog circuit clock.
* Make sure that PCLK2 and PCLK4 meet the following conditions:
* PCLK4 : PCLK2 = 1:1, 2:1, 4:1, 8:1, 1:2, 1:4.
* PCLK2 is in range [1MHz, 60MHz].
*/
CLK_SetClockDiv((CLK_BUS_PCLK2 | CLK_BUS_PCLK4), (CLK_PCLK2_DIV8 | CLK_PCLK4_DIV2));
#elif (ADC_CLK_SEL == ADC_CLK_PLLH)
/*
* 1. Configures PLLH and the divider of PLLHx(x=Q, R).
* PLLHx(x=Q, R) is used as both the digital interface clock and the analog circuit clock.
* PLLHx(x=Q, R) must be in range [1MHz, 60MHz] for ADC use.
* The input source of PLLH is XTAL(8MHz).
*/
stc_clock_pll_init_t stcPLLHInit;
stc_clock_xtal_init_t stcXtalInit;
/* Configures XTAL. PLLH input source is XTAL. */
(void)CLK_XtalStructInit(&stcXtalInit);
stcXtalInit.u8State = CLK_XTAL_ON;
stcXtalInit.u8Drv = CLK_XTAL_DRV_ULOW;
stcXtalInit.u8Mode = CLK_XTAL_MD_OSC;
stcXtalInit.u8StableTime = CLK_XTAL_STB_499US;
(void)CLK_XtalInit(&stcXtalInit);
(void)CLK_PLLStructInit(&stcPLLHInit);
/*
* PLLHx(x=Q, R) = ((PLL_source / PLLM) * PLLN) / PLLx
* PLLHQ = (8 / 1) * 80 /16 = 40MHz
* PLLHR = (8 / 1) * 80 /16 = 40MHz
*/
stcPLLHInit.u8PLLState = CLK_PLL_ON;
stcPLLHInit.PLLCFGR = 0UL;
stcPLLHInit.PLLCFGR_f.PLLM = (1UL - 1UL);
stcPLLHInit.PLLCFGR_f.PLLN = (80UL - 1UL);
stcPLLHInit.PLLCFGR_f.PLLP = (4UL - 1UL);
stcPLLHInit.PLLCFGR_f.PLLQ = (16UL - 1UL);
stcPLLHInit.PLLCFGR_f.PLLR = (16UL - 1UL);
/* stcPLLHInit.PLLCFGR_f.PLLSRC = CLK_PLL_SRC_XTAL; */
(void)CLK_PLLInit(&stcPLLHInit);
#elif (ADC_CLK_SEL == ADC_CLK_PLLA)
/*
* 1. Configures PLLA and the divider of PLLAx(x=P, Q, R).
* PLLAx(x=P, Q, R) is used as both the digital interface clock and the analog circuit clock.
* PLLAx(x=P, Q, R) must be in range [1MHz, 60MHz] for ADC use.
* The input source of PLLA is HRC(16MHz).
*/
stc_clock_pllx_init_t stcPLLAInit;
/* Enable HRC(16MHz) for PLLA. */
CLK_HrcCmd(ENABLE);
/* Specify the input source of PLLA. NOTE!!! PLLA and PLLH use the same input source. */
CLK_SetPLLSrc(CLK_PLL_SRC_HRC);
/* PLLA configuration */
(void)CLK_PLLxStructInit(&stcPLLAInit);
/*
* PLLAx(x=P, Q, R) = ((PLL_source / PLLM) * PLLN) / PLLx
* PLLAP = (16 / 2) * 40 / 8 = 40MHz
* PLLAQ = (16 / 2) * 40 / 10 = 32MHz
* PLLAR = (16 / 2) * 40 / 16 = 20MHz
*/
stcPLLAInit.u8PLLState = CLK_PLLX_ON;
stcPLLAInit.PLLCFGR = 0UL;
stcPLLAInit.PLLCFGR_f.PLLM = (2UL - 1UL);
stcPLLAInit.PLLCFGR_f.PLLN = (40UL - 1UL);
stcPLLAInit.PLLCFGR_f.PLLR = (8UL - 1UL);
stcPLLAInit.PLLCFGR_f.PLLQ = (10UL - 1UL);
stcPLLAInit.PLLCFGR_f.PLLP = (16UL - 1UL);
(void)CLK_PLLxInit(&stcPLLAInit);
#endif
/* 2. Specifies the clock source of ADC. */
CLK_SetPeriClockSrc(ADC_CLK);
}
/**
* @brief Initializes ADC.
* @param None
* @retval None
*/
static void AdcInitConfig(void)
{
stc_adc_init_t stcAdcInit;
/* 1. Enable ADC peripheral clock. */
FCG_Fcg3PeriphClockCmd(ADC_PERIPH_CLK, ENABLE);
/* 2. Modify the default value depends on the application. Not needed here. */
(void)ADC_StructInit(&stcAdcInit);
/* 3. Initializes ADC. */
(void)ADC_Init(ADC_UNIT, &stcAdcInit);
/* 4. ADC channel configuration. */
/* 4.1 Set the ADC pin to analog input mode. */
AdcSetPinAnalogMode();
/* 4.2 Enable ADC channels. Call ADC_ChCmd() again to enable more channels if needed. */
ADC_ChCmd(ADC_UNIT, ADC_SEQ, ADC_CH, ENABLE);
/* 5. Conversion data average calculation function, if needed.
Call ADC_ConvDataAverageChCmd() again to enable more average channels if needed. */
ADC_ConvDataAverageConfig(ADC_UNIT, ADC_AVG_CNT8);
ADC_ConvDataAverageChCmd(ADC_UNIT, ADC_CH, ENABLE);
}
/**
* @brief Use ADC in polling mode.
* @param None
* @retval uint16_t u16AdcValue
*/
static uint16_t AdcPolling(void)
{
uint16_t u16AdcValue = 0;
int32_t iRet = LL_ERR;
__IO uint32_t u32TimeCount = 0UL;
/* Can ONLY start sequence A conversion.
Sequence B needs hardware trigger to start conversion. */
ADC_Start(ADC_UNIT);
do {
if (ADC_GetStatus(ADC_UNIT, ADC_EOC_FLAG) == SET) {
ADC_ClearStatus(ADC_UNIT, ADC_EOC_FLAG);
iRet = LL_OK;
break;
}
} while (u32TimeCount++ < ADC_TIMEOUT_VAL);
if (iRet == LL_OK) {
/* Get any ADC value of sequence A channel that needed. */
u16AdcValue = ADC_GetValue(ADC_UNIT, ADC_CH);
KPrintf("The ADC value of potentiometer is %u, voltage is %u mV\r\n",
u16AdcValue, ADC_CAL_VOL(u16AdcValue));
} else {
ADC_Stop(ADC_UNIT);
KPrintf("ADC exception.\r\n");
}
return ADC_CAL_VOL(u16AdcValue);
}
static uint32 AdcOpen(void *dev)
{
x_err_t ret = EOK;
struct AdcHardwareDevice* adc_dev = (struct AdcHardwareDevice*)dev;
AdcClockConfig();
AdcInitConfig();
return ret;
}
static uint32 AdcClose(void *dev)
{
struct AdcHardwareDevice* adc_dev = (struct AdcHardwareDevice*)dev;
CM_ADC_TypeDef *ADCx= (CM_ADC_TypeDef *)adc_dev->private_data;
ADC_Stop(ADC_UNIT);
ADC_DeInit(ADCx);
return EOK;
}
static uint32 AdcRead(void *dev, struct BusBlockReadParam *read_param)
{
*(uint16 *)read_param->buffer = AdcPolling();
read_param->read_length = 2;
return EOK;
}
static uint32 AdcDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
x_err_t ret = EOK;
uint8 adc_channel;
struct AdcDriver *adc_drv = (struct AdcDriver *)drv;
struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)adc_drv->driver.owner_bus->owner_haldev;
struct HwAdc *adc_cfg = (struct HwAdc *)adc_dev->haldev.private_data;
switch (configure_info->configure_cmd)
{
case OPE_CFG:
adc_cfg->adc_channel = *(uint8 *)configure_info->private_data;
if (adc_cfg->adc_channel != 1) {
KPrintf("AdcDrvConfigure set adc channel(1) %u error!", adc_cfg->adc_channel);
adc_cfg->adc_channel = 1;
ret = ERROR;
}
break;
default:
break;
}
return ret;
}
static const struct AdcDevDone dev_done =
{
AdcOpen,
AdcClose,
NONE,
AdcRead,
};
int HwAdcInit(void)
{
x_err_t ret = EOK;
#ifdef BSP_USING_ADC
static struct AdcBus adc1_bus;
static struct AdcDriver adc1_drv;
static struct AdcHardwareDevice adc1_dev;
static struct HwAdc adc1_cfg;
adc1_drv.configure = AdcDrvConfigure;
ret = AdcBusInit(&adc1_bus, ADC1_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC1 bus init error %d\n", ret);
return ERROR;
}
ret = AdcDriverInit(&adc1_drv, ADC1_DRIVER_NAME);
if (ret != EOK) {
KPrintf("ADC1 driver init error %d\n", ret);
return ERROR;
}
ret = AdcDriverAttachToBus(ADC1_DRIVER_NAME, ADC1_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC1 driver attach error %d\n", ret);
return ERROR;
}
adc1_dev.adc_dev_done = &dev_done;
adc1_cfg.ADCx = CM_ADC1;
adc1_cfg.adc_channel = 1;
ret = AdcDeviceRegister(&adc1_dev, (void *)&adc1_cfg, ADC1_DEVICE_NAME);
if (ret != EOK) {
KPrintf("ADC1 device register error %d\n", ret);
return ERROR;
}
ret = AdcDeviceAttachToBus(ADC1_DEVICE_NAME, ADC1_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC1 device register error %d\n", ret);
return ERROR;
}
#endif
return ret;
}

15
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/can/Kconfig Normal file
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config CAN_BUS_NAME_2
string "can bus name"
default "can2"
config CAN_DRIVER_NAME_2
string "can driver name"
default "can2_drv"
config CAN_2_DEVICE_NAME_1
string "can bus 1 device 1 name"
default "can2_dev1"
config CAN_USING_INTERRUPT
bool "can interrupt open"
default n

4
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/can/Makefile Normal file
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SRC_FILES := connect_can.c
include $(KERNEL_ROOT)/compiler.mk

290
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/can/connect_can.c Normal file
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/*
* Copyright (c) Guangzhou Xingyi Electronic Technology Co., Ltd
*
* Change Logs:
* Date Author Notes
* 2014-7-4 alientek first version
*/
/**
* @file connect_can.c
* @brief support xishutong-arm32 can function and register to bus framework
* @version 3.0
* @author AIIT XUOS Lab
* @date 2023-12-29
*/
/*************************************************
File name: connect_can.c
Description: support can configure and spi bus register function for xishutong-arm32
Others: connect_can.c for references
*************************************************/
#include "connect_can.h"
#define CAN_X (CM_CAN2)
#define CAN_TX_PORT (GPIO_PORT_D)
#define CAN_TX_PIN (GPIO_PIN_07)
#define CAN_RX_PORT (GPIO_PORT_D)
#define CAN_RX_PIN (GPIO_PIN_06)
#define CAN_TX_PIN_FUNC (GPIO_FUNC_62)
#define CAN_RX_PIN_FUNC (GPIO_FUNC_63)
#define INTSEL_REG ((uint32_t)(&CM_INTC->SEL0))
#define CANX_IRQ_SRC INT_SRC_CAN2_HOST
#define CANX_IRQ_NUM 17
#define IRQ_NUM_OFFSET 16
#define CAN_AF1_ID (0x123UL)
#define CAN_AF1_ID_MSK (0xFFFUL)
#define CAN_AF1_MSK_TYPE CAN_ID_STD
#define CAN_AF2_ID (0x005UL)
#define CAN_AF2_ID_MSK (0x00FUL)
#define CAN_AF2_MSK_TYPE CAN_ID_STD
#define CAN_AF3_ID (0x23UL)
#define CAN_AF3_ID_MSK (0xFFUL)
#define CAN_AF3_MSK_TYPE CAN_ID_STD
#ifdef CAN_USING_INTERRUPT
void CanIrqHandler(int vector, void *param)
{
stc_can_error_info_t err_info;
uint32_t status = CAN_GetStatusValue(CAN_X);
uint32_t error = CAN_GetErrorInfo(CAN_X,&err_info);
KPrintf("Irq entered\n");
CAN_ClearStatus(CAN_X, status);
}
static void CanIrqConfig(void)
{
// register IRQ src in IRQn
__IO uint32_t *INTC_SELx = (__IO uint32_t *)(INTSEL_REG+ 4U * (uint32_t)(CANX_IRQ_NUM));
WRITE_REG32(*INTC_SELx, CANX_IRQ_SRC);
isrManager.done->registerIrq(CANX_IRQ_NUM+IRQ_NUM_OFFSET,CanIrqHandler,NULL);
isrManager.done->enableIrq(CANX_IRQ_NUM);
}
#endif
static void CanInit(struct CanDriverConfigure *can_drv_config)
{
stc_can_init_t stcInit;
stc_can_filter_config_t astcAFCfg[] = { \
{CAN_AF1_ID, CAN_AF1_ID_MSK, CAN_AF1_MSK_TYPE}, \
{CAN_AF2_ID, CAN_AF2_ID_MSK, CAN_AF2_MSK_TYPE}, \
{CAN_AF3_ID, CAN_AF3_ID_MSK, CAN_AF3_MSK_TYPE}, \
};
CLK_SetCANClockSrc(CLK_CAN2,CLK_CANCLK_SYSCLK_DIV4);
/* Set the function of CAN pins. */
GPIO_SetFunc(CAN_TX_PORT, CAN_TX_PIN, CAN_TX_PIN_FUNC);
GPIO_SetFunc(CAN_RX_PORT, CAN_RX_PIN, CAN_RX_PIN_FUNC);
/* Initializes CAN. */
(void)CAN_StructInit(&stcInit);
stcInit.pstcFilter = astcAFCfg;
stcInit.u16FilterSelect = (CAN_FILTER1 | CAN_FILTER2 | CAN_FILTER3);
// Driver's config
stcInit.stcBitCfg.u32SJW = can_drv_config->tsjw;
stcInit.stcBitCfg.u32Prescaler = can_drv_config->brp;
stcInit.stcBitCfg.u32TimeSeg1 = can_drv_config->tbs1;
stcInit.stcBitCfg.u32TimeSeg2 = can_drv_config->tbs2;
stcInit.u8WorkMode = can_drv_config->mode;
FCG_Fcg1PeriphClockCmd(PWC_FCG1_CAN2, ENABLE);
(void)CAN_Init(CAN_X, &stcInit);
CAN_ClearStatus(CAN_X, 0xFFFFFFFFU);
#ifdef CAN_USING_INTERRUPT
/* Configures the interrupts if needed. */
CAN_IntCmd(CAN_X, CAN_INT_RX, ENABLE);
CanIrqConfig();
#endif
}
static uint32 CanConfig(void *can_drv_config)
{
x_err_t ret = EOK;
return ret;
}
static uint32 CanDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
x_err_t ret = EOK;
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
struct CanDriverConfigure *can_drv_config;
switch (configure_info->configure_cmd)
{
case OPE_INT: // can basic init
can_drv_config = (struct CanDriverConfigure *)configure_info->private_data;
CanInit(can_drv_config);
break;
case OPE_CFG:
CanConfig(configure_info->private_data);
break;
default:
break;
}
return ret;
}
static uint32 CanWriteData(void * dev , struct BusBlockWriteParam *write_param)
{
x_err_t ret=EOK;
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(write_param);
struct CanSendConfigure *p_can_config = (struct CanSendConfigure*)write_param->buffer;
stc_can_tx_frame_t can_frame_obj;
memset(&can_frame_obj,0,sizeof(stc_can_tx_frame_t));
// configure CAN's flag bit
can_frame_obj.IDE = p_can_config->ide;
if(1==p_can_config->ide){
can_frame_obj.u32ID = p_can_config->exdid;
}else{
can_frame_obj.u32ID = p_can_config->stdid;
}
can_frame_obj.RTR = p_can_config->rtr;
memcpy(can_frame_obj.au8Data,p_can_config->data,p_can_config->data_lenth);
can_frame_obj.DLC = p_can_config->data_lenth;
//put frame_buffer in message queue
if(can_frame_obj.DLC){
ret = CAN_FillTxFrame(CAN_X,CAN_TX_BUF_STB,&can_frame_obj);
if(EOK != ret){
KPrintf("CAN fill tx frame failed(CODE:%d)!\n",ret);
return ERROR;
}
CAN_StartTx(CAN_X,CAN_TX_REQ_STB_ONE);
}
return ret;
}
static uint32 CanReadData(void *dev , struct BusBlockReadParam *databuf)
{
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(databuf);
x_err_t ret=EOK;
stc_can_rx_frame_t frame_received;
struct CanSendConfigure *p_can_config = (struct CanSendConfigure*)databuf->buffer;
memset(&frame_received,0,sizeof(stc_can_rx_frame_t));
ret = CAN_GetRxFrame(CAN_X, &frame_received);
if(EOK != ret){
// KPrintf("CAN recv frame failed(CODE:%d)!\n",ret);
p_can_config->data_lenth = 0;
return ERROR;
}
//put message in frame_buffer
p_can_config->ide = frame_received.IDE;
p_can_config->rtr = frame_received.RTR;
if(p_can_config->ide==1){
p_can_config->exdid = frame_received.u32ID ;
}else{
p_can_config->stdid = frame_received.u32ID;
p_can_config->exdid = frame_received.u32ID ;
}
p_can_config->data_lenth = frame_received.DLC;
for(int i=0;i<p_can_config->data_lenth;i++){
p_can_config->data[i] = frame_received.au8Data[i];
}
return frame_received.DLC;
}
static struct CanDevDone can_dev_done =
{
.open = NONE,
.close = NONE,
.write = CanWriteData,
.read = CanReadData
};
static int BoardCanBusInit(struct CanBus *can_bus, struct CanDriver *can_driver)
{
x_err_t ret = EOK;
/*Init the can bus */
ret = CanBusInit(can_bus, CAN_BUS_NAME_2);
if (EOK != ret) {
KPrintf("Board_can_init canBusInit error %d\n", ret);
return ERROR;
}
/*Init the can driver*/
ret = CanDriverInit(can_driver, CAN_DRIVER_NAME_2);
if (EOK != ret) {
KPrintf("Board_can_init canDriverInit error %d\n", ret);
return ERROR;
}
/*Attach the can driver to the can bus*/
ret = CanDriverAttachToBus(CAN_DRIVER_NAME_2, CAN_BUS_NAME_2);
if (EOK != ret) {
KPrintf("Board_can_init CanDriverAttachToBus error %d\n", ret);
return ERROR;
}
return ret;
}
/* Attach the can device to the can bus*/
static int BoardCanDevBend(void)
{
x_err_t ret = EOK;
static struct CanHardwareDevice can_device0;
memset(&can_device0, 0, sizeof(struct CanHardwareDevice));
can_device0.dev_done = &can_dev_done;
ret = CanDeviceRegister(&can_device0, NONE, CAN_2_DEVICE_NAME_1);
if (EOK != ret) {
KPrintf("board_can_init CanDeviceInit device %s error %d\n", CAN_2_DEVICE_NAME_1, ret);
return ERROR;
}
ret = CanDeviceAttachToBus(CAN_2_DEVICE_NAME_1, CAN_BUS_NAME_2);
if (EOK != ret) {
KPrintf("board_can_init CanDeviceAttachToBus device %s error %d\n", CAN_2_DEVICE_NAME_1, ret);
return ERROR;
}
return ret;
}
int HwCanInit(void)
{
x_err_t ret = EOK;
static struct CanBus can_bus;
memset(&can_bus, 0, sizeof(struct CanBus));
static struct CanDriver can_driver;
memset(&can_driver, 0, sizeof(struct CanDriver));
can_driver.configure = &(CanDrvConfigure);
ret = BoardCanBusInit(&can_bus, &can_driver);
if (EOK != ret) {
KPrintf(" can_bus_init %s error ret %u\n", CAN_BUS_NAME_2, ret);
return ERROR;
}
ret = BoardCanDevBend();
if (EOK != ret) {
KPrintf("board_can_init error ret %u\n", ret);
return ERROR;
}
return EOK;
}

17
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/dac/Kconfig Normal file
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if BSP_USING_DAC
config DAC_BUS_NAME
string "dac bus name"
default "dac"
config DAC_DRIVER_NAME
string "dac driver name"
default "dac_drv"
config DAC_DEVICE_NAME
string "dac bus device name"
default "dac_dev"
config DAC_GPIO_NUM
int "dac gpio pin num(only support 4 or 5)"
default "4"
endif

3
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/dac/Makefile Normal file
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SRC_FILES := connect_dac.c
include $(KERNEL_ROOT)/compiler.mk

398
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/dac/connect_dac.c Normal file
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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_dac.c
* @brief support to register DAC pointer and function
* @version 3.0
* @author AIIT XUOS Lab
* @date 2023-12-29
*/
#include <connect_dac.h>
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
#define DAC_UNIT1_PORT (GPIO_PORT_A)
#define DAC_UNIT1_CHN1_PIN (GPIO_PIN_04)
#define VREFH (3.3F)
#define DAC_CHN1 (0U)
#define DAC_CHN2 (1U)
#define DAC_DATA_ALIGN_12b_R (0U)
#define DAC_DATA_ALIGN_12b_L (1U)
#define SUPPORT_AMP
#define SUPPORT_ADP
#define SINGLE_WAVE_DAC_CHN (DAC_CHN1)
#define DAC_DATA_ALIGN (DAC_DATA_ALIGN_12b_L)
#define SINE_DOT_NUMBER (4096U)
#define SINE_NEGATIVE_TO_POSITVE (1.0F)
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
typedef enum {
DAC_Unit1,
DAC_Unit2,
DAC_Unit_Max,
}en_dac_unit_t;
typedef enum {
E_Dac_Single,
E_Dac_Dual,
}en_dac_cvt_t;
typedef struct {
CM_DAC_TypeDef *pUnit;
en_dac_cvt_t enCvtType;
uint16_t u16Ch;
} stc_dac_handle_t;
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
static stc_dac_handle_t m_stcDACHandle[DAC_Unit_Max] = {0};
static uint32_t gu32SinTable[SINE_DOT_NUMBER];
static stc_dac_handle_t *pSingleDac;
/*******************************************************************************
* Function implementation - global ('extern') and local ('static')
******************************************************************************/
/**
* @brief MAU Initialization
* @param None
* @retval None
*/
static void MauInit(void)
{
/* Enable MAU peripheral clock. */
FCG_Fcg0PeriphClockCmd(PWC_FCG0_MAU, ENABLE);
}
/**
* @brief MAU De-Initialization
* @param None
* @retval None
*/
static void MauDeinit(void)
{
/* Enable MAU peripheral clock. */
FCG_Fcg0PeriphClockCmd(PWC_FCG0_MAU, DISABLE);
}
/**
* @brief Sin table Initialization
* @param [in] pSinTable sin table
* @param [in] u32count number of pSinTable items
* @retval None
*/
static void SinTableInit(uint32_t pSinTable[], uint32_t u32count)
{
uint32_t i;
uint32_t u32AngAvg = (uint32_t)(float32_t)((float32_t)((float32_t)MAU_SIN_ANGIDX_TOTAL / (float32_t)u32count) + 0.5);
float32_t fSin;
for (i = 0U; i < u32count; i++) {
fSin = (((float32_t)MAU_Sin(CM_MAU, (uint16_t)(u32AngAvg * i))
/ (float32_t)MAU_SIN_Q15_SCALAR + SINE_NEGATIVE_TO_POSITVE) / VREFH) *
(float32_t)DAC_DATAREG_VALUE_MAX + 0.5F;
#if (DAC_DATA_ALIGN == DAC_DATA_ALIGN_12b_L)
{
pSinTable[i] = (uint32_t)fSin << 4;
}
#else
{
pSinTable[i] = (uint32_t)fSin;
}
#endif
}
}
/**
* @brief Enable DAC peripheral clock
* @param [in] enUnit The selected DAC unit
* @retval None
*/
static void DacPClkEnable(en_dac_unit_t enUnit)
{
uint32_t u32PClk;
switch (enUnit) {
case DAC_Unit1:
u32PClk = PWC_FCG3_DAC1;
break;
case DAC_Unit2:
u32PClk = PWC_FCG3_DAC2;
break;
default:
u32PClk = PWC_FCG3_DAC1 | PWC_FCG3_DAC2;
break;
}
/* Enable DAC peripheral clock. */
FCG_Fcg3PeriphClockCmd(u32PClk, ENABLE);
}
/**
* @brief Init DAC single channel
* @param [in] enUnit The selected DAC unit
* @retval A pointer of DAC handler
*/
static stc_dac_handle_t *DacSingleConversionInit(en_dac_unit_t enUnit)
{
uint8_t u8Port;
uint16_t u16Pin;
stc_dac_handle_t *pDac;
if (enUnit == DAC_Unit1) {
pDac = &m_stcDACHandle[DAC_Unit1];
pDac->pUnit = CM_DAC1;
} else {
pDac = &m_stcDACHandle[DAC_Unit2];
pDac->pUnit = CM_DAC2;
}
DacPClkEnable(enUnit);
pDac->enCvtType = E_Dac_Single;
#if (SINGLE_WAVE_DAC_CHN == DAC_CHN1)
pDac->u16Ch = DAC_CH1;
#else
pDac->u16Ch = DAC_CH2;
#endif
/* Init DAC by default value: source from data register and output enabled*/
DAC_DeInit(pDac->pUnit);
stc_dac_init_t stInit;
(void)DAC_StructInit(&stInit);
(void)DAC_Init(pDac->pUnit, pDac->u16Ch, &stInit);
#if (DAC_DATA_ALIGN == DAC_DATA_ALIGN_12b_L)
DAC_DataRegAlignConfig(pDac->pUnit, DAC_DATA_ALIGN_L);
#else
DAC_DataRegAlignConfig(pDac->pUnit, DAC_DATA_ALIGN_R);
#endif
/* Set DAC pin attribute to analog */
if (enUnit == DAC_Unit1) {
u8Port = DAC_UNIT1_PORT;
#if (SINGLE_WAVE_DAC_CHN == DAC_CHN1)
u16Pin = DAC_UNIT1_CHN1_PIN;
#endif
}
stc_gpio_init_t stcGpioInit;
(void)GPIO_StructInit(&stcGpioInit);
stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
(void)GPIO_Init(u8Port, u16Pin, &stcGpioInit);
#ifdef SUPPORT_ADP
/* Set ADC first */
/* Enable ADC peripheral clock. */
FCG_Fcg3PeriphClockCmd(PWC_FCG3_ADC1 | PWC_FCG3_ADC2 | PWC_FCG3_ADC3, ENABLE);
if (CM_ADC1->STR == 0U) {
if (CM_ADC2->STR == 0U) {
if (CM_ADC3->STR == 0U) {
DAC_ADCPrioConfig(pDac->pUnit, DAC_ADP_SELECT_ALL, ENABLE);
DAC_ADCPrioCmd(pDac->pUnit, ENABLE);
}
}
}
#endif
return pDac;
}
/**
* @brief Start single DAC conversions
* @param [in] pDac A pointer of DAC handler
* @retval None
*/
static void DacStartSingleConversion(const stc_dac_handle_t *pDac)
{
/* Enalbe AMP */
#ifdef SUPPORT_AMP
(void)DAC_AMPCmd(pDac->pUnit, pDac->u16Ch, ENABLE);
#endif
(void)DAC_Start(pDac->pUnit, pDac->u16Ch);
#ifdef SUPPORT_AMP
/* delay 3us before setting data*/
DDL_DelayMS(1U);
#endif
}
/**
* @brief Convert data by single DAC channel
* @param [in] pDac A pointer of DAC handler
* @param [in] pDataTable The data table to be converted
* @param [in] u32count Number of data table items
* @retval None
*/
__STATIC_INLINE void DacSetSingleConversionData(const stc_dac_handle_t *pDac, uint32_t const pDataTable[], uint32_t u32count)
{
uint32_t i = 0U;
for (i = 0U; i < u32count; i++) {
#ifdef SUPPORT_ADP
uint32_t u32TryCount = 100U;
while (u32TryCount != 0U) {
u32TryCount--;
if (SET != DAC_GetChConvertState(pDac->pUnit, pDac->u16Ch)) {
break;
}
}
#endif
DAC_SetChData(pDac->pUnit, pDac->u16Ch, (uint16_t)pDataTable[i]);
}
}
/**
* @brief stop DAC conversion
* @param [in] pDac A pointer of DAC handler
* @retval None
*/
static void DAC_StopConversion(const stc_dac_handle_t *pDac)
{
if (NULL == pDac) {
DAC_DeInit(CM_DAC1);
DAC_DeInit(CM_DAC2);
} else if (pDac->enCvtType != E_Dac_Dual) {
(void)DAC_Stop(pDac->pUnit, pDac->u16Ch);
} else {
DAC_StopDualCh(pDac->pUnit);
}
}
static uint32 DacOpen(void *dev)
{
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
/* Init MAU for generating sine data*/
MauInit();
/* Init sine data table */
SinTableInit(gu32SinTable, SINE_DOT_NUMBER);
/* Init single DAC */
pSingleDac = DacSingleConversionInit(DAC_Unit1);
return EOK;
}
static uint32 DacClose(void *dev)
{
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
DAC_StopConversion(pSingleDac);
DAC_DeInit(DACx);
MauDeinit();
memset(gu32SinTable, 0 , sizeof(gu32SinTable));
return EOK;
}
static uint32 DacWrite(void *dev, struct BusBlockWriteParam *write_param)
{
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
struct HwDac *dac_cfg = (struct HwDac *)dac_dev->haldev.private_data;
for (int i = 0; i < dac_cfg->digital_data; i ++) {
DacStartSingleConversion(pSingleDac);
DacSetSingleConversionData(pSingleDac, &gu32SinTable[i], 1U);
if (i > SINE_DOT_NUMBER) {
i = 0;
}
}
return EOK;
}
static uint32 DacDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
x_err_t ret = EOK;
struct DacDriver *dac_drv = (struct DacDriver *)drv;
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dac_drv->driver.owner_bus->owner_haldev;
struct HwDac *dac_cfg = (struct HwDac *)dac_dev->haldev.private_data;
switch (configure_info->configure_cmd)
{
case OPE_CFG:
dac_cfg->digital_data = *(uint16 *)configure_info->private_data;
break;
default:
break;
}
return ret;
}
static const struct DacDevDone dev_done =
{
DacOpen,
DacClose,
DacWrite,
NONE,
};
int HwDacInit(void)
{
x_err_t ret = EOK;
#ifdef BSP_USING_DAC
static struct DacBus dac_bus;
static struct DacDriver dac_drv;
static struct DacHardwareDevice dac_dev;
static struct HwDac dac_cfg;
dac_drv.configure = DacDrvConfigure;
ret = DacBusInit(&dac_bus, DAC_BUS_NAME);
if (ret != EOK) {
KPrintf("DAC bus init error %d\n", ret);
return ERROR;
}
ret = DacDriverInit(&dac_drv, DAC_DRIVER_NAME);
if (ret != EOK) {
KPrintf("DAC driver init error %d\n", ret);
return ERROR;
}
ret = DacDriverAttachToBus(DAC_DRIVER_NAME, DAC_BUS_NAME);
if (ret != EOK) {
KPrintf("DAC driver attach error %d\n", ret);
return ERROR;
}
dac_dev.dac_dev_done = &dev_done;
dac_cfg.DACx = CM_DAC1;
dac_cfg.digital_data = 0;
ret = DacDeviceRegister(&dac_dev, (void *)&dac_cfg, DAC_DEVICE_NAME);
if (ret != EOK) {
KPrintf("DAC device register error %d\n", ret);
return ERROR;
}
ret = DacDeviceAttachToBus(DAC_DEVICE_NAME, DAC_BUS_NAME);
if (ret != EOK) {
KPrintf("DAC device register error %d\n", ret);
return ERROR;
}
#endif
return ret;
}

14
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/usb/connect_usb.c
View File

@ -12,22 +12,22 @@
/**
* @file connect_usb.c
* @brief support edu-arm32-board usb function and register to bus framework
* @version 2.0
* @brief support xishutong-arm32-board usb function and register to bus framework
* @version 3.0
* @author AIIT XUOS Lab
* @date 2022-11-07
* @date 2023-12-29
*/
/*************************************************
File name: connect_usb.c
Description: support edu-arm32-board usb function and register to bus framework
Description: support xishutong-arm32-board usb function and register to bus framework
Others:
History:
1. Date: 2022-11-07
1. Date: 2023-12-29
Author: AIIT XUOS Lab
Modification:
1. support edu-arm32-board usb configure, write and read
2. support edu-arm32-board usb bus device and driver register
1. support xishutong-arm32-board usb configure, write and read
2. support xishutong-arm32-board usb bus device and driver register
*************************************************/
#include <connect_usb.h>

18
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/usb/hc32_usb_driver/usb_bsp.c
View File

@ -20,22 +20,22 @@
/**
* @file usb_bsp.c
* @brief support edu-arm32-board usb bsp function
* @version 2.0
* @brief support xishutong-arm32-board usb bsp function
* @version 3.0
* @author AIIT XUOS Lab
* @date 2022-11-08
* @date 2023-12-29
*/
/*************************************************
File name: usb_bsp.c
Description: support edu-arm32-board usb bsp function
Description: support xishutong-arm32-board usb bsp function
Others:
History:
1. Date: 2022-11-08
1. Date: 2023-12-29
Author: AIIT XUOS Lab
Modification:
1. support edu-arm32-board usb IO configure
2. support edu-arm32-board usb irq define
1. support xishutong-arm32-board usb IO configure
2. support xishutong-arm32-board usb irq define
*************************************************/
#include <device.h>
#include "usb_bsp.h"
@ -56,8 +56,8 @@ extern usb_core_instance usb_app_instance;
#define USB_VBUSDET_PORT (GPIO_PORT_A)
#define USB_VBUSDET_PIN (GPIO_PIN_09)
#define USB_OC_PORT (GPIO_PORT_D)
#define USB_OC_PIN (GPIO_PIN_15)
#define USB_OC_PORT (GPIO_PORT_H)
#define USB_OC_PIN (GPIO_PIN_13)
//USB HOST ISR
static void USB_IRQ_Handler(void)

10
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/usb/hc32_usb_driver/usb_bsp.h
View File

@ -20,18 +20,18 @@
/**
* @file usb_bsp.h
* @brief support edu-arm32-board usb bsp function
* @version 2.0
* @brief support xishutong-arm32-board usb bsp function
* @version 3.0
* @author AIIT XUOS Lab
* @date 2022-11-08
* @date 2023-12-29
*/
/*************************************************
File name: usb_bsp.h
Description: support edu-arm32-board usb bsp function
Description: support xishutong-arm32-board usb bsp function
Others:
History:
1. Date: 2022-11-08
1. Date: 2023-12-29
Author: AIIT XUOS Lab
Modification:
*************************************************/

10
Ubiquitous/XiZi_IIoT/board/xishutong-arm32/third_party_driver/usb/hc32_usb_driver/usb_host_user.c
View File

@ -20,18 +20,18 @@
/**
* @file usb_host_user.c
* @brief support edu-arm32-board usb function
* @version 2.0
* @brief support xishutong-arm32-board usb function
* @version 3.0
* @author AIIT XUOS Lab
* @date 2022-11-07
* @date 2023-12-29
*/
/*************************************************
File name: usb_host_user.c
Description: support edu-arm32-board usb function
Description: support xishutong-arm32-board usb function
Others:
History:
1. Date: 2022-11-07
1. Date: 2023-12-29
Author: AIIT XUOS Lab
Modification:
1. delete useless usb host configure and define

2
Ubiquitous/XiZi_IIoT/path_app.mk
View File

@ -39,7 +39,7 @@ ifeq ($(CONFIG_CRYPTO), y)
APPPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/security/crypto/include #
endif
ifeq ($(CONFIG_USE_MONGOOSE),y)
ifeq ($(CONFIG_APPLICATION_WEBSERVER),y)
APPPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Applications/mongoose #
endif