287 lines
6.4 KiB
C
287 lines
6.4 KiB
C
/*----------------------------------------------------------------------------
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* Tencent is pleased to support the open source community by making TencentOS
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* available.
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*
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* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
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* If you have downloaded a copy of the TencentOS binary from Tencent, please
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* note that the TencentOS binary is licensed under the BSD 3-Clause License.
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*
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* If you have downloaded a copy of the TencentOS source code from Tencent,
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* please note that TencentOS source code is licensed under the BSD 3-Clause
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* License, except for the third-party components listed below which are
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* subject to different license terms. Your integration of TencentOS into your
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* own projects may require compliance with the BSD 3-Clause License, as well
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* as the other licenses applicable to the third-party components included
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* within TencentOS.
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*---------------------------------------------------------------------------*/
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#include "tos_k.h"
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__API__ uint32_t tos_cpu_clz(uint32_t val)
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{
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#if defined(TOS_CFG_CPU_LEAD_ZEROS_ASM_PRESENT) && (TOS_CFG_CPU_LEAD_ZEROS_ASM_PRESENT == 0u)
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uint32_t nbr_lead_zeros = 0;
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if (!(val & 0XFFFF0000)) {
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val <<= 16;
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nbr_lead_zeros += 16;
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}
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if (!(val & 0XFF000000)) {
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val <<= 8;
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nbr_lead_zeros += 8;
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}
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if (!(val & 0XF0000000)) {
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val <<= 4;
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nbr_lead_zeros += 4;
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}
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if (!(val & 0XC0000000)) {
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val <<= 2;
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nbr_lead_zeros += 2;
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}
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if (!(val & 0X80000000)) {
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nbr_lead_zeros += 1;
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}
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if (!val) {
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nbr_lead_zeros += 1;
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}
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return (nbr_lead_zeros);
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#else
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return port_clz(val);
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#endif
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}
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__API__ void tos_cpu_int_disable(void)
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{
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port_int_disable();
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}
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__API__ void tos_cpu_int_enable(void)
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{
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port_int_enable();
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}
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__API__ cpu_cpsr_t tos_cpu_cpsr_save(void)
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{
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return port_cpsr_save();
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}
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__API__ void tos_cpu_cpsr_restore(cpu_cpsr_t cpsr)
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{
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port_cpsr_restore(cpsr);
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}
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__KNL__ void cpu_init(void)
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{
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k_cpu_cycle_per_tick = TOS_CFG_CPU_CLOCK / k_cpu_tick_per_second;
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interrupt_init();
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chip_init();
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}
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__KNL__ void cpu_reset(void)
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{
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port_cpu_reset();
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}
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__KNL__ void cpu_sched_start(void)
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{
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port_sched_start();
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}
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__KNL__ void cpu_context_switch(void)
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{
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port_context_switch();
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}
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__KNL__ void cpu_irq_context_switch(void)
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{
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port_irq_context_switch();
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}
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__KNL__ void cpu_systick_init(k_cycle_t cycle_per_tick)
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{
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port_systick_priority_set(TOS_CFG_CPU_SYSTICK_PRIO);
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port_systick_config(cycle_per_tick);
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}
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#if TOS_CFG_TICKLESS_EN > 0u
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/**
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* @brief Set value to systick reload value register
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*
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* @param cycles The value set to register
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*
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* @return None
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*/
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__STATIC_INLINE__ void cpu_systick_reload(k_cycle_t cycle_per_tick)
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{
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port_systick_reload(cycle_per_tick);
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}
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/**
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* @brief Enable systick interrupt
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*
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* @return None
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*/
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__KNL__ void cpu_systick_resume(void)
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{
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port_systick_resume();
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}
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/**
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* @brief Disable systick interrupt
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*
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* @return None
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*/
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__KNL__ void cpu_systick_suspend(void)
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{
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port_systick_suspend();
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}
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__KNL__ k_time_t cpu_systick_max_delay_millisecond(void)
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{
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return port_systick_max_delay_millisecond();
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}
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__KNL__ void cpu_systick_expires_set(k_time_t millisecond)
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{
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k_cycle_t cycles;
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cycles = (k_cycle_t)((uint64_t)millisecond * TOS_CFG_CPU_CLOCK / K_TIME_MILLISEC_PER_SEC); /* CLOCK means cycle per second */
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cpu_systick_reload(cycles - 12); /* interrupt delay */
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}
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__KNL__ void cpu_systick_pending_reset(void)
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{
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port_systick_pending_reset();
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}
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__KNL__ void cpu_systick_reset(void)
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{
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cpu_systick_reload(k_cpu_cycle_per_tick);
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}
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#endif /* TOS_CFG_TICKLESS_EN */
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#if TOS_CFG_PWR_MGR_EN > 0u
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__KNL__ void cpu_sleep_mode_enter(void)
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{
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port_sleep_mode_enter();
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}
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__KNL__ void cpu_stop_mode_enter(void)
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{
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port_stop_mode_enter();
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}
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__KNL__ void cpu_standby_mode_enter(void)
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{
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port_standby_mode_enter();
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}
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#endif /* TOS_CFG_PWR_MGR_EN */
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__KNL__ k_stack_t *cpu_task_stk_init(void *entry,
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void *arg,
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void *exit,
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k_stack_t *stk_base,
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size_t stk_size)
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{
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cpu_data_t *sp;
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cpu_context_t *context;
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sp = (cpu_data_t *)&stk_base[stk_size];
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sp = (cpu_data_t *)((cpu_addr_t)sp & 0xFFFFFFF8);
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#if TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN > 0u
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uint8_t *slot = (uint8_t *)&stk_base[0];
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for (; slot < (uint8_t *)sp; ++slot) {
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*slot = 0xCC;
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}
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#endif
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context = (cpu_context_t *)sp;
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--context;
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#define CPSR_SVC_MODE 0x13
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#define CPSR_BIT_T 0x20
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/* we donnot set the irq bit, so first time context switch should enable irq */
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context->cpsr = CPSR_SVC_MODE;
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if ((cpu_addr_t)entry & 1) {
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context->cpsr |= CPSR_BIT_T;
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}
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context->pc = (cpu_data_t)entry;
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context->lr = (cpu_data_t)exit;
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context->r12 = (cpu_data_t)0x12121212u;
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context->r11 = (cpu_data_t)0x11111111u;
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context->r10 = (cpu_data_t)0x10101010u;
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context->r9 = (cpu_data_t)0x09090909u;
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context->r8 = (cpu_data_t)0x08080808u;
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context->r7 = (cpu_data_t)0x07070707u;
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context->r6 = (cpu_data_t)0x06060606u;
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context->r5 = (cpu_data_t)0x05050505u;
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context->r4 = (cpu_data_t)0x04040404u;
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context->r3 = (cpu_data_t)0x03030303u;
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context->r2 = (cpu_data_t)0x02020202u;
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context->r1 = (cpu_data_t)0x01010101u;
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context->r0 = (cpu_data_t)arg;
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return (k_stack_t *)context;
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}
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#if TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN > 0u
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__KNL__ k_err_t cpu_task_stack_draught_depth(k_stack_t *stk_base, size_t stk_size, int *depth)
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{
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uint8_t *slot;
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uint8_t *sp, *bp;
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int the_depth = 0;
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bp = (uint8_t *)&stk_base[0];
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sp = &stk_base[stk_size];
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sp = (uint8_t *)((cpu_addr_t)sp & 0xFFFFFFF8);
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for (slot = sp - 1; slot >= bp; --slot) {
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if (*slot != 0xCC) {
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the_depth = sp - slot;
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}
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}
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*depth = the_depth;
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if (the_depth == stk_size) {
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return K_ERR_TASK_STK_OVERFLOW;
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}
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return K_ERR_NONE;
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}
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#endif
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#if TOS_CFG_FAULT_BACKTRACE_EN > 0u
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#if defined (TOS_CFG_CPU_ARM_FPU_EN) && (TOS_CFG_CPU_ARM_FPU_EN == 1U)
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__KNL__ void cpu_flush_fpu(void)
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{
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(void)__get_FPSCR();
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}
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#endif
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__KNL__ void cpu_fault_diagnosis(void)
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{
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port_fault_diagnosis();
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}
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#endif /* TOS_CFG_FAULT_BACKTRACE_EN */
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