Xianyi Zhang ebe2da8474 Modified aligned size. Added additional prefetch instruction because of cache line is 32 bytes in Loongson 3A.

2011-01-27 23:07:06 +08:00

..

alpha

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2011-01-24 14:54:24 +00:00

generic

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ia64

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2011-01-24 14:54:24 +00:00

mips64

Modified aligned size. Added additional prefetch instruction because of cache line is 32 bytes in Loongson 3A.

2011-01-27 23:07:06 +08:00

power

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2011-01-24 14:54:24 +00:00

sparc

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2011-01-24 14:54:24 +00:00

x86

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x86_64

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Makefile

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Makefile.L1

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Makefile.L2

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Makefile.L3

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Makefile.LA

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setparam-ref.c

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2011-01-24 14:54:24 +00:00