229 lines
4.9 KiB
ArmAsm
229 lines
4.9 KiB
ArmAsm
#define ASSEMBLER
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#include "common.h"
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#define N $r4
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#define X $r5
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#define INCX $r6
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#define I $r12
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#define t1 $r13
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#define t2 $r15
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#define t3 $r18
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#define t4 $r16
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#define i0 $r17
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#define i1 $r14
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#define TEMP $r19
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#define x1 $vr9
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#define x2 $vr10
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#define x3 $vr11
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#define x4 $vr12
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#define VX0 $vr13
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#define VX1 $vr14
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#define VM0 $vr15
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#define VM1 $vr16
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#define VINC2 $vr17
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#define VINC4 $vr18
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#define VI0 $vr20
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#define VI1 $vr21
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#define VI2 $vr22
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#define VI3 $vr8
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#define VI4 $vr19
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#define VT0 $vr23
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PROLOGUE
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li.d i0, 0
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bge $r0, N, .L999
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bge $r0, INCX, .L999
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li.d TEMP, 1
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slli.d TEMP, TEMP, BASE_SHIFT
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slli.d INCX, INCX, BASE_SHIFT
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bne INCX, TEMP, .L20
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vld VM0, X, 0
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addi.d i0, i0, 1
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srai.d I, N, 3
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bge $r0, I, .L21
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slli.d i0, i0, 1 //2
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vreplgr2vr.d VINC2, i0
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slli.d i0, i0, 1 //4
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vreplgr2vr.d VINC4, i0
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addi.d i0, i0, -7
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vinsgr2vr.d VI1, i0, 0 //initialize the index value for vectorization
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addi.d i0, i0, 1
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vinsgr2vr.d VI1, i0, 1
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addi.d i0, i0, 3
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vinsgr2vr.d VI0, i0, 0 //1
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addi.d i0, i0, 1
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vinsgr2vr.d VI0, i0, 1 //2
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.align 3
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.L10:
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vld VX0, X, 0 * SIZE
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vadd.d VI1, VI1, VINC4
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vld VX1, X, 2 * SIZE
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vadd.d VI2, VI1, VINC2
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vfmina.d x1, VX0, VX1
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vfcmp.ceq.d VT0, VX0, x1
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vbitsel.v x2, VI2, VI1, VT0
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vld VX0, X, 4 * SIZE
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vadd.d VI1, VI2, VINC2
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vld VX1, X, 6 * SIZE
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vadd.d VI2, VI1, VINC2
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vfmina.d x3, VX0, VX1
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vfcmp.ceq.d VT0, VX0, x3
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vbitsel.v x4, VI2, VI1, VT0
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vfmina.d x3, x1, x3
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vfcmp.ceq.d VT0, x1, x3
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addi.d I, I, -1
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vbitsel.v x2, x4, x2, VT0
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vfmina.d VM1, VM0, x3
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vfcmp.ceq.d VT0, VM0, VM1
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addi.d X, X, 8 * SIZE
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vbitsel.v VM0, VM1, VM0, VT0
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vbitsel.v VI0, x2, VI0, VT0
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blt $r0, I, .L10
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.align 3
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.L15:
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vreplvei.d VI1, VI0, 0
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vreplvei.d VI2, VI0, 1
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vreplvei.d x1, VM0, 0
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vreplvei.d x2, VM0, 1
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li.d TEMP, 1 //处理尾数相等时取最小序号
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movgr2fr.d $f17, TEMP
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ffint.d.l $f17, $f17
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vfcmp.ceq.d VT0, x2, x1
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fcmp.ceq.d $fcc0, $f23, $f17
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bceqz $fcc0, .L26
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vfcmp.clt.d VT0, VI1, VI0
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vbitsel.v VI0, VI0, VI1, VT0
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b .L27
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.align 3
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.L20: // INCX!=1
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move TEMP, X
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addi.d i0, i0, 1
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ld.d t1, TEMP, 0 * SIZE
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add.d TEMP, TEMP, INCX
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vinsgr2vr.d VM0, t1, 0
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srai.d I, N, 3
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bge $r0, I, .L21
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ld.d t2, TEMP, 0 * SIZE
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add.d TEMP, TEMP, INCX
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vinsgr2vr.d VM0, t2, 1
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slli.d i0, i0, 1 //2
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vreplgr2vr.d VINC2, i0
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slli.d i0, i0, 1 //4
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vreplgr2vr.d VINC4, i0
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addi.d i0, i0, -7
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vinsgr2vr.d VI1, i0, 0 //initialize the index value for vectorization
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addi.d i0, i0, 1
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vinsgr2vr.d VI1, i0, 1
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addi.d i0, i0, 3
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vinsgr2vr.d VI0, i0, 0 //1
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addi.d i0, i0, 1
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vinsgr2vr.d VI0, i0, 1 //2
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.align 3
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.L24:
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ld.d t1, X, 0 * SIZE
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add.d X, X, INCX
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ld.d t2, X, 0 * SIZE
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add.d X, X, INCX
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vinsgr2vr.d VX0, t1, 0
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vinsgr2vr.d VX0, t2, 1
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vadd.d VI1, VI1, VINC4
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ld.d t1, X, 0 * SIZE
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add.d X, X, INCX
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ld.d t2, X, 0 * SIZE
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add.d X, X, INCX
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vinsgr2vr.d VX1, t1, 0
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vinsgr2vr.d VX1, t2, 1
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vadd.d VI2, VI1, VINC2
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vfmina.d x1, VX0, VX1
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vfcmp.ceq.d VT0, VX0, x1
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vbitsel.v x2, VI2, VI1, VT0
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ld.d t1, X, 0 * SIZE
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add.d X, X, INCX
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ld.d t2, X, 0 * SIZE
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add.d X, X, INCX
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vinsgr2vr.d VX0, t1, 0
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vinsgr2vr.d VX0, t2, 1
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vadd.d VI1, VI2, VINC2
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ld.d t1, X, 0 * SIZE
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add.d X, X, INCX
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ld.d t2, X, 0 * SIZE
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add.d X, X, INCX
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vinsgr2vr.d VX1, t1, 0
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vinsgr2vr.d VX1, t2, 1
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vadd.d VI2, VI1, VINC2
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vfmina.d x3, VX0, VX1
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vfcmp.ceq.d VT0, VX0, x3
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vbitsel.v x4, VI2, VI1, VT0
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vfmina.d x3, x1, x3
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vfcmp.ceq.d VT0, x1, x3
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addi.d I, I, -1
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vbitsel.v x2, x4, x2, VT0
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vfmina.d VM1, VM0, x3
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vbitsel.v VM0, VM1, VM0, VT0
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vfcmp.ceq.d VT0, VM0, VM1
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vbitsel.v VI0, x2, VI0, VT0
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blt $r0, I, .L24
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.align 3
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.L25:
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vreplvei.d VI1, VI0, 0
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vreplvei.d VI2, VI0, 1
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vreplvei.d x1, VM0, 0
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vreplvei.d x2, VM0, 1
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li.d TEMP, 1 //处理尾数相等时取最小序号
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movgr2fr.d $f17, TEMP
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ffint.d.l $f17, $f17
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vfcmp.ceq.d VT0, x2, x1
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fcmp.ceq.d $fcc0, $f23, $f17
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bceqz $fcc0, .L26
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vfcmp.clt.d VT0, VI1, VI0
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vbitsel.v VI0, VI0, VI1, VT0
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b .L27
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.align 3
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.L26:
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vfmina.d VM0, x1, x2
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vfcmp.ceq.d VT0, x1, VM0
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vbitsel.v VI0, VI2, VI1, VT0
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.align 3
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.L27:
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movfr2gr.d i0, $f20
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.align 3
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.L21: //N<8
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andi I, N, 7
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bge $r0, I, .L999
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srai.d i1, N, 3
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slli.d i1, i1, 3
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addi.d i1, i1, 1 //current index
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movgr2fr.d $f21, i1
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movgr2fr.d $f20, i0
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.align 3
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.L22:
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fld.d $f9, X, 0
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addi.d I, I, -1
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vfmina.d VM1, x1, VM0
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vfcmp.ceq.d VT0, VM0, VM1
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add.d X, X, INCX
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vbitsel.v VM0, VM1, VM0, VT0
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vbitsel.v VI0, VI1, VI0, VT0
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addi.d i1, i1, 1
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movgr2fr.d $f21, i1
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blt $r0, I, .L22
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movfr2gr.d i0, $f20
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.align 3
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.L999:
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move $r4, $r17
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jirl $r0, $r1, 0x0
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.align 3
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EPILOGUE
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